JPS6238715B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a musical tone generating device suitable for use in electronic musical instruments, and more specifically, a musical tone generating device that connects a delay means and a digital filter in a closed loop to circulate waveform data, and generates musical tones based on this waveform data. This invention relates to an improvement of a musical tone generator. Conventionally, an electronic device that uses a waveform memory in which a desired musical sound waveform is stored in an analog or digital manner and repeatedly reads out the stored contents from this waveform memory at a speed proportional to the frequency of the musical sound to be generated to form a musical sound. Musical instruments are suggested. However, in such electronic musical instruments, the musical sound waveforms generated are always similar waveforms that are repeated, and in order to generate richly varied and expressive musical sounds, various changes are made to the musical sound waveforms read from the waveform memory. It was necessary to perform waveform processing. In order to eliminate such drawbacks, the applicant of the present application filed patent application No. 1975 on December 16, 1975.
No. 149148 (Japanese Unexamined Patent Publication No. 52-73721) "Electronic musical instrument" (hereinafter referred to as the earlier application), a musical sound waveform read from a waveform memory is added to the input terminal of a filter having desired frequency characteristics, and The musical sound waveform that appears in the filter is delayed by a predetermined time and then applied to the input terminal of the filter again, so that the musical sound waveform circulates through the filter, and each time it passes through the filter, it sequentially changes depending on the characteristics of the filter. I made it possible to extract the musical sound waveform. and,
In this case, a digital filter was used as the filter, and a shift register was used as the delay means for delaying the output for a predetermined period of time. According to the above configuration, it is possible to generate a musical tone whose waveform changes over time with a simple configuration, and it is also possible to obtain a variety of timbre changes by changing and controlling the parameters that determine the transmission characteristics of the filter. It was possible. However, there is still room for improvement in the electronic musical instrument of the earlier application. The main point to be improved is the clock pulses for the digital filters, shift registers, etc. mentioned above. That is, in the electronic musical instrument of the prior application, clock pulses with a frequency proportional to the fundamental frequency of the musical tone to be generated must be used as clock pulses for the digital filter and shift register. by the way,
Since the fundamental frequency of musical tones generated by electronic musical instruments spans a wide frequency range, it is not desirable to use clock pulses that vary over a wide frequency range corresponding to this fundamental frequency as clock pulses for digital filters and shift registers. That is, it is extremely difficult to design and manufacture digital filters and shift registers so that they can always operate stably and optimally in response to clock pulses of a wide range of frequencies. For this reason, only digital filters with simple circuit configurations can be used, and it has been difficult to set arbitrary frequency characteristics. SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and provide a new musical tone generating device that is easy to design and manufacture and can easily produce a desired musical tone. The musical tone generating device according to the present invention includes a data circulation means, a storage device, a writing means, and a reading means. The data circulation means circulates digital waveform data for at least one cycle of the musical sound waveform through a digital filter and a delay means connected in a closed loop. clock speed and in the delay means said at least one clock speed.
It is configured to obtain a delay time corresponding to the period. The writing means sequentially writes the digital waveform data passed through the digital filter and the delay means into the storage device at the constant clock speed. The reading means sequentially reads the digital waveform data from the storage device at a clock speed corresponding to the frequency of the musical tone to be generated within a range not exceeding the predetermined clock speed. Musical tones are generated based on digital waveform data read out by the reading means. According to the configuration of the present invention, since the digital filter etc. is driven by a clock pulse of a constant frequency, it is possible to use any configuration as the digital filter so as to obtain the desired frequency characteristics, and it is possible to use a digital filter with a complex circuit configuration. But it's easy to use. This makes it possible to freely set the timbre change characteristics of musical sounds. Hereinafter, the present invention will be described in detail with reference to embodiments shown in the accompanying drawings. FIG. 1 is a block diagram showing an embodiment of the present invention, in which block 1 surrounded by dotted lines is a waveform memory, 2 is a signal selector, and 3 is a first-in/first-out memory (hereinafter referred to as
(abbreviated as FIFO), 4 is shift register (SR),
Block 5 surrounded by a dotted line is a digital filter,
6 is a sound system. Waveform data generated from the waveform memory 1 is repeatedly circulated through a data circulation path including a selector 2, a digital filter 5, and a shift register 4, and from the selector 2, waveform data representing a waveform that changes over time is circulated. is sent out and written to FIFO3. The waveform memory 1 includes three types of waveform memories 11, 12, and 13 that store different tone waveforms, multiplication circuits 14, 15, and 16, and an addition circuit 17, and reads out the waveforms from the waveform memories 11, 12, and 13. The obtained waveform data have coefficients (A ₀ ) 140 and (A ₂ ) 1, respectively.
50 and (A ₃ )160 to adjust the weight, and then added by the adding circuit 17 and output. Therefore, without changing the waveform memories 11, 12, 13, the coefficients (A ₁ ) 140, (A ₂ ) 15
By changing 0 and (A ₃ ) 160, the output musical sound waveform can be changed as appropriate. As a numerical example for explanation, waveform memories 11, 12, and 13 consisting of ROM (read-only memory) each contain 16-bit (positive and negative) amplitude values at each sample point obtained by dividing one cycle of a musical sound waveform into 1024 equal parts. It is assumed that 1024 words expressed in binary code (including the code) are stored in the phase order of the sample points. In this way, the ROMs 11 to 13 all have a capacity of 1024 words x 16 bits, and therefore the shift register 4 also has a capacity of 1024 words x 16 bits. Note that FIFO3 has a capacity of 64 words x 16 bits. In FIG. 1, the digital filter 5 includes a shift register (SR) 51, a multiplier circuit 52, and a multiplier circuit 52.
The multiplication parameters (P) 520 and (Q) 540 are given from outside the circuit shown in FIG. 1. The selection signal (S) 21 is a signal for selecting which of the output from the waveform memory 1 or the output from the shift register 4 is input to the FIFO 3, and is applied from outside the circuit shown in FIG. It will be done. This selection signal (S)
21, the selector 2 selects and sends out the output data of the waveform memory 1 from the start of musical tone generation until the waveform memory 1 generates waveform data for one cycle of the musical waveform, and thereafter selects and sends out the output data of the waveform memory 1. Selectively send out cyclic waveform data. The waveform data sent from selector 2 is
Written to FIFO3. Then, waveform data is read out from the FIFO 3 at a rate corresponding to the pitch of the musical tone to be generated, and this read data is input to the sound system 6 and subjected to D/A conversion, acoustic conversion, etc. to produce the desired musical tone. is generated. 80 is a master clock generator, 81 is an AND gate, 82 is a frequency divider, 83 is an address counter,
86 is a reset-set (R-S) type flip-flop; 501 is a read clock pulse generator;
502 and 503 are pulse counters, respectively. Assuming that 16-bit time is used for 16-bit calculations in the waveform memory 1 and digital filter 5, and if the output pulse _φ0 of the master clock generator 80 is used as the clock pulse for the above calculation, then the clock pulse φ0 is 1/16 of the frequency of _φ0 . Arithmetic processing for 16 bits (one word) is performed at the frequency and output from the selector 2. Therefore, if the output pulse P ₅₀₂ obtained by dividing the frequency of φ ₀ to 1/16 by the frequency divider 82 is used as the writing clock pulse for FIFO 3, it is possible to write to FIFO 3 every time one word of the waveform is calculated. can. Also frequency divider 8
The address counter 83 counts the outputs of 2 and outputs the parallel outputs as addresses of the ROMs 11-13. Furthermore, the output of the frequency divider 82 is supplied to the shift register 4 as a shift clock. The read clock pulse generator 501 generates pulses with a frequency proportional to the fundamental frequency f of the musical tone to be generated.
Generate _P503 and read FIFO3. If the number of sample points (words) in one cycle of the waveform is as shown in the numerical example above,
1024, the frequency of the read clock pulse _P503 is 1024f. The read clock pulse generator 501 may be any pulse generator, but in the design example shown in FIG. OCC) 800 inputs the output pulses of the master clock generator 80 and outputs a reading clock pulse P ₅₀₃ having a frequency proportional to the fundamental frequency f of the musical tone to be generated. Note code (NTC) 500 is a signal indicating which of the 12 notes in one octave the musical tone to be generated is, and octave code (OCC) 800 is a signal indicating the octave to which the musical tone to be generated belongs. This is a signal that represents FIG. 2 is a time chart showing the write and read timings of FIFO 3 shown in FIG. In FIFO3, reading is performed in the order of writing. When reading of the last written data is completed by the reading clock pulse numbered "64" of waveform P ₅₀₃ in FIG. is set, and the output _Q86 of flip-flop 86 turns on AND gate 81. Then, the clock pulse _φ0 is supplied to the waveform memory 1, the digital filter 5, and the frequency divider 82, and the clock pulse φ0 is supplied to the waveform memory 1, the digital filter 5, and the frequency divider 82.
The operations of the ROMs 11 to 13 and the shift register 4 are controlled, whereby a waveform is calculated and written to the FIFO ₃ in response to a write clock pulse P502. Since the frequency of clock pulse P ₅₀₂ is higher than the frequency of clock pulse P ₅₀₃ , the pulse designated by number "1" in waveform P ₅₀₂ always appears earlier than the pulse designated by number "1" in waveform P ₅₀₃ . Therefore, when reading is completed with the pulse number "64" of waveform P ₅₀₃ and the next pulse number "1" of waveform P ₅₀₃ comes, at least one word has already been written. , FIFO3 are read out continuously.
After that, writing and reading are performed in parallel, and the waveform
When a pulse indicated by number "64" of P ₅₀₂ comes and the last write is completed, a pulse is output from the counter 502 to reset the flip-flop 86 and turn the AND gate 81 off. Therefore, FIFO3
Writing to is interrupted, and only reading is performed until the next pulse numbered "64" of waveform P ₅₀₃ occurs. In addition, in order to prevent the flip-flop 86 from being reset before the writing by the number "64" of the write clock pulse P ₅₀₂ is completed, a delay is set between the output of the counter 502 and the reset terminal of the flip-flop 86 as necessary. A circuit may be inserted. In this way, the readout clock pulse spans a wide frequency range proportional to the musical tone frequency to be generated.
By reading FIFO 3 with P ₅₀₃ , it is possible to generate musical tones with varied waveforms over a wide frequency range. As is clear from the above description, in the above embodiment, the musical tone generation operation from the waveform memory 1, the filter calculation operation of the digital filter 5, the shifting operation of the shift register 4, and the writing operation of the musical waveform to the FIFO 3 are constant. Since this is performed using a high frequency clock pulse, circuit design is facilitated and the reliability of circuit operation is improved. By the way, in the above embodiment, by changing the number of words per cycle of waveform data sent from the selector 2 in accordance with the octave, the FIFO
The frequency of the third reading clock pulse P ₅₀₃ can be reduced to a frequency corresponding to 12 tones within one octave. FIG. 3 is a block diagram showing another embodiment of the present invention in which such a word number changing means is added, and the same parts as in FIG. 1 are given the same reference numerals and their explanation will be omitted. The embodiment shown in FIG. 3 differs from the embodiment shown in FIG. 1 in that (1) instead of the shift register 4, a RAM (random access memory) 41 of the same capacity (1024 words x 16 bits) is used; (2) A shift circuit 8 controlled by an octave code (OCC) 800 is provided on the output side of the address counter 83.
(3) The read clock pulse generator 501 is controlled by the note code (NTC) 500. First, a circuit for generating waveform data of the number of words corresponding to the octave of musical tones to be generated will be explained. The shift circuit 85 is provided to appropriately change and control the address designation by the parallel output of the address counter 83 according to the octave code (OCC) 800, and its output is sent to the ROMs 11 to 13.
and is supplied to the RAM 41 as an address signal AD. In addition, the output of the frequency divider 82 is stored in the RAM 41.
P ₅₀₂ is provided as read/write mode control signal R/W. This control signal R/W specifies the read mode in the first half of each period T, and specifies the write mode in the second half. The parallel output of the address counter 83 can specify 1024 addresses for each counting cycle, and the shift circuit 85 directly sends out the parallel output of the address counter 83 as an address signal AD when a specific octave code is given. do. Therefore, as an example, if the address signal AD specifies 1024 addresses sequentially, in the waveform memory 1, one cycle of ROMs 11 to 13 (1024 words)
waveform data are sequentially read out in accordance with the address signal AD. As mentioned above, the selector 2 selects the output of the waveform memory 1 during a period corresponding to one waveform cycle from the start of musical tone generation, so the selector 2 sequentially receives one cycle's worth of waveform data from the waveform memory 1. and on the other hand, it is supplied to FIFO3,
On the other hand, the RAM 41 via the digital filter 5
is supplied to In the RAM 41, waveform data for the first period from the digital filter 5 is sequentially written in accordance with the sequential designation of 1024 addresses by the address signal AD (in synchronization with the sequential reading from the ROMs 11 to 13). In this case, one address designation period by the address signal AD corresponds to one period T of the control signal R/W, and in each period, reading is performed in the first half and writing is performed in the second half. Note that the read data is set by selector 2.
Since the output of RAM 41 is not selected, it is not sent from selector 2. When the first cycle of waveform data has been written to the RAM 41 and the second cycle starts, the selector 2 enters a state in which the output of the RAM 41 is selected. Furthermore, the previously written waveform data are sequentially read out from the RAM 41 in the order in which they were written. That is, in the RAM 41, a delay of one waveform cycle is given to the first cycle of waveform data,
The selector 2 outputs cyclically delayed waveform data (data that has passed through the digital filter 5 once) following the end of the first cycle of waveform data. By the way, the data read from the RAM 41 at the start of the second cycle is written to the first address of the RAM 41 again via the digital filter 5. Similarly, for each of the second and subsequent addresses, the read data is written to the same address via the digital filter 5. In this way, writing is performed in the RAM 41 in parallel with reading, and at the end of the second period, one period's worth of waveform data that has passed through the digital filter 5 twice has been written into the RAM 41. Thereafter, from the third period onwards, the circulation of waveform data is repeated by the same read/write operations as described above. Therefore, following the waveform data first generated from the waveform memory 1, the selector 2 passes this waveform data once through the digital filter 5.
The signals are circulated twice, three times, and so on, and then sent out one after another. In such an operation, the coefficient (A ₁ ) 140,
(A ₂ ) 150 and (A ₃ ) 160 are useful for determining the initial waveform, and the multiplication parameter (P) 52
0, (Q) 540 is useful for defining cyclic waveforms. By appropriately selecting these coefficients and parameters, it is possible to obtain a musical sound waveform that changes over time and approximates that of a natural musical instrument. The above is ROM11-13 and RAM41
This is the operation when the number of words to be handled is 1024, but when the shift circuit 85 changes and controls the address designation according to the octave code (OCC) 800, the number of words to be handled is controlled to change in the ROMs 11 to 13 and RAM 41, As a result, the number of words of the waveform data sent from the selector 2 is controlled to be changed in accordance with the octave of the musical tone to be generated. The contents of octave code (OCC) 800,
An example of the shift operation within the shift circuit 85 corresponding to this is shown in FIG. In Figure 4, c ₉ , c ₈ ,...
c ₁ and c ₀ are the parallel outputs of the address counter 83 shown in order from MSB to LSB, and a ₉ , a ₈ , ...a ₁ , a ₀ are
Address input 10 for ROM11-13 and RAM41
The bits are shown in order from MSB to LSB. for example
When OCC is at logic "000", all 10 bits of parallel output _c9 ... _c0 of address counter 83 are output from shift circuit 85, and each address input _a9
...a becomes ₀ . As a result, ROM11-13 and
The RAM 41 is sequentially addressed as 0, 1, 2, etc. up to address 1023, and in this case, the musical waveform 1 is read out.
The number of words in the cycle is 1024. Furthermore, when OCC is at logic "001", the lower 9 bits of the 10 parallel output bits of the address counter 83, that is,
c ₈ , c ₇ , . . . c ₀ are output, and become address inputs a ₉ , a ₈ , . . . a ₁ , respectively, and address input a ₀ becomes logic “0”. Therefore, ROM11 to 13 and
The RAM 41 is sequentially addressed in the order of 0, 2, 4, . . . only even addresses up to 1022 addresses, and the number of words in one cycle of the musical waveform to be read is 512. Similarly,
When OCC is at logic "010", only the lower 8 bits of the 10 parallel output bits of the address counter 83, that is, c ₇ , c ₆ , . . . c ₀ are output, and the address inputs a ₉ , a ₈ , ...a ₂ , and both address inputs a ₁ and a ₀ become logic "0". Therefore, ROM11 to 13 and RAM41 are 0,
Addresses 4, 8, . . . are sequentially addressed at intervals of 4 addresses up to address 1020, and the number of words in one period of the musical waveform to be read is 256. In this way, by controlling the shift circuit 85 to shift the output of the address counter 83 as shown in FIG.
The number of words to be handled by the RAM 41 can be changed and controlled, for example, as shown in Table 1.

[Table] As shown above, for example, the number of words can be changed according to the octave of the musical tone as shown in Table 1.
If input to FIFO 3, all musical tones can be generated using only the frequencies of the 12 tones shown in Table 2 as the frequency of the read clock pulse _P503 .

[Table] For example, when generating a musical tone with a fundamental frequency of 440 [Hz], set OCC to "100" and NTC to "0000", and read out the number of words 64 at a frequency of 28160 [Hz], which equals 28160 [Hz] ÷ 64 440 [Hz] is obtained.
Also, if you leave NTC as is and change OCC to "101", you can read out the number of words 32 at a frequency of 28160 [Hz] and obtain a frequency of 28160 [Hz] ÷ 32 = 880 [Hz]. Additionally, OCC is “111” and NTC is “0011”.
Then, by reading 8 words at a frequency of 33488 [Hz], a frequency of 33488 [Hz] ÷ 8 = 4186 [Hz] is obtained. In this case, the frequency of the write clock pulse P ₅₀₂ for FIFO 3 may be higher than the frequency of the read clock pulse P ₅₀₃ shown in Table 2, for example, 60 [KHz]. Therefore, the frequency of master clock _φ0 is 60
[KHz] x 16 = 960 [KHz]. On the other hand,
In order to generate a musical tone with a frequency of 4186 [Hz] based on waveform data of 1024 words without a means for changing the number of words, a readout clock pulse P ₅₀₃ with a frequency of 4186 [Hz] x 1024 ≒ 4.29 [MHz] is required. shall be. Therefore, if a frequency of 4.3 [MHz] is used as the write clock pulse P ₅₀₂ , the frequency of the master clock _φ0 is 4.3 [MHz] x 16 =
68.8 [MHz], and executing operations in the waveform memory 1 and digital filter 5 using such a high-speed clock is disadvantageous in terms of circuit configuration. As is clear from this numerical example, providing the word number changing means not only has the effect of limiting the type of clock pulse P ₅₀₃ for reading FIFO 3 to 12 notes within one octave, but also has the effect of limiting the type of clock pulse P 503 for reading FIFO ₃ to 12 notes within one octave. It will be understood that this also has the effect of lowering the frequency and facilitating the design of the arithmetic circuit. The signals input from the outside to the circuits shown in Figures 1 and 3 are note code (NTC) 500, octave code (OCC) 800, and coefficient (A ₁ ) 14.
0, (A ₂ ) 150, (A ₃ ) 160, multiplication parameter (P) 520, (Q) 540, selection signal (S) 21
It is. FIG. 5 is a block diagram showing an example of a circuit for outputting these signals, and all of the above-mentioned signals are designated by the same symbols as in FIGS. 1 and 3. In the circuit shown in FIG. 5, the key switches 10(l),...10(k),...1 are operated by the performer.
0(n), and a tone selector 400. In the embodiment of FIG.
(l),...10(k),...10(n) are given priority, and a voltage +V is output to the output line from the key switch that has the highest connection priority among the multiple key switches that are turned on at the same time. , so the key codes for this are note code (NTC) 500 and octave code (OCC) 80.
0 is read from the ROM 120. Also, no matter which key switch is in the on state, a signal representing the on state of the key switch is output from the OR gate 110, the rising point of which is differentiated by the differentiating circuit 170 to become a key-on pulse K _ON representing the point of key-on, and its falling point The point is differentiated by a differentiating circuit 180 to become a key-off pulse K _OFF representing the key-off time, and both are input to a timer 87 . The latch circuit 130 latches the output of the ROM 120 in response to the key-on pulse K _ON , and continues to send out the latched note code (NTC) 500 and octave code (OCC) 800 until the next key-on pulse _{K ON} arrives. As the clock pulse of timer 87, FIFO
A pulse obtained by frequency-dividing the read clock pulse P ₅₀₃ of 3 by a frequency divider 88 having a frequency division ratio controlled by an octave code (OCC) 800 is used.
For example, if the frequency division ratio is 1 when the OCC is "111" and the frequency division ratio is 128 when the OCC is "000", the frequency of the clock pulse input to the timer 87 is approximately equal to the frequency of the generated musical tone. Proportional. The timer 87 uses this clock pulse and determines when the key-on pulse K _ON occurs or when the key-off pulse K ON occurs.
Measure the time based on the point at which _OFF occurs. When a predetermined point in time is reached in such time measurement, a switching signal is sent to the switching circuit 420, and the selection signal (S) 21 is changed to control switching of the selector 2. The RAM 410 stores multiple types of values for A ₁ , A ₂ , A ₃ , P, and Q, and different values are stored depending on the address input from the tone selector 400.
A combination of A ₁ , A ₂ , A ₃ and a combination of P and Q are output. A plurality of combinations of P and Q are simultaneously output and input to the switching circuit 420. Any one of the plurality of combinations of P and Q is selected by the output of the timer 87. As described above, according to the present invention, digital waveform data generated by driving the delay means and digital filter constituting a closed loop at a constant clock speed is written to the memory at the constant clock speed, and the digital waveform data is written from the memory at the constant clock speed. Since digital waveform data is sequentially read out at a clock speed corresponding to the musical tone to be generated, when designing and manufacturing the delay means and digital filter, it is possible to obtain the desired tone without considering large fluctuations in clock speed. A configuration suitable for changing characteristics can be adopted. Therefore, it is possible to generate musical tones that exhibit various timbre changes over time with a simple and inexpensive configuration.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram showing the FIFO write and
Time chart for explaining read operation, Part 3
4 is a diagram for explaining the shift operation of the shift circuit in FIG. 3, and FIG. 5 is a block diagram showing another embodiment of the present invention. FIG. FIG. 2 is a block diagram showing an example of a circuit that generates each signal to be input to the device. 1...Waveform memory, 2...Selector, 3...FIFO,
4...Shift register, 41...RAM, 5...Digital filter, 6...Sound system, 80...Master clock generator, 81...AND gate, 82
... Frequency divider, 83... Address counter, 85... Shift circuit, 86... Flip-flop, 501... Read clock generator, 502, 503... Counter.

Claims (1)

[Scope of Claims] 1 (a) Data circulation means for circulating digital waveform data for at least one period of a musical tone waveform through a digital filter and a delay means connected in a closed loop, the data circulation means including the digital filter and the delay means connected in a closed loop. (b) a storage device; (c) a storage device; (b) a storage device; (c) a storage device; (d) writing means for sequentially writing the digital waveform data that has passed through the filter and the delay means into the storage device at the constant clock speed; The present invention is characterized by comprising a reading means for sequentially reading digital waveform data from the storage device at a clock speed corresponding to the frequency, and generating musical tones based on the digital waveform data read by the reading means. Musical sound generator.