JPS6237338U - - Google Patents
Info
- Publication number
- JPS6237338U JPS6237338U JP12531085U JP12531085U JPS6237338U JP S6237338 U JPS6237338 U JP S6237338U JP 12531085 U JP12531085 U JP 12531085U JP 12531085 U JP12531085 U JP 12531085U JP S6237338 U JPS6237338 U JP S6237338U
- Authority
- JP
- Japan
- Prior art keywords
- display
- processor
- video signal
- information
- stores
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 6
- 230000006870 function Effects 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 1
Landscapes
- Input From Keyboards Or The Like (AREA)
Description
第1図は本考案の一実施例に係る表示装置を示
すブロツク結線図、第2図は伝送データ形式の一
実施例を示す図、第3図は従来の表示装置の一例
を示すブロツク結線図、第4図はカーソル記号の
表示例を示す図、第5図はキーボード8上にある
機能キーの一部を示す図、第6図は機能キーF1
〜F12の機能を表わす図である。
図において、1はプロセツサ、2はメモリ、3
はリフレツシユメモリ、4は映像信号生成回路、
5は陰極線管、6は表示制御回路、9は共通バス
、10は通信制御回路、11は通信回線、12は
ホスト計算機である。なお、図中、同一符号は同
一又は相当部分を示す。
Fig. 1 is a block wiring diagram showing a display device according to an embodiment of the present invention, Fig. 2 is a diagram showing an embodiment of the transmission data format, and Fig. 3 is a block wiring diagram showing an example of a conventional display device. , FIG. 4 is a diagram showing a display example of a cursor symbol, FIG. 5 is a diagram showing a part of the function keys on the keyboard 8, and FIG. 6 is a diagram showing a part of the function keys on the keyboard 8.
- It is a figure showing the function of F12. In the figure, 1 is a processor, 2 is a memory, and 3 is a processor.
4 is a refresh memory, 4 is a video signal generation circuit,
5 is a cathode ray tube, 6 is a display control circuit, 9 is a common bus, 10 is a communication control circuit, 11 is a communication line, and 12 is a host computer. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.
補正 昭61.8.6
実用新案登録請求の範囲を次のように補正する
。Amendment August 6, 1981 The scope of claims for utility model registration is amended as follows.
【実用新案登録請求の範囲】
プロセツサと、該プロセツサを作動させるモニ
タおよびアプリケーシヨンプログラムを記憶する
メモリと、上記プロセツサの指令に基づき画面表
示形式を変更させる表示制御回路と、文字・図形
等の表示情報を記憶するリフレツシユメモリと、
リフレツシユメモリから読出された出力信号を映
像信号に変換する映像信号生成回路と、該変換映
像信号を視覚化する表示部とを備えた表示装置に
おいて、画面表示形式を特定する各表示情報を選
択指令する為の情報を画面表示形式毎に認識番号
を符して記憶したホスト計算機と、キー入力装置
よりキー入力された認識番号をホスト計算機へ伝
送すると共に、該当選択指定情報を上記プロセツ
サへ通信回線を介して伝送する通信制御回路を備
えたことを特徴とする表示装置。[Claims for Utility Model Registration] A processor, a monitor that operates the processor, a memory that stores an application program, a display control circuit that changes the screen display format based on commands from the processor, and a display of characters, figures, etc. Refresh memory that stores information,
In a display device equipped with a video signal generation circuit that converts an output signal read from a refresh memory into a video signal and a display unit that visualizes the converted video signal, select each display information that specifies the screen display format. The host computer stores the information for commands with identification numbers marked for each screen display format, and transmits the identification numbers keyed in from the key input device to the host computer, and also communicates the corresponding selection designation information to the processor. A display device comprising a communication control circuit that transmits data via a line.
Claims (1)
タおよびアプリケーシヨンプログラムを記憶する
メモリと、上記プロセツサの指令に基づき画面表
示形式を変更させる表示制御回路と、文字・図形
等の表示情報を記憶するリフレツシユメモリと、
リフレツシユメモリから読出された出力信号を映
像信号に変換する映像信号生成回路と、該変換映
像信号を視覚化する表示部とを備えた表示装置に
おいて、画面表示形式を特定する各表示情報を選
択指定する為の情報を画像表示形式毎に認識番号
を符して記憶したホスト計算機と、キー入力装置
よりキー入力された認識番号をホスト計算機へ伝
送すると共に、該当選択指定情報を上記プロセツ
サへ通信回路を介して伝送する通信制御回路を備
えたことを特徴とする表示装置。 A processor, a monitor that operates the processor, a memory that stores an application program, a display control circuit that changes the screen display format based on commands from the processor, and a refresh memory that stores display information such as characters and graphics. ,
In a display device equipped with a video signal generation circuit that converts an output signal read from a refresh memory into a video signal and a display unit that visualizes the converted video signal, select each display information that specifies the screen display format. A host computer stores information for specifying a recognition number for each image display format, transmits the recognition number keyed in from a key input device to the host computer, and transmits corresponding selection designation information to the processor. A display device comprising a communication control circuit that transmits data via a circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12531085U JPS6237338U (en) | 1985-08-15 | 1985-08-15 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12531085U JPS6237338U (en) | 1985-08-15 | 1985-08-15 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6237338U true JPS6237338U (en) | 1987-03-05 |
Family
ID=31018097
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12531085U Pending JPS6237338U (en) | 1985-08-15 | 1985-08-15 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6237338U (en) |
-
1985
- 1985-08-15 JP JP12531085U patent/JPS6237338U/ja active Pending
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