JPS623606B2 - - Google Patents

Info

Publication number
JPS623606B2
JPS623606B2 JP9239082A JP9239082A JPS623606B2 JP S623606 B2 JPS623606 B2 JP S623606B2 JP 9239082 A JP9239082 A JP 9239082A JP 9239082 A JP9239082 A JP 9239082A JP S623606 B2 JPS623606 B2 JP S623606B2
Authority
JP
Japan
Prior art keywords
waveguide
amplifier
matching
metal block
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP9239082A
Other languages
Japanese (ja)
Other versions
JPS58221508A (en
Inventor
Toshiro Sakane
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9239082A priority Critical patent/JPS58221508A/en
Priority to CA000428572A priority patent/CA1203617A/en
Priority to DE8383303083T priority patent/DE3381864D1/en
Priority to EP19830303083 priority patent/EP0102686B1/en
Publication of JPS58221508A publication Critical patent/JPS58221508A/en
Publication of JPS623606B2 publication Critical patent/JPS623606B2/ja
Granted legal-status Critical Current

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  • Microwave Amplifiers (AREA)

Description

【発明の詳細な説明】 発明の技術分野 本発明は、導波管を用いた伝送路の途中に挿入
される高周波電力増幅器に関し、特に導波管内蔵
型として小型化、安定化、低損失化などを図ろう
とするものである。
[Detailed Description of the Invention] Technical Field of the Invention The present invention relates to a high-frequency power amplifier inserted in the middle of a transmission line using a waveguide, and in particular to a built-in waveguide type that is miniaturized, stabilized, and has low loss. This is an attempt to achieve the following.

従来技術と問題点 導波管を用いた伝送路の途中で使用する電力増
幅器は、挿入点における導波管との結合が問題と
なる。即ち従来は第1図に示すようにマイクロ波
集積回路(MIC)の増幅器1はその入出力側にそ
れぞれモード変換用のリツジ導波管2,3を介在
させて伝送路用の導波管4,5に挿入している
が、この方式では導波管2,3挿入に伴なうスペ
ースの増大およびモード変換ロス、さらに、導波
管2,3と増幅器1との接続は増幅器入出力端の
導体片1cを導波管2,3のリツジ2a,3aに
当接させるだけなのでその接続(圧接)部の信頼
性が問題となる。尚、1bはFET等の増幅素子
である。
Prior Art and Problems A power amplifier used in the middle of a transmission line using a waveguide has a problem with coupling with the waveguide at the insertion point. That is, conventionally, as shown in FIG. 1, an amplifier 1 of a microwave integrated circuit (MIC) has a mode conversion waveguide 2, 3 interposed on its input and output sides, and a waveguide 4 for a transmission line. , 5, but this method requires an increase in space and mode conversion loss due to the insertion of the waveguides 2 and 3. Furthermore, the connection between the waveguides 2 and 3 and the amplifier 1 is connected to the input and output terminals of the amplifier. Since the conductor piece 1c is simply brought into contact with the ridges 2a and 3a of the waveguides 2 and 3, the reliability of the connection (pressure contact) becomes a problem. Note that 1b is an amplification element such as an FET.

発明の目的 本発明は導波管内部に増幅器を内蔵し、増幅器
入出力端と導波管内電磁界との結合はアンテナに
よることとして上述した問題点を解決しようとす
るものである。
OBJECTS OF THE INVENTION The present invention attempts to solve the above-mentioned problems by incorporating an amplifier inside a waveguide, and coupling between the input and output terminals of the amplifier and the electromagnetic field inside the waveguide is performed by an antenna.

発明の構成 本発明は、信号伝送路を構成する導波管の内部
に配置され、該増幅器用導波管内に固定された金
属ブロツクと、該金属ブロツク上に固定された誘
電体基板と、該基板の表面に形成された1対のス
トリツプ状導体およびその先端の受信用および送
信用アンテナと、該1対の導体がそれぞれ入力お
よび出力端子に接続される増幅素子と、該基板の
裏面に設けられそして前記導体と共に前記増幅素
子の整合用のマイクロストリツプ線路を構成しか
つ先端部は先細になつて該アンテナのインピーダ
ンス整合をとる裏面パターンとを備えてなること
を特徴とするが、以下図面を参照しながらこれを
詳細に説明する。
Structure of the Invention The present invention comprises a metal block disposed inside a waveguide constituting a signal transmission path and fixed within the amplifier waveguide, a dielectric substrate fixed on the metal block, and a dielectric substrate fixed on the metal block. A pair of strip-shaped conductors formed on the front surface of the substrate, receiving and transmitting antennas at the tips thereof, an amplifying element to which the pair of conductors are connected to input and output terminals, respectively, and an amplifier provided on the back surface of the substrate. and a back surface pattern which forms a microstrip line for matching the amplification element together with the conductor and has a tapered tip and matches the impedance of the antenna. This will be explained in detail with reference to the drawings.

発明の実施例 第2図は本発明の一実施例を示す概略図で、1
0は信号伝送路を構成する導波管4,5の間に挿
入される短い導波管、11は導波管10の底面1
0aに固定された金属ブロツク、12はその上部
に固定されたMIC構造の高周波電力増幅器、1
3,14は増幅素子に対するバイアス用の端子で
ある。第3図は増幅器12の詳細図で、20は増
幅素子(例えばパツケージ型FET)、21,22
は2分割された誘電体基板(1枚の基板中央に素
子20を搭載してもよい)、23,24は表面パ
ターン(導体)、25は裏面パターン(導体24
側にもある)である。
Embodiment of the invention FIG. 2 is a schematic diagram showing an embodiment of the invention.
0 is a short waveguide inserted between waveguides 4 and 5 constituting the signal transmission path, 11 is the bottom surface 1 of the waveguide 10
0a is a fixed metal block, 12 is a high frequency power amplifier with a MIC structure fixed on the top thereof, 1
3 and 14 are bias terminals for the amplification element. FIG. 3 is a detailed diagram of the amplifier 12, in which 20 is an amplifying element (for example, a package type FET), 21, 22
is a dielectric substrate divided into two parts (the element 20 may be mounted in the center of one board), 23 and 24 are surface patterns (conductors), and 25 is a back surface pattern (conductor 24).
It is also on the side).

表面パターン23,24の基部即ち増幅素子2
0側は裏面パターン25と共に第5図に示す如き
マイクロストリツプ線路を構成し、先端はそれぞ
れ送信用、受信用アンテナとなる。FET20の
ゲート電極Gおよびドレイン電極Dは表面パター
ン23,24の基部に半田付けまたはワイヤボン
デイング等で接続される。この表面パターン2
3,24の基部には整合調整素子27,28が設
けられ、FET20との間の正確なインピーダン
ス整合用に利用される。即ち増幅素子は同じ規格
のものでもSパラメータに変動があり、周波数
対利得G特性が第6図のC2のように予定特性C1
からずれることがある。これを補正するには第3
図に小四角で示した複数個の導体薄膜を適宜表面
パターン23,24にワイヤボンデイングし、裏
面パターンとの静電容量を調整するとよい。第4
図は等価回路図で、−Vgはゲート電極Gに対する
負のバイアス電圧、+Vdはドレイン電極Dに対す
る正のバイアス電圧である(ソース電極Sは金属
ブロツク11を通して接地される)。尚、チヨー
ク29,30は表面パターン23(24も同様)
の分岐パターン31によるものである。
The base of the surface patterns 23 and 24, that is, the amplification element 2
The zero side constitutes a microstrip line as shown in FIG. 5 together with the back pattern 25, and the tips serve as transmitting and receiving antennas, respectively. The gate electrode G and drain electrode D of the FET 20 are connected to the bases of the surface patterns 23 and 24 by soldering, wire bonding, or the like. This surface pattern 2
Matching adjustment elements 27 and 28 are provided at the bases of the FETs 3 and 24, and are used for accurate impedance matching with the FET 20. In other words, even if the amplifying element is of the same standard, the S parameter will vary, and the frequency vs. gain G characteristic will be the expected characteristic C 1 as shown in C 2 in Figure 6.
It may deviate from the To correct this, the third
It is preferable to wire-bond a plurality of conductor thin films indicated by small squares in the figure to the front surface patterns 23 and 24 as appropriate to adjust the capacitance with the rear surface patterns. Fourth
The figure is an equivalent circuit diagram, where -Vg is a negative bias voltage for the gate electrode G, and +Vd is a positive bias voltage for the drain electrode D (the source electrode S is grounded through the metal block 11). In addition, the surface patterns 29 and 30 are the surface patterns 23 (24 is the same)
This is due to the branch pattern 31.

テーパ状の裏面パターン25の先端部は、表面
パターン23をアンテナとして効率よく作用させ
るためのインピーダンス調整用である。通常の
MIC構造では裏面は一様なアースパターンである
が、本例ではここを先細のパターン25として表
面パターン23に対する容量を調整し(先端側か
らみて漸増するようにし)、反射の少ない最適な
整合状態を得るようにしている。
The tip of the tapered back pattern 25 is used for impedance adjustment so that the front pattern 23 can efficiently function as an antenna. normal
In the MIC structure, the back surface has a uniform ground pattern, but in this example, this is a tapered pattern 25, and the capacitance with respect to the surface pattern 23 is adjusted (gradually increasing when viewed from the tip side) to achieve an optimal matching state with less reflection. I'm trying to get it.

発明の効果 以上述べた本発明の高周波電力増幅器には次の
利点がある。(1)モード変換用の2本のリツジ導波
管が不要となるのでスペースが少なくて済む。(2)
テーパ状の裏面パターンおよび表面パターンによ
るマイクロストリツプ整合回路を用いるので増幅
素子への入出力が効率よくなされる。(3)増幅器と
伝送路との間はアンテナ結合であるから接触不良
などの問題がなく、接続部の信頼性が高い。(4)増
幅器を多段に接続する場合は増幅器内蔵導波管1
0を複数個縦続接続すればよく、結合はアンテナ
結合であつて直流カツト機能があるから、トラン
ジスタ多段接続の場合のように別途に直流(バイ
アス)カツト用の容量を用いる必要がない。
Effects of the Invention The high frequency power amplifier of the present invention described above has the following advantages. (1) Since two rigid waveguides for mode conversion are not required, less space is required. (2)
Since a microstrip matching circuit with a tapered back surface pattern and front surface pattern is used, input and output to and from the amplifying element can be performed efficiently. (3) Since the amplifier and the transmission line are connected by antenna coupling, there are no problems such as poor contact, and the reliability of the connection is high. (4) When connecting amplifiers in multiple stages, waveguide with built-in amplifier 1
It is sufficient to connect a plurality of 0's in cascade, and since the coupling is antenna coupling and has a DC cut function, there is no need to use a separate DC (bias) cut capacitor as in the case of multi-stage transistor connections.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の高周波電力増幅器の一例を示す
構成図、第2図は本発明の一実施例を示す概略
図、第3図a,bは要部の平面図および側面図、
第4図は等価回路図、第5図はマイクロストリツ
プ線の概略斜視図、第6図は周波数利得特性図で
ある。 図中、4,5は伝送路用の導波管、10は増幅
器用導波管、11は金属ブロツク、12は高周波
電力増幅器、13,14はバイアス端子、20は
増幅素子、21,22は誘電体基板、23,24
は表面パターン、25は裏面パターン、27,2
8は整合調整回路である。
FIG. 1 is a configuration diagram showing an example of a conventional high-frequency power amplifier, FIG. 2 is a schematic diagram showing an embodiment of the present invention, and FIGS. 3 a and 3 are a plan view and side view of the main parts.
FIG. 4 is an equivalent circuit diagram, FIG. 5 is a schematic perspective view of a microstrip line, and FIG. 6 is a frequency gain characteristic diagram. In the figure, 4 and 5 are waveguides for transmission paths, 10 is an amplifier waveguide, 11 is a metal block, 12 is a high frequency power amplifier, 13 and 14 are bias terminals, 20 is an amplification element, and 21 and 22 are Dielectric substrate, 23, 24
is the front pattern, 25 is the back pattern, 27,2
8 is a matching adjustment circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 信号伝送路を構成する導波管の内部に配置さ
れ、該増幅器用導波管内に固定された金属ブロツ
クと、該金属ブロツク上に固定された誘電体基板
と、該基板の表面に形成された1対のストリツプ
状導体およびその先端の受信用および送信用アン
テナと、該1対の導体がそれぞれ入力および出力
端子に接続される増幅素子と、該基板の裏面に設
けられそして前記導体と共に前記増幅素子の整合
用のマイクロストリツプ線路を構成しかつ先端部
は先細になつて該アンテナのインピーダンス整合
をとる裏面パターンとを備えてなることを特徴と
する高周波電力増幅器。
1. A metal block placed inside a waveguide constituting a signal transmission path and fixed within the amplifier waveguide, a dielectric substrate fixed on the metal block, and a dielectric substrate formed on the surface of the substrate. a pair of strip-shaped conductors and receiving and transmitting antennas at their tips; an amplifying element to which the pair of conductors are connected to input and output terminals, respectively; 1. A high frequency power amplifier comprising a microstrip line for matching an amplifying element, and a back pattern having a tapered tip and matching the impedance of the antenna.
JP9239082A 1982-05-31 1982-05-31 High frequency power amplifier Granted JPS58221508A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP9239082A JPS58221508A (en) 1982-05-31 1982-05-31 High frequency power amplifier
CA000428572A CA1203617A (en) 1982-05-31 1983-05-20 Device for distributing and combining microwave electric power
DE8383303083T DE3381864D1 (en) 1982-05-31 1983-05-27 DEVICE FOR DISTRIBUTING AND / OR COMBINING MICROWAVE POWER.
EP19830303083 EP0102686B1 (en) 1982-05-31 1983-05-27 Device for distributing and/or combining microwave electric power

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9239082A JPS58221508A (en) 1982-05-31 1982-05-31 High frequency power amplifier

Publications (2)

Publication Number Publication Date
JPS58221508A JPS58221508A (en) 1983-12-23
JPS623606B2 true JPS623606B2 (en) 1987-01-26

Family

ID=14053089

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9239082A Granted JPS58221508A (en) 1982-05-31 1982-05-31 High frequency power amplifier

Country Status (1)

Country Link
JP (1) JPS58221508A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2698883B2 (en) * 1989-12-05 1998-01-19 三菱電線工業株式会社 Insulated wire

Also Published As

Publication number Publication date
JPS58221508A (en) 1983-12-23

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