JPS623605B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit for applying a bias voltage to the input terminals of a differential amplifier.

In the case of a differential amplifier, unlike a general amplifier, in addition to the differential signal component to be amplified, an unnecessary common-mode signal component must also be taken into account as an input signal. Therefore, the dynamic range of the differential amplifier requires the amplitude of "differential signal component + common mode signal component".

Usually, it is also possible to secure the dynamic range for the common mode signal up to the power supply voltage of the amplifier by forming a common mode negative feedback circuit inside the differential amplifier. On the other hand, it is not uncommon for the amplitude of the common-mode signal component to exceed the amplitude of the differential signal component, and it is not uncommon for the amplitude to exceed the power supply voltage of the differential amplifier. In such cases, it is often impossible and uneconomical to ensure input dynamics range up to the amplitude of unnecessary in-phase signal components.

This invention applies the necessary bias voltage to the input terminals of the differential amplifier, detects only the common-mode signal component applied to the differential amplifier, and compares it with a reference voltage, so that the potential of the input terminals is in the same phase. A differential amplifier that makes it possible to secure the dynamic range for the common-mode signal component, which is the drawback of the conventional method, by preventing changes due to signal components and controlling the voltage to maintain a preset voltage. The purpose is to provide

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram showing one embodiment thereof. In the figure, 1 and 2 are transistors, which constitute the differential amplifier. 3 is a power supply that provides a reference voltage, and 4 is a power supply that amplifies the difference between the potential at connection point 15 in the differential amplifier and the voltage at reference voltage 3, and generates a potential change in the same phase as the potential change at connection point 15. It is an error amplifier designed to output
It is connected to input points 13 and 14 of the differential amplifier together with constant current power supplies 9 and 10 via transistors 11 and 12 to form a negative feedback loop. 17,1
8 is a coupling capacitor, and 5, 6, 7, and 8 are bias resistors.

The bias voltage at the input points 13 and 14 of the differential amplifier is detected at the connection point 15 through the transistors 1 and 2 and the resistors 7 and 8, and compared with the voltage of the reference voltage 3, the bias voltage is detected through the error amplifier 4 and the transistors 11 and 12. The voltage is controlled and stabilized when the potential at the connection point 15 and the voltage at the reference voltage 3 match. Therefore, by selecting the voltage of the reference voltage 3 and the potential of the connection point 15, the input point 1 of the differential amplifier
Bias voltages 3 and 14 are set.

1 and 2, 5 and 6, 7 and 8, 9 and 10, 1 in the diagram
If the characteristics of 1 and 12 are the same, then 1
The potentials of 3 and 14 can be sufficiently balanced.
Now, when an in-phase signal component is applied to the terminals 19 and 20 and the potentials at the input points 13 and 14 undergo an in-phase variation, as described above, the variation is
is detected as an in-phase signal component at , is amplified by error amplifier 4, and is applied to input points 13 and 14 in opposite phase via transistors 11 and 12. Through a negative feedback loop, fluctuations in the potential at input points 13 and 14 are suppressed. controlled to prevent. By increasing the loop gain of this feedback loop, potential fluctuations at input points 13 and 14 can be sufficiently suppressed. In other words, if each part of the circuit is balanced in the circuit shown in Fig. 1, and only the common-mode signal component is detected at the connection point 15, then
The voltage of the applied common-mode signal component can be made to be unresponsive to the common-mode signal component applied to the terminals 19 and 20, and the voltage of the applied common-mode signal component is applied across the coupling capacitors 17 and 18, respectively. It will appear as almost the same voltage. Note that since the differential signal component does not appear at the connection point 15, this negative feedback loop does not respond to the differential signal component at the input points 13 and 14, and the amplification of the differential signal component is not hindered. do not have.

As described above, according to the present invention, it is possible to provide the necessary bias voltage to the input terminals of the differential amplifier, and to significantly reduce the need to consider the dynamic range due to the common-mode signal component applied to the differential amplifier. There is an effect.

Even if the coupling capacitors 17 and 18 are replaced with the drive source impedance when driving the differential amplifier,
It can be easily inferred from the previous explanation that the effects of the present invention remain the same. Furthermore, the differential amplifier formed by transistors 1 and 2 in FIG. 1 does not define the shape of the differential amplifier, and the present invention can be applied to general differential amplifiers. .
The present invention is particularly useful in transformerless repeaters inserted into balanced pair lines.

[Brief explanation of the drawing]

FIG. 1 shows an embodiment of the invention. In the figure, 1, 2, 11, 12...transistors,
5, 6, 7, 8... Resistor, 3... Power supply, 4... Error amplifier, 9, 10, 16... Constant current source, 13,
14, 15... connection point, 17, 18... capacitor, 19, 20... input terminal.

Claims (1)

[Claims] 1 first and second constant current sources; first and second transistors connected to the first and second constant current sources, respectively; said first constant current source and said first transistor; a first input terminal connected to a connection point with the collector; and a second input terminal connected to a connection point between the second constant current source and the collector of the second transistor; differential amplification means comprising a pair of transistors whose bases are connected to a second input terminal; each connected to the emitters of the transistors of the differential width means and applied to the first and second input terminals; a detection means for detecting common-mode signal components of the first and second input signals; comparing and amplifying the common-mode signal components detected by the detection means with a reference voltage; and transmitting the results to the first and second transistors; A differential amplifier comprising a comparison amplification means for outputting an output to a base.