JPS623592A - Color video signal reproducing device - Google Patents

Abstract

PURPOSE:To simplify the constitution of a device by building in a time base fluctuation corrector (TBC) that has been used as an outside device connected to VTR up to now, and generating a reference signal within inside. CONSTITUTION:The mixing wave of a modulation luminance signal and a low-pass conversion chrominance signal from a reproducing head 1 is respectively separated at a Y/C separator 2 and the modulation luminance signal, after passed through an FM demodulator 3, is supplied to a storing circuit 41. The low-pass conversion chrominance signal, after separated, is supplied to a storing circuit 42 as it is. With providing a time base corrector which consists of two storing circuits 41 and 42 and a write/read control circuit and performing the write and the read operation at the storing circuits 41 and 42, a demodulation luminance signal (fH+ or -DELTAfH) and a low-pass conversion chrominance signal (fc+ or -DELTAfc CBW), the time base fluctuations of which are eliminated, are outputted respectively as a luminance signal fH and a low-pass conversion chrominance signal (fc CBW). Also, by providing a reference oscillator and a synchronizing signal generating circuit which generates a reference horizontal synchronizing signal, a reference vertical synchronizing signal and a reference equivalent pulse from the oscillation output of the reference oscillator, a reproducing color video signal of good quality can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is a video tape recorder (hereinafter referred to as a VTR) that records a signal in which an FM-modulated luminance signal and a low frequency-converted carrier chrominance signal are frequency-multiplexed. This invention relates to a color video signal reproducing device that can be effectively used when converting to Jun Sakura Television I8 during reproduction.

2. Description of the Related Art In a recording medium on which a color video signal is recorded at high density, such as a magnetic tape of a VTR, an FM-modulated luminance signal and a low frequency-converted color signal are usually frequency-multiplexed and recorded. If uneven rotation of the cylinder motor, capstan motor, impedance roller, reel, etc. or longitudinal vibration or expansion/contraction of the tape occurs, this will cause time axis fluctuations in the reproduced color video signal, and these time axis fluctuations will be reflected on the TV screen. This may appear as bending, uneven coloring, or lack of coloring. The output signal of a VTR includes relatively large fluctuations in the time axis, and two methods have conventionally been used to remove this fluctuation in the time axis and obtain a stable color video signal.

One is a method that utilizes the A, FC, and APC characteristics of color monitor televisions to visually obtain images with no time axis fluctuations, and the other is a method that fundamentally removes time axis fluctuations from the video signal. .

The former method is shown in FIG. 4, but in the following explanation,
The horizontal synchronization frequency fl+, l side for the luminance signal and color signal to be processed. It is expressed by the transmission frequency fsc and the low-pass conversion color subcarrier frequency fc. If the amount of time-axis variation of the reproduced color video signal is ±Δt, and the time-axis variation frequency is fj, the following equation holds true.

Rib=Ac=-sign parallel=2πfjΔt fIIfc fsc Here, ±Δfu, ±Δfc, and ±Δfsc are the frequency fluctuation amounts of each of the signals. Also, the carrier color signal band is ±C
As SW, the carrier color signal is expressed as fsc±CBW.

First, a signal with time axis fluctuations reproduced from the video head 1 is separated into an FM modulated luminance signal and a low frequency conversion color signal (fc±Afc 1,000 CBW) by a YC separator 2, and then sent to an FM demodulator 3 for frequency conversion. are respectively supplied to the container 4. The FM modulated luminance signal is demodulated into a demodulated luminance signal (fo±Δfu), which is supplied to the adder 5. On the other hand, the low-frequency conversion color signal (f
c±Δfc壬Csw) is the carrier color signal (fscf CBw
), and the frequency fluctuation amount ±Δfc
is canceled out. This process takes place in a loop described below.

First, the color burst extracted by the burst gate 8 from the carrier color signal frequency-converted by the frequency converter 4 is
If the frequency fluctuation of Δfc remains, the phase comparator 9 uses the internal XCO 7 (crystal oscillator with frequency fsc, NTSC
In the case of this method, an error voltage proportional to the frequency difference with the oscillation output (fsc=3.58 MHz), that is, ±Δfc, is generated. This voltage causes the oscillation output of the frequency controlled oscillator 10 to be (
It oscillates at a frequency of fc±Δfc). Therefore, the oscillation output (fc±Δfe) and the oscillation output fsc from the XCO7
is applied to the frequency converter 11, and its output is (fsc
+fc±Δfc), and becomes a signal containing exactly the same temporal fluctuation as the low-frequency conversion color signal (fc±Δfc壬Cnw) reproduced from the video head 1. By adding these to the frequency converter 4, a stable carrier color signal (fsc±C0W) can be obtained. The tape feeding speed is controlled by a servo circuit 15 that uses a control signal obtained from the tape by a control head 14 and a frame frequency obtained by dividing a vertical synchronization signal generated by a vertical synchronization signal generator 12 by a flip-flop 13. Compare, capstan motor 16
This is done by controlling the rotational speed of the The frequency-converted carrier color signal (fsc
+CBw) and the demodulated luminance signal (fu±Δfu) after passing through the FM demodulation circuit 3 are added by an adder 5 and output as a reproduced color video signal.

As can be seen from FIG. 4, the reproduced color video signal output to the terminal 6 includes time axis fluctuations as is, but the color burst signal maintains the oscillation frequency fsc of the XCO 7,
The color monitor's AFC and APC provide a visually stable reproduced color video signal. Although the color video signal reproduced by the method described above is color-locked on the color monitor, a dot interleave relationship (for example, in the case of an NTSC television signal, fsc-=(45
5/2) fti) is lost, and if dubbing from one tape to another is repeated, the time axis fluctuations will be added and the playback screen will deteriorate.

Therefore, the latter method is used to obtain a high quality reproduced color video signal. The latter method uses a reproduction head 1, a YC separator 2, an FM demodulator 3, an adder 5, frequency converters 4 and 11, a burst gate 8, a phase comparator 9,
In addition to the recording and reproducing section 30 consisting of a frequency controlled oscillator 10, a flip-flop 13, a servo circuit 15, a capstan motor 16, and a control head 14, an input terminal 21,
Memory circuit 22, output terminal 29, write clock/address generator 23, read clock address generator 24
, a synchronization signal generator 25, an advanced composite synchronization signal generator 26, a horizontal synchronization separation circuit 17, a carrier generation circuit 18,
Reference synchronization signal input terminal 27, reference color subcarrier input terminal 2
8. A time base collector 31 (hereinafter referred to as TBC) consisting of a color subcarrier output terminal 19 and an advanced composite synchronization signal output terminal 20 is required, and the difference in configuration from FIG. Note that in FIG. 5, the same parts as those in FIG. 4 are given the same reference numerals and symbols, and a description thereof will be omitted. Among the color video signals output from the adder 5, the luminance signal has a frequency (fu
±Δfu).

The TBC 31 inputs the color video signal from the terminal 21, separates the synchronization signal in the horizontal synchronization separation circuit 17, and multiplies its frequency by 455/2 in the carrier generation circuit 18 to generate the same time axis fluctuation as the luminance signal. color subcarrier fsc
Create ±Δfsc= (455/2) (fn±Δfo). This color subcarrier is transmitted from the terminal 19 to the recording/reproducing section 3.
0, and the oscillation output fsc of the XCO7 in FIG.
By replacing with
The luminance signal (fH±Δf++) and the carrier color signal (fsc
±Δfsc±CBw) is added by the adder 5 and then output to the terminal 21. Further, as vertical synchronization signals for controlling the capstan motor 16, a reference synchronization signal inputted from the terminal 27 of the TBC 31 and a base synchronization signal inputted from the terminal 28 are used. A synchronization signal generator 25 generates a composite synchronization signal from the semi-color printing carrier wave, and an advanced composite synchronization signal whose phase is advanced from the composite synchronization signal is generated by an advanced composite synchronization signal generator 26. 13
is supplied through the terminal 20. The main operation of TBC31 is to control the luminance signal Cfu± input through terminal 21.
Δfu) and carrier color signal (fsc±Δfsc±CBw)
A mixed wave of
) will be output to the terminal 29 as a mixed wave, and the method for doing so will be explained below. The write clock address generator 23 receives the luminance signal (fa±Δfu) inputted from the terminal 21 and the carrier color signal (fsc±Δfsc +
A clock and an address having the same time axis fluctuation are created from the mixed wave of Cow ) and are supplied to the storage circuit 22.

As the memory element of the memory circuit 22, an analog memory such as a switched capacitor or CCD, or a digital shift register or RAM (random access memory) is used, but a digital element such as a digital shift register or RAM is used. In this case, the memory circuit 22 has an A/D
, and includes a D/A converter. The memory circuit 22 writes the mixed wave from the terminal 21 using the clock and address having the above-mentioned time axis fluctuation. The synchronization signal generator 25 is connected to the terminal 27
and the reference color subcarrier from terminal 28 to read clock and address generator 24.
The read clock and address generator 24 generates a clock and an address synchronized with the reference synchronization signal and the reference color subcarrier in the same manner as the write clock and address generator 23 and supplies them to the storage circuit 22. ing. By reading out the mixed wave written in the memory circuit 22 using the clock and address synchronized with the reference synchronization signal and the reference color subcarrier, the terminal 29 is synchronized with the reference synchronization signal and the reference color subcarrier, and time axis fluctuations are removed. (For example, Journal of the Society of Television Engineers, Vol. 30, No. 6 (1981) 495-50)
2).

Problems to be Solved by the Invention As explained above, the latter method is necessary to obtain high-quality reproduced color video signals, but with this conventional configuration,
The luminance signal (f
a±Δfn) has the same time axis variation as the reproduction signal input from the reproduction head 1, but the conveyance color signal (fsc±Δ
fsc±CBII) is processed by a closed phase locked loop (hereinafter referred to as PLL) consisting of a burst gate 8, a phase comparator 9, a frequency control oscillator 10, a frequency converter II, and a frequency converter 4. ), the frequency fluctuation of the carrier color signal burst obtained by the frequency converter 4 is controlled so as to match the frequency fluctuation of the color subcarrier having the time axis fluctuation given by the carrier generation circuit 18. The color subcarrier given from this carrier generation circuit 18 is also obtained from the horizontal synchronization signal of the mixed wave supplied to the terminal 21. The frequency signal controlled or created by such a PLL contains a constant steady phase error as jitter due to the delay of the feedback system, and therefore the above-mentioned fsc Δfsc = (4
55/2) (fH±Δfn) is not necessarily established.

In particular, the carrier color signal changes its hue due to phase fluctuations, so the circuit becomes complex in order to obtain the desired characteristics.
The cost will be high. Further, the carrier generation circuit 18 cannot have a high response speed to prevent malfunctions due to dropout of the mixed wave supplied from the terminal 21, and cannot respond to sudden skew distortion or the like. Further, the advanced composite synchronization signal generator 26 and the servo circuit 15 are also configured with a PLL, and the capstan motor 16 is controlled by the terminal 27.
This causes jitter to the reference synchronization signal input from the

It is necessary to increase the storage capacity of the storage circuit 22 in order to sufficiently cope with the delay in response speed and jitter as described above. Furthermore, the writing or reading speed of the memory circuit 22 requires that its clock frequency is twice the maximum frequency of the carrier color signal (fse±Δfsc±CBW) of the mixed wave supplied from the terminal 21, and writing and reading are performed in parallel. If you want to do this, you need to double the speed or capacity. Therefore, the memory circuit 22 needs to be high-speed and large-capacity, which increases the cost.

Because of the above, the latter time axis variation correction method can only be used in the field of broadcasting equipment, which requires reproduction of extremely high quality color video signals from high quality recording tapes and is not concerned with cost. there were.

The present invention solves the above-mentioned problems and provides a color video signal reproducing device that realizes the TBC as described above at low cost and provides a high-quality reproduced signal.

Means for Solving the Problems In order to solve the above problems, the color video signal reproducing device of the present invention includes a reference oscillator, and a reference horizontal synchronizing signal, a reference vertical synchronizing signal, and a reference equivalent pulse from the oscillation output of the reference oscillator. a detection head that detects speed information and phase information of the recording medium, an oscillation output of the reference oscillator, a vertical synchronization signal from the synchronization signal generation circuit, and speed information and phase information from the detection head. It is equipped with at least a control circuit for controlling the playback speed of the recording medium, a time axis corrector consisting of two storage circuits and a write/read control circuit, and the carrier color signal subjected to low frequency conversion and the luminance signal subjected to FM modulation are adjusted in frequency. When reproducing a multiplexed recording medium, the control circuit controls the reproduction speed, performs time axis correction for the carrier color signal in the state of the low-frequency conversion color signal, and performs demodulation after FM demodulation for the luminance signal. It is configured to correct the luminance signal on the time axis.

Operation The present invention simplifies the configuration by incorporating the TBC, which has conventionally been used as an external device connected to a VTR, and by creating a reference signal internally.
Furthermore, for the carrier color signal, a low frequency conversion color signal (fc
By performing time axis correction in the state of +Caw),
Stable PLL with simple circuit configuration and low steady-state phase error
Realize.

Furthermore, it is possible to obtain the same effect as a conventional TBC by using a low-capacity and low-speed storage circuit, and it is possible to realize a color video signal reproducing device that can obtain high-quality reproduced color video signals at a low cost.

Embodiment A color video signal reproducing apparatus according to an embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a system diagram of a color video signal reproducing apparatus according to an embodiment of the present invention.

In FIG. 1, parts corresponding to those in FIG. 5 are designated by the same reference numerals, and their explanation will be omitted. In FIG. 1, the playback heads la, lb and switch 48 represent the conventional playback head 1 in the system diagrams of FIGS. 4 and 5 in more detail. 41.42 are memory circuit (1), memory circuit (2)
), respectively, and the FM demodulated luminance signal Cfu±Δfu),
A low frequency conversion color signal (fc±Δfc+caw) is input. 43 is a write clock/address generator, 46 is a read clock/address generator, and 44 is an XC:O(
45 is a synchronizing signal generator, and 47 is a carrier generation circuit. The control system for the tape feeding speed is the same as that shown in FIG.
G amplifier 51, speed comparator 52, LPF (low pass filter) 53, adder 54, PG head 55, PG amplifier 56, monomulti 57, phase comparator 58, LPF 59,
Integrator 60, motor drive circuit 61, cylinder motor 62
Let's do it.

In the color video signal reproducing apparatus configured as described above, first, a mixed wave of a modulated luminance signal and a low-frequency conversion color signal from the reproduction head 1 is separated by a YC separator 2, and a modulated luminance signal is separated by an FM demodulator 3. After passing through, the memory circuit (1) 41
supplied to The low frequency converted color signal is supplied to the storage circuit (2) 42 as it is after separation. Memory route (1)
41, the input/output and waveforms of each part in the memory circuit (2) 42 are shown in FIG.

The operation of the write clock/address generator 43 is as follows: 1. For example, the horizontal synchronization separation circuit 17 generates a demodulated luminance signal (f
The horizontal synchronization signal H8YNC separated from u±Δfo) is frequency-multiplied to create a clock having the same time axis fluctuation as the mixed wave input from the playback head 1, and several H cycles (LH is Create a write address that repeats the same address in one horizontal period). For example, when IH is divided into n and data is stored, the frequency of the clock is created using PLL so as to be n (fH±Δfa). Memory circuit (1) 41 and memory circuit (2) 42
When a switched capacitor, RAM, etc. is used as a storage element, voltage information of the demodulated luminance signal or low frequency conversion color signal inputted to the memory cell corresponding to the generated address is written. The clock and address generated here have a clock frequency that sufficiently passes the frequency bands of the demodulated luminance signal (f+(±Δfu)) and the low frequency conversion color signal (fc±ΔfcT-COW).

The same address may be used, or the demodulated luminance signal (fa
±Δfa) to low-frequency conversion color signal (fc±Δfc+c
Considering the maximum frequency of t+w), the clock frequency is lowered, and the storage capacity of memory circuit (2) 42 is reduced to that of memory circuit (1) 41.
It may be designed to be smaller than the storage capacity of .

When using a shift register as a storage element for the storage circuit (1) 41 and the storage circuit (2) 42, one with a storage capacity of 3H or more is rotated and used for each IH, and data between L 8 is written. Later, the configuration was configured to read data between L8, and the IH shift register was configured to read data between L8 and
Control is performed so that writing and reading do not overlap in time. In this case, the write clock/address generator 43 only needs to switch the shift register to which writing is performed among several H shift registers for each IH. For example, the shift register may be switched at the rising edge of H3YNC or at the horizontal synchronization Specific timings that do not appear directly on the screen, such as before and after a period, can be created using PLL, and can be performed between IH or a number 1, such as when using RAM.
It is not necessary to manage all address timing between 1 and 1.

The operation of the read clock/address generator 46 is similar to that of the write clock/address generator 45 in terms of address generation, and the only difference is in the operation of writing or reading a memory cell. Further, the read clock CK' and the reference horizontal synchronizing signal HSYNC' which determines the timing of the read address are generated by the synchronizing signal generator 45 from the output of the reference oscillation frequency of the Xc044.

With this operation, memory circuit (1) 41. Memory circuit (2)
By writing and reading at 42, the demodulated luminance signal (fa±Δft1) and the low-frequency conversion color signal (fc±Δft1) are generated.
fc+cF1w) has time axis fluctuations removed and is output as a luminance signal fR and a low-frequency converted color signal (fc+''Csw).The luminance signal f11 is supplied as is to the adder 5, and is output as a low-frequency converted color signal (fc+cnW). ) is the frequency converter 4 and the output from the carrier generation circuit 47 (fsc
+ fc), and the frequency component of the difference (fsc
+COW) is supplied to the adder 5. The luminance signal fn and the frequency-converted carrier color signal (fsc+Cow) are added to the VTR output terminal 29 in an addition ffl5 and output.

The tape feed speed control system is the same as that shown in FIG. 4 or 5 as described above, but the advanced composite synchronization signal input to the flip-flop 13 is a signal that advances the phase of the given reference synchronization signal. Rather than creating it with a PLL, the synchronization signal generator 45 directly creates a composite synchronization signal with a phase that is more advanced than the reference horizontal synchronization signal HSYNC' output to the read clock address generator 46 from the reference oscillation output from the XC○44. are doing. To control the rotation system of the rotating cylinder, first, the FG head 50 generates a signal (hereinafter referred to as FG pulse) with a frequency proportional to the rotation speed of the cylinder motor 62 using a magnetic pole provided on the rotation shaft of the cylinder motor 62. After the pulse is amplified by the FG amplifier 51, the speed comparator 52 detects the rotational speed of the cylinder motor 62 by comparing the frequency with the reference oscillation output from the XC044, and the result is sent to the adder 5 through Ll)F1a.
Supply to 4. On the other hand, the vertical synchronization signal of the advance composite synchronization signal from the synchronization signal generator 45 is divided by the flip-flop 13, and is supplied as a signal 1/2 Vss to the servo circuit 15 that controls the speed of the capstan motor. The signal is supplied to a trapezoidal wave generating circuit 49 for cylinder rotational phase control. The trapezoidal wave creation circuit 49 creates a trapezoidal wave TPZ from the supplied signal 1/2Vss,
A phase comparator 58 is supplied. The PG head 55 detects the magnetic pole attached to the rotating shaft of the cylinder motor 62, and is used to obtain phase information for controlling the phase of the motor and signals for switching the two playback heads la and lb of the rotary head type VTR. used. Figure 3 shows the cylinder motor 62 in Figure 1.
The waveforms of each part of the phase control system are shown. The phase information detected by the PG 55 is amplified by a PG amplifier 56, and then a monomulti 57 outputs a signal H8 for switching between reproduction heads la and lb.
W is created and supplied to the switch 48 for switching the playback head, and also to the phase comparator 58. The phase comparator 58 samples and holds, for example, the trapezoidal wave TPZ at the falling position of the head switching signal H3W, and supplies it to the adder 54 via the LPF 59 as error information on the rotational phase of the cylinder. The adder 54 adds the speed comparison result and the rotational phase error information, integrates the added result in an integrator 60, and supplies it to the motor drive circuit 61, which drives the cylinder motor 6.
Control the speed and phase of 2.

Conventionally, the phase control of the cylinder motor 62 during recording is performed by comparing the phase of the vertical synchronization signal of the color video signal to be recorded and the detection signal from the PG head.
Since the lb switching position is placed in the vertical synchronization period and controlled so that its influence does not appear on the screen, during playback as in the present invention, the phase is lower than the reference synchronization signal created by the synchronization signal generator 45. If the phase of the rotating cylinder is controlled by the vertical synchronization signal of the advanced advanced composite synchronization signal, the demodulated luminance signal (fo±Δfn) and the low The gamut conversion color signal (fc±Δfc Cow) can be controlled so as to lead the reference horizontal synchronizing signal H8YNC′ from the synchronizing signal generator 45 by a certain phase.

In this embodiment, the carrier (fsc+fc) to be supplied to the frequency converter 4 is configured to be generated by the carrier generator 47 from the output of the reference oscillation frequency of the XC044, but after passing through the storage circuit (2) 42. If the time axis correction is not sufficient and you want to control the phase of the carrier color signal after passing through the frequency converter 4, extract the burst part of the carrier color signal from the output of the frequency converter 4 and compare the phase with the reference color subcarrier. However, the frequency and phase of the carrier color signal burst may be controlled to a reference value by a so-called APC operation that controls the frequency or phase of the carrier (fsc+fc) generated by the carrier generation circuit 47 based on the comparison result.

Effects of the Invention As explained above, the present invention includes a reference oscillator, a synchronization signal generation circuit that generates a reference horizontal synchronization signal, a reference vertical synchronization signal, and a reference equivalent pulse from the oscillation output of the reference oscillator, and a detection head that detects information and phase information; a control circuit that controls the playback speed of the recording medium based on the oscillation output of the reference oscillator, the vertical synchronization signal from the synchronization signal generation circuit, and the speed information and phase information from the detection head; When reproducing a recording medium, which is equipped with at least a time axis corrector consisting of two storage circuits and a write/read control circuit, and in which a low frequency-converted carrier color signal and an FM-modulated luminance signal are frequency-multiplexed.

The control circuit controls the playback speed, performs time axis correction on the carrier color signal in the state of the low frequency conversion color signal, and performs time axis correction on the demodulated luminance signal after FM demodulation regarding the luminance signal. Therefore, the fifth
The conventional example shown in the figure corresponds to the time axis variation of the luminance signal (fn±Δfo) of the mixed wave supplied to the storage circuit 22, and the time axis variation of the color subcarrier of the carrier color signal (fsc±Δfsc±Csw). In contrast, in the present invention, the luminance signal (fu±Δfu) and the low-frequency conversion color signal (fu±Δfu) input to the memory circuit (1) and the memory circuit (2) are
Since the time axis fluctuations of fc±Δfc+Csw) completely match, there is little deterioration of the carrier color signal due to the steady phase error of the PLL.

Furthermore, since the accuracy of correction of time axis fluctuations by the memory circuit has conventionally been performed at a high frequency of the color subcarrier frequency fsc for color signals, it is required that the ratio of the phase shift of the color subcarrier frequency to the time axis fluctuations be significantly high. However, in the present invention, as for the color signal, time axis correction is performed for the low-frequency conversion color signal of the low gamut color subcarrier frequency fc, so that the phase shift of the color subcarrier with respect to time axis fluctuation is small and good. Color video signals can be played back. Furthermore, since the frequency of the signal that performs the time axis corrector correction is lower than in the past, the memory element of the memory circuit only needs to be of low speed.
Can be configured at low cost.

In addition, the write clock and address corresponding to the reference synchronization signal are created from the fixed clock that is the output of the reference frequency oscillator 44, and in order to control the tape feeding speed, the phase is advanced from the conventional reference composite synchronization signal by PLL. I was creating an advanced composite synchronization signal, but for example, the XC
A write clock and address can be created by first creating an advance composite synchronization signal using the fixed clock from ○44, and using a signal that is delayed in time as a reference composite synchronization signal. Furthermore, by creating the advanced composite synchronization signal from a fixed clock, the jitter of the reproduced signal with respect to the reference synchronization signal caused by the delay in PLL tracking speed is eliminated, and conventional storage circuits require a storage capacity larger than the width of the jitter. However, the storage capacity can be reduced.

As a result of the above-mentioned effects, the color video signal reproducing device of the present invention can remove time axis fluctuations in the reproduced color video signal with an extremely inexpensive circuit and obtain a high quality color video signal, making it extremely useful in practice. be.

[Brief explanation of drawings]

FIG. 1 is a system diagram of a color video signal reproducing device according to an embodiment of the present invention, FIGS. 2 and 3 are waveform diagrams of each part in FIG. 1, and FIG. 4 is a system diagram of a color video signal reproducing device according to an embodiment of the present invention. FIG. 5 is a system diagram of a second conventional example of a color video signal reproducing apparatus. 1... Playback head, 2... YC separator, 3... FM
demodulator, 4... frequency converter, 5, 54... adder,
13...Flip-flop, 14...Control head, 15...Servo circuit, 16...Capstan motor, 17...Horizontal synchronization separation circuit, 29...Output terminal, 41.Memory circuit (1 ), 42...Memory circuit (2
), 43...Write clock/address generator, 4
4...XC0145...Synchronization signal generator, 46...
Read clock/address generator, 47... Carrier generator, 49... Trapezoidal wave creation circuit, 50... FG head, 51... FG amplifier, 52... Speed comparator,
53゜59...LPF, 55...PG head, 5G
...PG amplifier.

Claims (1)

[Claims] 1. A reference oscillator, a synchronization signal generation circuit that generates a reference horizontal synchronization signal, a reference vertical synchronization signal, and a reference equivalent pulse from the oscillation output of the reference oscillator, and a detection head that detects speed information and phase information of the recording medium; Consisting of a control circuit that controls the playback speed of the recording medium based on the oscillation output of the reference oscillator, a vertical synchronization signal from the synchronization signal generation circuit, and speed information and phase information from the detection head, two storage circuits, and a write/read control circuit. When reproducing a recording medium which is provided with at least a time axis corrector and in which a low frequency-converted carrier color signal and an FM-modulated luminance signal are frequency-multiplexed, the control circuit controls the reproduction speed;
A color video signal reproducing device configured to perform time axis correction on a carrier color signal in the state of a low frequency conversion color signal, and to perform time axis correction on a demodulated luminance signal after FM demodulation regarding a luminance signal.