JPS6235783A - Television receiver - Google Patents

Television receiver

Info

Publication number
JPS6235783A
JPS6235783A JP17559285A JP17559285A JPS6235783A JP S6235783 A JPS6235783 A JP S6235783A JP 17559285 A JP17559285 A JP 17559285A JP 17559285 A JP17559285 A JP 17559285A JP S6235783 A JPS6235783 A JP S6235783A
Authority
JP
Japan
Prior art keywords
screen
information
image
memory
delay circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17559285A
Other languages
Japanese (ja)
Other versions
JP2543025B2 (en
Inventor
Minoru Miyata
宮田 稔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP60175592A priority Critical patent/JP2543025B2/en
Publication of JPS6235783A publication Critical patent/JPS6235783A/en
Application granted granted Critical
Publication of JP2543025B2 publication Critical patent/JP2543025B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To obtain a necessary still picture securely by delaying the screen of the 1st screen information among plural screens by the delay time of a delay circuit behind the screen of the 2nd screen information. CONSTITUTION:The delay circuit 16 is added to a slave screen signal system. Consequently, the image of a slave screen part C is delayed by the delay time of the delay circuit 16 behind the image of a master screen part B and a user pays attention to the slave screen part C after finding desired information on the master screen part B, and perform still image instruction operation when necessary information is reproduced, thereby obtaining the necessary still image.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は単一テレビジョン画面の一部に、もう一つの縮
小画像を表示する複数画面表示機能を備えたテレビジョ
ン受像機に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a television receiver having a multi-screen display function for displaying another reduced image on a portion of a single television screen.

従来の技術 第2図と第3図はこの種のテレビジョン受像機の概念図
を示し、八がテレビジョン受像機、Bが親画面部、Cが
縮小した画像を表示する子画面部である。また、後述す
るが画面表め込み構成にフィールドメモリ(またはフレ
ームメモリ)を用いているため、付加機能として子画面
を静止画にすることが容易にでき、これが一般的となっ
ている。
Prior art Figures 2 and 3 show conceptual diagrams of this type of television receiver, where 8 is the television receiver, B is the main screen section, and C is the sub-screen section that displays a reduced image. . Further, as will be described later, since a field memory (or frame memory) is used in the screen embedding structure, it is easy to make the sub-screen a still image as an additional function, and this has become common.

第2図は親画面部Bと同じ内容を子画面部Cにも表示し
た例で、第3図は親画面部Bと異なる内容を子画面部C
に表示した例である。第4図は従来の構成例を示す。ア
ンテナ1からの信号をチューナ・選局回路2で任意のチ
ャンネルに選択し、VI F・検波回路3を介して複合
映像信号りを得る。
Figure 2 shows an example where the same content as the main screen part B is displayed on the child screen part C, and Figure 3 shows an example in which the same content as the main screen part B is displayed on the child screen part C.
This is an example displayed. FIG. 4 shows an example of a conventional configuration. A tuner/channel selection circuit 2 selects a signal from an antenna 1 to an arbitrary channel, and a composite video signal is obtained via a VIF/detection circuit 3.

もう一つの信号として外部機器4から複合映像信号Eを
得る。外部機器4としてはV T Rやビデオディスク
等がある。上記2つの複合映像信号りとEは、モード切
換スイッチ5と親子入替スイッチ6により、親画面用信
号Fと子画面用イdに′fGが決められる。親画面用信
号Fは第1の映像信号処理回路7を介し子画面挿入回路
8で子画面イー1号と複合され、ブラウン管9に加えら
れる。一方、子画面用信号Gは第2の映像信号処理回路
10を介しメモリ11に加えられ、メモリ11の出力は
上記子画面挿入回路8の子画面用信号Jとして入力され
る。
A composite video signal E is obtained from the external device 4 as another signal. External equipment 4 includes a VTR, video disc, and the like. For the above two composite video signals R and E, 'fG' is determined by the mode changeover switch 5 and the parent/child exchange switch 6 for the main screen signal F and the sub screen Id. The main screen signal F passes through the first video signal processing circuit 7 and is combined with the sub-screen E No. 1 in the sub-screen insertion circuit 8, and is applied to the cathode ray tube 9. On the other hand, the small screen signal G is applied to the memory 11 via the second video signal processing circuit 10, and the output of the memory 11 is input as the small screen signal J to the small screen insertion circuit 8.

メモリ11への書き込みクロックは、上記子画面用信号
Gから第2の同期分離回路12を介して得られる同期信
号を基にして動作する書き込みクロック発生回路13で
発生し、メモリ11に加えている。また、メモリ11か
らの読み出しクロックは、上記親画面用信号Fから第1
の同期分離回路14を介して得られる同期信号を基にし
て動作する読み出しクロック発生回路15で発生し、メ
モリ11に加えている。第5図に上記モード切換スイッ
チ5と親子入替スイッチ6の詳細を示す、モード切換ス
イッチ5が複合映像信号りを選択している時は、親画面
部Bと子画面部Cは同じ内容が映し出されている。
The write clock to the memory 11 is generated by a write clock generation circuit 13 that operates based on a synchronization signal obtained from the child screen signal G via the second synchronization separation circuit 12, and is added to the memory 11. . Further, the read clock from the memory 11 is the first one from the main screen signal F.
The read clock generation circuit 15 operates based on the synchronization signal obtained through the synchronization separation circuit 14 of the above clock, and is added to the memory 11. FIG. 5 shows details of the mode changeover switch 5 and the parent/child exchange switch 6. When the mode changeover switch 5 selects composite video signal, the same content is displayed on the main screen section B and the subscreen section C. It is.

このモードが有効な理由は、子画面部Cは静止させるこ
とが出来るため必要なシーンを狙って静止し、その情報
を確実に得ることが出来るからである。モード切換スイ
ッチ5が外部機器4からの複合映像信号Eを選択してい
る時は、親画面部Bと子画面部Eとは別々の内容を映し
出し、親子入替スイッチ6により、親画面部Bと子画面
部Cの内容を入替えることが出来る。つまり、親画面部
Bにアンテナ1からのテレビ信号を映し、子画面部Cに
VTR等の外部機器4からの信号を映すことや、その逆
も出来るということである。
The reason why this mode is effective is that since the child screen section C can be made to stand still, it is possible to aim at a necessary scene and to make it stand still, and to obtain the information reliably. When the mode selector switch 5 selects the composite video signal E from the external device 4, the main screen section B and the sub-screen section E display different contents, and the parent-child exchange switch 6 selects the main screen section B and the sub-screen section E. The contents of the child screen section C can be replaced. In other words, it is possible to display a television signal from the antenna 1 on the main screen section B and a signal from an external device 4 such as a VTR on the sub-screen section C, or vice versa.

発明が解決しようとする問題点 このような従来の構成では、子画面部Cを静止させて情
報を得る場合、実際はいつ必要な情報が送られてくるか
不明な場合が大半であり、瞬間的に映し出されるのが現
状である。つまり静止画にしたい情報が親画面部Bに現
われてから静止させ;るための操作を実施して静止指示
17をメモリ11に “与えて静止画を得ているが、こ
の操作が遅れると。
Problems to be Solved by the Invention In such a conventional configuration, when obtaining information by keeping the sub-screen portion C still, in most cases it is unclear when the necessary information will actually be sent, and The current situation is reflected in In other words, after the information to be made into a still image appears on the main screen section B, an operation is performed to freeze it, and a still image is given to the memory 11 with the freeze instruction 17, but if this operation is delayed.

既に情報が失われていることになり、静止画の機能が無
駄になってしまうという問題がある。
There is a problem in that information has already been lost and the still image function is wasted.

本発明は必要な情報が送られてきたことを確認した後に
静止指示操作を行って、必要な情報確実に静止画にする
ことが出来るテレビジョン受像機を提供することを目的
とする。
An object of the present invention is to provide a television receiver that can reliably turn the necessary information into a still image by performing a still instruction operation after confirming that the necessary information has been sent.

問題点を解決するための手段 本発明のテレビジョン受像機は、第1の画面情報の一部
にメモリから読み出した第2の画面情報を嵌め込んで複
数画面を表示させ、かつ前記メモリへの第1の画面情報
の書き込みを制御して前記複数画面のうちの第2の画像
情報の画像を静止画とするよう構成すると共に、前記第
2の画面情報の伝送系あるいは前記メモリへの第1の画
面情報の伝送系に遅延回路を介装したことを特徴とする
Means for Solving the Problems The television receiver of the present invention displays a plurality of screens by inserting second screen information read from a memory into a part of the first screen information, and also includes a method for displaying a plurality of screens by inserting second screen information read from a memory into a part of the first screen information. The configuration is configured to control writing of the first screen information to make an image of the second image information of the plurality of screens a still image, and to write the first screen information to a transmission system of the second screen information or to the memory. The screen information transmission system is characterized in that a delay circuit is interposed in the screen information transmission system.

作用 このように構成したため、複数画面のうちの第1の画面
情報の画面は第2の画面情報の画面より遅延回路の遅延
時間だけ遅れているため、第1の画面情報の画面を見て
必要な情報が送られてきたことを確認して、次に第2の
画面情報の画面を見て必要な情報の時点で静止指示操作
を実施することによって、確実に必要な静止画像が得ら
れる。
Effect Because of this configuration, the first screen information screen of the plurality of screens is delayed from the second screen information screen by the delay time of the delay circuit, so it is necessary to see the first screen information screen. After confirming that the necessary information has been sent, the user then looks at the second screen information screen and performs a still instruction operation at the time of the necessary information, thereby reliably obtaining the necessary still image.

実施例 以下、本発明の一実施例のブロック図を第1図に示す。Example A block diagram of an embodiment of the present invention is shown in FIG. 1 below.

なお、第1図において第4図と同じブロックには同一符
号を付けてその説明を省く。第1図が第4図と異なる点
は、子画面信号系に遅延回路16を追加した点である。
In FIG. 1, blocks that are the same as those in FIG. 4 are given the same reference numerals and their explanations will be omitted. The difference between FIG. 1 and FIG. 4 is that a delay circuit 16 is added to the small screen signal system.

遅延回路16はメモリ11の出力に設けられており、メ
モリ11の出力を適当な時間だけ遅らせて、子画面挿入
回路8に加えている。遅延回路16の具体例としては、
子画面信号をデジタル信号で処理して、メモリまたはラ
ッチ等で構成することが出来る。
A delay circuit 16 is provided at the output of the memory 11, and delays the output of the memory 11 by an appropriate amount of time and adds the delayed output to the child screen insertion circuit 8. As a specific example of the delay circuit 16,
The small screen signal can be processed as a digital signal and configured with a memory or latch.

このように構成したため、第2図の使用状態において、
親画面部Bの画像に対して子画面部Cの画像が遅延回路
16の遅延時間分だけ遅れており、利用者は親画面部B
に欲しい情報を見つけたあと、子画面部Cに注目して、
必要な情報が再生された時点で静止指示操作を行・えば
、必要な静止画像を得ることが出来る。
Because of this configuration, in the usage state shown in Figure 2,
The image on the child screen section C is delayed by the delay time of the delay circuit 16 with respect to the image on the main screen section B, and the user
After finding the information you want, pay attention to the sub-screen part C.
By performing a still instruction operation when the necessary information is reproduced, the necessary still image can be obtained.

尚、この遅延回路16は子画面信号系の中に挿入するこ
とで同様の機能を持つことができるのは明らかである0
例えば、親子入替スイッチ6の子画面信号出力であって
も同様である。
It is clear that this delay circuit 16 can have a similar function by inserting it into the small screen signal system.
For example, the same applies to the child screen signal output of the parent/child exchange switch 6.

発明の詳細 な説明のように本発明のテレビジョン受像機は、第1の
画面情報の一部にメモリから読み出した第2の画面情報
を嵌め込んで複数画面を表示させ、かつ前記メモリの第
1の画面情報の書き込みを制御して前記複数画面のうち
の第2の画像情報の画像を静止画とするよう構成すると
共に、前記第2の画面情報の伝送系あるいは前記メモリ
への第1の画面情報の伝送系に遅延回路を介装したため
、第1の画面情報の画面を見て必要な情報が送られてき
たことを確認して、次に第2の画像情報の画面を見て必
要な情報の再生時点で静止指示操作を実施することがで
き、操作性が向上し、確実に必要な静止画を得ることが
出来るものである。
As described in the detailed description of the invention, the television receiver of the present invention displays a plurality of screens by inserting second screen information read from the memory into a part of the first screen information, and The second image information of the plurality of screens is configured to be a still image by controlling the writing of the first screen information, and the first screen information is transferred to a transmission system of the second screen information or to the memory. Because a delay circuit is inserted in the screen information transmission system, you can check the first screen information screen to confirm that the necessary information has been sent, and then check the second screen information screen to confirm that the necessary information has been sent. It is possible to carry out a still instruction operation at the time of reproduction of information, improving operability and reliably obtaining a necessary still image.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例のブロック図、第2図と第3
図は複数画面表示機能の説明図、第4図は従来の複数画
面表示機能付テレビジョン受像機の構成図、第5図は第
4図の要部構成図である。 6・・・親子入替スイッチ、7,10・・・第1、第2
の映像信号処理回路、8・・・子画面挿入回路、9・・
・ブラウン管、11・・・メモリ、 16・・・遅延回
路、17・・・静止指示、B・・・親画面部、C・・・
子画面部代理人   森  本  義  弘 第を図 第2図 第3図
Figure 1 is a block diagram of one embodiment of the present invention, Figures 2 and 3 are block diagrams of one embodiment of the present invention.
FIG. 4 is an explanatory diagram of a multi-screen display function, FIG. 4 is a block diagram of a conventional television receiver with a multi-screen display function, and FIG. 5 is a block diagram of the main parts of FIG. 6... Parent-child exchange switch, 7, 10... 1st, 2nd
video signal processing circuit, 8... sub-screen insertion circuit, 9...
- Braun tube, 11...Memory, 16...Delay circuit, 17...Still instruction, B...Main screen section, C...
Sub screen department agent Yoshihiro Morimoto Figure 2 Figure 3

Claims (1)

【特許請求の範囲】[Claims] 1、第1の画面情報の一部にメモリから読み出した第2
の画面情報を嵌め込んで複数画面を表示させ、かつ前記
メモリへの第1の画面情報の書き込みを制御して前記複
数画面のうちの第2の画像情報の画像を静止画とするよ
う構成すると共に、前記第2の画面情報の伝送系あるい
は前記メモリへの第1の画面情報の伝送系に遅延回路を
介装したテレビジョン受像機。
1. The second screen information read from memory is added to part of the first screen information.
screen information is inserted to display a plurality of screens, and writing of the first screen information to the memory is controlled to make an image of the second image information of the plurality of screens a still image. The television receiver further includes a delay circuit interposed in the second screen information transmission system or the first screen information transmission system to the memory.
JP60175592A 1985-08-08 1985-08-08 Television receiver Expired - Lifetime JP2543025B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60175592A JP2543025B2 (en) 1985-08-08 1985-08-08 Television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60175592A JP2543025B2 (en) 1985-08-08 1985-08-08 Television receiver

Publications (2)

Publication Number Publication Date
JPS6235783A true JPS6235783A (en) 1987-02-16
JP2543025B2 JP2543025B2 (en) 1996-10-16

Family

ID=15998772

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60175592A Expired - Lifetime JP2543025B2 (en) 1985-08-08 1985-08-08 Television receiver

Country Status (1)

Country Link
JP (1) JP2543025B2 (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS643269U (en) * 1987-06-18 1989-01-10
JPH01157176A (en) * 1987-07-28 1989-06-20 Sanyo Electric Co Ltd Digital television receiver and data processor to be used by receiver
JPH01179576A (en) * 1988-01-08 1989-07-17 Matsushita Electric Ind Co Ltd Video signal processor
JPH02137168U (en) * 1989-04-17 1990-11-15
JPH03113972A (en) * 1989-09-27 1991-05-15 Nec Corp Television receiver
JPH0720767U (en) * 1993-11-11 1995-04-11 船井電機株式会社 Recording / playback device
JPH07203328A (en) * 1993-12-28 1995-08-04 Nec Corp Display device
JP2007300246A (en) * 2006-04-28 2007-11-15 Sharp Corp Television broadcast receiver unit

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5422258A (en) * 1977-07-19 1979-02-20 Janome Sewing Machine Co Ltd Device of selecting pattern of sewing machine
JPS5648766A (en) * 1979-09-28 1981-05-02 Hitachi Ltd Two-screen television receiver
JPS57109477A (en) * 1980-12-26 1982-07-07 Hitachi Ltd Two picture television receiver

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5422258A (en) * 1977-07-19 1979-02-20 Janome Sewing Machine Co Ltd Device of selecting pattern of sewing machine
JPS5648766A (en) * 1979-09-28 1981-05-02 Hitachi Ltd Two-screen television receiver
JPS57109477A (en) * 1980-12-26 1982-07-07 Hitachi Ltd Two picture television receiver

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS643269U (en) * 1987-06-18 1989-01-10
JPH01157176A (en) * 1987-07-28 1989-06-20 Sanyo Electric Co Ltd Digital television receiver and data processor to be used by receiver
JPH01179576A (en) * 1988-01-08 1989-07-17 Matsushita Electric Ind Co Ltd Video signal processor
JPH02137168U (en) * 1989-04-17 1990-11-15
JPH03113972A (en) * 1989-09-27 1991-05-15 Nec Corp Television receiver
JPH0720767U (en) * 1993-11-11 1995-04-11 船井電機株式会社 Recording / playback device
JPH07203328A (en) * 1993-12-28 1995-08-04 Nec Corp Display device
JP2007300246A (en) * 2006-04-28 2007-11-15 Sharp Corp Television broadcast receiver unit

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Publication number Publication date
JP2543025B2 (en) 1996-10-16

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