JP3013217B2 - Inline screen linearity controller - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video device such as a two-screen TV receiver and a VTR for performing a process of synthesizing two or more video signals and displaying them on a screen as one video signal.

[0002]

2. Description of the Related Art In recent years, the number of channels of TV broadcasting has been increased, and even when watching TV programs in ordinary households,
At the same time, the number of scenes that want to watch two or more channels is increasing. Therefore, for the purpose of simultaneously enjoying two programs on one TV receiver, another TV program is reduced and displayed on a screen (parent screen) showing one program. A TV receiver having a picture-in-picture function (PinP function) having a small screen has been developed.

FIG. 2 shows a configuration of a signal processing section of a conventional TV receiver having a PinP function.

[0004] The signal processing section is roughly analog processing section 13
And a digital processing unit 14.

The analog processing section 13 has an input signal switching section 4 for switching signals input to the main screen and the small screen.
A PinP output switching unit 5 for switching an output signal to a screen, a chroma / synchronization processing circuit 6 for processing a chroma signal and a synchronization signal for a small screen, and a synchronization signal processing for a main screen video signal. And a synchronization processing circuit 7 for performing the operation.

On the other hand, the digital processing section 14 includes an A / D conversion section 9 for converting an analog signal input from the chroma / synchronization processing circuit 6 into a digital signal, the chroma / synchronization processing circuit 6 and the synchronization processing. A PinP control section 10 for controlling a video signal output to a small screen in response to a synchronization signal supplied from a circuit 7 and a digital signal supplied from the A / D conversion section 9;
A D / A converter 11 for converting a digital signal output from the controller 10 into an analog signal,
It comprises a video random access memory (V-RAM) unit 12 for storing a digital video signal of a small picture supplied from the PinP control unit 10.

Hereinafter, the operation of the signal processing unit will be described in detail.

[0008] The input signal 1 and the input signal 2 are first input to the input signal switching section 4.

One of the two input signals is input to the PinP output switching section 5 and the synchronization processing circuit 7 as a main screen signal. The other input signal is input to the chroma / synchronization processing circuit 6 as a small screen signal.

The synchronization processing circuit 7 extracts horizontal and vertical synchronization signals from the main screen video signal, and
4 is supplied as a vertical synchronization signal (MVD) and a horizontal synchronization signal (MHD) of the main screen.

The chroma / synchronization processing circuit 6 demodulates a luminance signal and a chrominance signal from the sub-screen video signal, extracts a synchronizing signal, and sends a sub-screen luminance signal (Y) and a chrominance Signal (RY, B
-Y), a vertical synchronization signal (SVD) and a horizontal synchronization signal (SV).
HD).

In the digital processing unit 14, the Y, RY, and BY signals of the small screen signal are temporarily stored in the V-RAM unit 12.
After that, the data is read out in accordance with the small-screen output timing. Here, the synchronization signal of each of the parent screen and the child screen is used to create the timing of writing / reading.

The video signal stored in the V-RAM unit 12 is D / A converted by the D / A conversion unit 11, becomes an analog signal again, and is input to the PinP output switching unit 5.

The small-screen video signal is synthesized by the PinP output switching section 5 and output as the PinP signal 3.

[0015]

The aspect ratio is 16:
9 in the panorama mode shown in FIG. 3 in the CRT 9 in the conventional PinP system, the video signal of the small screen output from the PinP control unit is the signal shown in FIG.
Therefore, as shown in FIG. 5, the child screen displayed on the screen becomes a screen that becomes longer as it approaches the peripheral portion, and the horizontal linearity deteriorates.

SUMMARY OF THE INVENTION In view of the above, it is an object of the present invention to provide a two-screen television receiver which displays an image with good linearity on a small screen even in a panoramic mode.

[0017]

In order to solve the above-mentioned problems, a small-screen linearity control device according to the present invention comprises:
A first control means for controlling a sampling frequency for reading a small-screen video signal from the RAM, and a control signal for controlling the sampling frequency control means according to a parent screen mode and an output position of a child screen. And a second control unit for the

[0018]

The second control means outputs a control signal according to the mode of the parent screen and the output position of the child screen. The first control means receives the control signal output from the second control means and changes the sampling frequency for reading the small-screen video signal stored in the V-RAM unit in proportion to the read time.

[0019]

FIG. 10 is an overall block diagram of a two-screen television receiver.

The two-screen television receiver includes an antenna 101 for inputting an RF signal, a tuner 102 for selecting a desired channel, a VIF detection circuit 103 for detecting a video signal, and a video signal detection circuit 103 for detecting a video signal. An input switching circuit 104 for performing switching, an external video device 105 for supplying a video signal, a PinP circuit for generating a PinP signal including a sampling frequency control unit, a parent screen mode and a child screen output position control circuit 10
6, a color demodulation circuit 107 for outputting the BY and RY signals, a luminance signal processing circuit 108 for outputting the Y signal, and R, G signals from the BY and RY signals. , And B signals, and a CRT 110 that converts the input R, G, and B signals into optical outputs.

A signal input from an antenna 101 is transmitted to a VIF after a desired channel is selected by a tuner 102.
After being converted into a video signal by the detection circuit 103, it is input to the input switching circuit 104.

A video signal is also input to the input switching circuit 104 from an external video device 105.
Then, from the input switching circuit 104, those two signals are input to the PinP circuit 106, one of which is processed as a main screen signal and the other is processed as a child screen signal.

The signal processed by the PinP circuit 106 is P
The signal is input to the luminance signal processing circuit 108 and the color demodulation circuit 107 as an inP signal, and the signals are Y, BY, and RY, respectively.
A signal is output. These signals are input to the matrix circuit 109, and are output as C, G, and B signals to the CRT 1
It is output to 10.

FIG. 1 shows an embodiment of a signal processing section of a TV receiver having a PinP function according to the present invention.

The signal processing section comprises an analog processing section 13, a digital processing section 14, an input signal switching control section 8, and a parent screen mode and child screen output position control section 16.

The analog processing unit 13 includes an input signal switching unit 4 for switching signals input to the main screen and the small screen.
A PinP output switching unit 5 for switching an output signal to a screen, a chroma / synchronization processing circuit 6 for processing a chroma signal and a synchronization signal for a small screen, and a processing for a synchronization signal for a main screen. And a synchronous processing circuit 7.

On the other hand, the digital processing section 14 controls the A / D conversion section 9 for converting an analog signal input from the chroma / synchronization processing circuit 6 into a digital signal, and controls a signal input to a small screen. Control section 10, a D / A conversion section 11 for converting a digital signal output from the PinP control section 10 into an analog signal, and a V-RAM section 12 for storing a digital video signal. And a sampling frequency control unit 15 for controlling a sampling frequency at the time of reading from the V-RAM unit 12.

Hereinafter, the operation of the signal processing unit having the above configuration will be described in detail.

The input signal 1 and the input signal 2 are input to the input signal switching section 4 first.

One input signal is Pi as a main screen signal.
The signal is input to the nP output switching unit 5 and the synchronization processing circuit 7.
The other input signal is input to the chroma / synchronization processing circuit 6 as a small screen signal.

In the synchronization processing circuit 7, horizontal and vertical synchronization signals are extracted from the main screen video signal, and the digital processing unit 1
4 is supplied as a vertical synchronization signal (MVD) and a horizontal synchronization signal (MHD) of the main screen.

In the chroma / synchronization processing circuit 6, a luminance signal and a color difference signal are demodulated from the small-screen video signal, and a synchronizing signal is extracted. The color difference signal (RY,
BY), a vertical synchronization signal (SVD), and a horizontal synchronization signal (SHD).

In the digital processing section 14, Y,
The RY and BY signals are once written in the V-RAM unit 12 and then read out in accordance with the small-screen output timing. Here, the synchronization signal of each of the parent screen and the child screen is used to create the timing of writing / reading.

Main screen mode and child screen output position control unit 1
At 6, the sampling frequency control unit 15 is controlled according to the flowchart of FIG.

Hereinafter, the flowchart shown in FIG. 6 will be described.

First, in step S1, it is determined whether or not the parent screen is in the panoramic mode. If the parent screen is not in the panoramic mode, the flow proceeds to step S2, and if it is in the panoramic mode, the flow proceeds to step S3.

In step S2, the sampling frequency is set to a constant value.

On the other hand, in step S3, it is determined whether the output position of the small screen is on the right side or on the left side. If it is on the right side, the process proceeds to step S4, and if it is on the left side, the process proceeds to step S5.

In step S4, the sampling frequency is set so as to increase in proportion to time.

On the other hand, in step S5, the sampling frequency is set so as to decrease in proportion to time.

For example, when the parent screen is in the panorama mode,
When the child screen is output to the right of the parent screen as shown in FIG. 5, a control signal as shown in FIG. 7 is output from the parent screen mode and child screen output position control unit 16 to the sampling frequency control unit 15. You. Then, the sampling frequency control unit 1
In step 5, control is performed so that the sampling frequency of reading from the V-RAM unit increases in proportion to time.

In this case, the small picture signal which is D / A converted by the D / A converter 11 and output is as shown in FIG.
The signal is input to the PinP output switching unit 5, is synthesized with the main screen signal, and is output as a PinP signal 3. On the screen, an image with good linearity is displayed as shown in FIG.

As described above, by using the small-screen linearity control device according to the present invention, an image with good linearity can be obtained on the small-screen even in the panorama mode.

[0044]

According to the present invention, it is possible to obtain a PinP image with an improved linearity of a child screen displayed in a panoramic mode in a main screen in a landscape two-screen television receiver having an aspect ratio of 16: 9 or the like. .

[Brief description of the drawings]

FIG. 1 shows a block diagram of an embodiment of a signal processing unit according to the present invention.

FIG. 2 shows a block diagram of a conventional signal processing unit.

FIG. 3 shows a screen in a panorama mode.

FIG. 4 shows a child screen with good linearity.

FIG. 5 shows a child screen with poor linearity.

FIG. 6 is a flowchart used to describe the operation of the small-screen linearity control device according to the present invention.

FIG. 7 is a graph showing a relationship between a read time and a read sampling frequency.

FIG. 8 shows a video signal of a small screen when the reading sampling frequency is constant.

FIG. 9 shows a video signal of a small screen when the reading sampling frequency is changed.

FIG. 10 shows an overall block diagram of a two-screen TV receiver according to the present invention.

[Description of Signs] 4 Input signal switching unit 5 PinP output signal switching unit 6 Chroma / synchronization processing circuit 7 Synchronization processing circuit 8 Input signal switching control unit 9 A / D conversion unit 10 PinP control unit 11 D / A conversion unit 12 V -RAM unit 13 Analog processing unit 14 Digital processing unit 15 Sampling frequency control circuit 16 Main screen and child screen output position control circuit

Claims (1)

(57) [Claims] 1. A signal processing unit of a two-screen TV receiver having a function of reducing one of two input video signals and displaying the reduced one on the display screen simultaneously with the other video signal. A first control means for changing a sampling frequency for reading a small screen signal from a video random access memory; and a main screen when the main screen is in a panoramic mode, according to an output position of the sub screen. And second control means for outputting a control signal for controlling the first control means so that the sampling frequency monotonously increases and decreases in proportion to time. Control device.