JPS6234829U - - Google Patents
Info
- Publication number
- JPS6234829U JPS6234829U JP12543185U JP12543185U JPS6234829U JP S6234829 U JPS6234829 U JP S6234829U JP 12543185 U JP12543185 U JP 12543185U JP 12543185 U JP12543185 U JP 12543185U JP S6234829 U JPS6234829 U JP S6234829U
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- coupler
- circuit
- external device
- device contact
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005070 sampling Methods 0.000 claims description 3
- 230000001934 delay Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 238000009499 grossing Methods 0.000 description 1
Description
第１図は本考案の実施例を示す回路図、第２図
は交流電圧、フオトカプラの出力電圧及び遅延回
路の出力電圧を示す波形図、第３図は従来例を示
す回路図である。
１……交流電源、２……整流回路、３……平滑
回路、４……外部機器接点、５……サンプリング
部、６……オフデイレイ回路、ＦＣ……フオトカ
プラ。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a waveform diagram showing AC voltage, the output voltage of a photocoupler, and the output voltage of a delay circuit, and FIG. 3 is a circuit diagram showing a conventional example. 1... AC power supply, 2... Rectifier circuit, 3... Smoothing circuit, 4... External device contact, 5... Sampling section, 6... Off-delay circuit, FC... Photocoupler.
Claims (1)
トカプラを介してサンプリング部により取り込む
ようにした信号取り込み回路において、 前記外部機器接点及びオフトカプラの１次側に
交流電圧を供給する交流電源と、前記オフトカプ
ラのオンまたはオフ時における２次側の電圧変化
を遅延させる遅延回路とを設け、 前記遅延回路の遅延定数を、前記交流電源の交
流電圧の半サイクルの時間内におけるサンプリン
グ部の入力電圧がその判定電圧領域から外れない
ように設定したことを特徴とする信号取り込み回
路。[Scope of Claim for Utility Model Registration] In a signal capture circuit in which a signal corresponding to the open/closed state of an external device contact is captured by a sampling section via an off-coupler, an alternating current voltage is supplied to the primary side of the external device contact and the off-coupler. and a delay circuit that delays a voltage change on the secondary side when the off-coupler is turned on or off, and the delay constant of the delay circuit is determined by sampling within a half-cycle time of the AC voltage of the AC power supply. A signal acquisition circuit characterized in that the input voltage of the section is set so as not to deviate from the determination voltage range.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12543185U JPS6234829U (en) | 1985-08-15 | 1985-08-15 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12543185U JPS6234829U (en) | 1985-08-15 | 1985-08-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6234829U true JPS6234829U (en) | 1987-02-28 |
Family
ID=31018326
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12543185U Pending JPS6234829U (en) | 1985-08-15 | 1985-08-15 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6234829U (en) |
-
1985
- 1985-08-15 JP JP12543185U patent/JPS6234829U/ja active Pending
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