JPS6232734A - Signal converting circuit - Google Patents

Abstract

PURPOSE:To supervise always accurately a signal converting circuit by inserting a test signal for supervising the signal converting circuit for coupling a different modulating system after stabilizing transient instability generated at the connection of a power supply. CONSTITUTION:A power ON reset circuit 5 outputs logic level '0' over a fixed period after the connection of the power supply and outputs logic level '1' until the disconnection of the power supply after the passage of a fixed period. When the output of the circuit 5 is '0', a test signal indicating the initial status is outputted from a test signal generator 1, and when the output of the circuit 5 is turned to '1', the test signal is turned to another status. A selecting circuit 2 inserts the test signal to a channel for supervising an exchange connecting control signal multiplexed with time division. Consequently, at output converted on the basis of a fixed rule is obtained from a signal converter 3 when the output of the circuit 5 is '1'. The converted test signal is compared with an expected value by a test signal deciding circuit 4.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention converts each switch connection control signal input in which a plurality of channels are time-division multiplexed according to a certain law according to the changing order. The present invention relates to a monitoring circuit for a time division multiplexed signal conversion circuit that performs control signals independently for each channel and outputs control signals of a plurality of configurations per channel.

〔overview〕

In the F3 conversion circuit, which monitors the quality of the signal conversion means by comparing the output response of the test signal inserted into the signal conversion means that combines different modulation methods with the reference signal, transient instability occurs when the power is turned on. By inserting a test signal after the signal has stabilized, it is possible to reliably monitor the signal conversion means.

[Traditional technique j nete]

FIG. 2 shows the configuration of a conventional time division multiplexed signal conversion monitoring circuit. The test signal generator 6 generates a plurality of test signals for monitoring the operation of the signal converter 7, and the selection circuit 2 generates
This test signal is inserted into a channel section added for function monitoring to the control signal input for connecting a plurality of time-division multiplexed converters. The control signal into which the test signal has been inserted is input to the signal converter 7, and the signal converter 7 converts it into a control signal that is uniquely determined for the logical combination of these control signals. Test signal judgment circuit 4
Then, it is determined whether the test signal included in the control signal output of the signal converter 7 is correctly converted by the signal converter 7.

(Problems to be Solved by the Invention) In such a conventional time-division multiplex signal conversion circuit, the test signal generator 6 and the signal converter 7 have different outputs until they operate stably after the power is turned on. No action has been taken against it. By the way, when the signal converter 7 performs conversion based on a predetermined rule according to the order in which a plurality of inputs change, the test signal generator 6 immediately after power is turned on.
The unstable test signal output is converted by the signal converter 7,
As a result, there is a drawback that the signal converter 7 cannot be monitored reliably.

The present invention aims to eliminate these drawbacks, and aims to provide a signal conversion circuit that can always accurately monitor its own circuit.

[Means for solving problems]

The present invention further comprises a signal converting means (3) comprising a signal generating means for generating an output signal modulated in a second manner corresponding to a human input signal modulated in the first manner, and a test inserted into the input signal. In a signal conversion circuit comprising test signal generation means (1) for generating a signal, and determination means (4) for comparing a signal related to the test signal extracted from the output signal with a reference signal, the signal conversion means comprises: , the test signal generating means is configured to reset at least a region for converting the test signal of the means by outputting the one logical value, and the test signal generating means is configured to perform the test while the one logical value is outputted. It is characterized by a configuration that prohibits the generation of signals.

[Effect]

For example, the time it takes for an unstable test signal output to stabilize at the test signal insertion means provided on the input side of a signal converter that translates a time division multiplex modulation input signal into a pulse code modulation output signal. After the elapsed time, eggplant H8 is inserted and monitoring begins. During this transitional period, the area of the storage means for storing this test input signal is set to an initial state, and monitoring using the test signal is not performed.

〔Example〕

Hereinafter, a circuit according to an embodiment of the present invention will be explained based on the drawings.

FIG. 1 is a block configuration diagram showing the configuration of this embodiment circuit.

First, the configuration of this embodiment circuit will be explained based on FIG. This example circuit comprises a test signal generator l, an input terminal 10, and a selector having a first input connected to the input terminal 10 and a second input connected to the output of the test signal generator 1. a circuit 2 and a signal converter 3, the output of which is connected to the first input of the selection circuit 2, the output of which is connected to the input of the test signal generator 1 and to the second input of the signal converter 3; a power-on reset circuit 5; and a test signal determination circuit 4 whose input is connected to the output of the signal converter 3.
and an output terminal 15 to which the output of the signal converter 3 is connected.

Next, the operation of this embodiment circuit will be explained based on FIG.

The power-on reset circuit 5 outputs a logic level "0" for a certain period of time after the power is turned on, and continuously outputs a logic level "1" after the elapse of the certain period until the power is turned off. When the output of the power-on reset circuit 5 is at logic level "0", the test signal generator 1 outputs a plurality of signals indicating the initial state of the test signal (for example, a signal indicating the no-call state of the exchange), and the power is turned off. The output of the on-reset circuit 5 changes to logic level "1", and the signal output indicating the initial state is changed to another state (for example, a signal for starting the exchange). In the selection circuit 2, the test signal output of the test signal generator 1 is inserted into the monitoring channel portion of the time-division multiplexed exchange connection control signal input of a plurality of channels including the monitoring channel. In the signal converter 3, when the output of the power-on reset circuit 5 is at logic level "0", a plurality of built-in memories are set to an initial state. Furthermore, when the output of the power-on reset circuit 5 is at logic level "1", a plurality of converters are connected per channel, which are converted based on a certain rule according to the order in which the plurality of outputs per channel of the selection circuit 2 change. control signals are output from the signal converter 3. In the test signal determination circuit 4, it is included in the control signal output of the signal converter 3, inserted in the selection circuit 2, and
The converted test signal is detected and it is determined whether the converted result matches the expected value.

〔Effect of the invention〕

As explained above, the present invention uses the power-on reset circuit to output the test signal generator and initialize the built-in memory of the signal converter within a certain period of time after the power is turned on.
Since the influence of unstable test signal output from the test signal generator immediately after power-on is removed, the function of the signal converter can be reliably monitored.

[Brief explanation of the drawing]

FIG. 1 is a block configuration diagram showing the configuration of a circuit according to an embodiment of the present invention. FIG. 2 is a block diagram showing the configuration of a conventional circuit. 1.6...Test signal generator, 2...Selection circuit, 3
．． 7... Signal converter, 4... Test signal judgment circuit,
5... Power-on reset circuit, 10... Input terminal, 15... Output terminal.

Claims (2)

[Claims] (1) signal converting means (3) including a signal generating means for generating an output signal modulated in a second manner corresponding to an input signal modulated in the first manner; and a test signal to be inserted into the input signal. A signal conversion circuit comprising a test signal generation means (1) for generating a test signal, and a determination means (4) for comparing a signal related to the test signal extracted from the output signal with a reference signal, the signal conversion means comprising: The test signal generating means is configured to reset at least a region for converting the test signal of the means by outputting the one logical value, and the test signal generating means does not generate the test signal while the one logical value is output. A signal conversion circuit characterized in that it has a configuration that prohibits the occurrence of. (2) The signal conversion circuit according to claim (1), wherein the input signal and the output signal are connection control signals of different exchange systems.