JPS6231587B2 - - Google Patents

Info

Publication number
JPS6231587B2
JPS6231587B2 JP1477080A JP1477080A JPS6231587B2 JP S6231587 B2 JPS6231587 B2 JP S6231587B2 JP 1477080 A JP1477080 A JP 1477080A JP 1477080 A JP1477080 A JP 1477080A JP S6231587 B2 JPS6231587 B2 JP S6231587B2
Authority
JP
Japan
Prior art keywords
phase
pulse interval
control circuit
phase control
constant pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1477080A
Other languages
Japanese (ja)
Other versions
JPS56112883A (en
Inventor
Takami Sakai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP1477080A priority Critical patent/JPS56112883A/en
Publication of JPS56112883A publication Critical patent/JPS56112883A/en
Publication of JPS6231587B2 publication Critical patent/JPS6231587B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/145Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means
    • H02M7/155Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a thyratron or thyristor type requiring extinguishing means using semiconductor devices only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)
  • Power Conversion In General (AREA)

Description

【発明の詳細な説明】 (a) 技術分野の説明 本発明は、周波数変換、直流連系、直流送電な
どの交直変換設備における系統異常時、特に系統
電圧の不平衡時や波形歪発生時の交直変換装置の
位相制御装置に関する。
[Detailed Description of the Invention] (a) Description of the Technical Field The present invention is applicable to system abnormalities in AC/DC conversion equipment such as frequency conversion, DC interconnection, and DC power transmission, especially when system voltage is unbalanced or when waveform distortion occurs. The present invention relates to a phase control device for an AC/DC converter.

(b) 従来技術の説明 過去10年以上前の交直変換装置の位相制御方式
としては、各バルブの転流電圧の位相を基準とし
て点弧パルスを発生させる各位相制御方式が採用
されていたが、その後、つねに等間隔で点弧パル
スを発生させるパルス間隔一定制御方式が採用さ
れるに到つた。この理由としては、パルス間隔一
定制御方式では、例えば3相ブリツジ構成の交直
変換装置においては、つねに、パルス間隔が60゜
であるので、非理論高調波の発生が少ない。又、
高調波障害が少ないので、小容量の系統に適用で
きるなどの利点をもつているからであつた。
(b) Description of the prior art The phase control method used in AC/DC converters over the past 10 years was to generate an ignition pulse based on the phase of the commutated voltage of each valve. After that, a constant pulse interval control system was adopted in which ignition pulses were always generated at equal intervals. The reason for this is that in the constant pulse interval control method, for example in an AC/DC converter having a three-phase bridge configuration, the pulse interval is always 60°, so non-theoretical harmonics are less likely to occur. or,
This is because it has the advantage of being applicable to small-capacity systems because it has little harmonic interference.

第1図は、各相位相制御方式及びパルス間隔一
定制御方式による点弧パルス発生の説明図であ
る。第1図において、aは、3相の相電圧を示
し、系統事故などにより、T相のみが電圧低下し
てT′相になつた場合も表わしている。bは各位
相制御方式による点弧パルス発生方式、cはパル
ス間隔一定制御方式による点弧パルス発生方式、
dはパルス間隔一定制御方式で、系統事故を検出
して位相進め制御を行なつた場合の点弧パルス発
生方式を示している。
FIG. 1 is an explanatory diagram of ignition pulse generation using the phase-by-phase control method and the constant pulse interval control method. In FIG. 1, a indicates the phase voltage of three phases, and also indicates a case where only the T phase has a voltage drop and becomes the T' phase due to a system fault or the like. b is a firing pulse generation method using each phase control method; c is a firing pulse generation method using a constant pulse interval control method;
d is a constant pulse interval control system, and shows an ignition pulse generation system when a system fault is detected and phase advance control is performed.

さて、交直変換装置の制御進み角をβで表わ
し、正規の状態で、交直変換装置が、β=βaの
逆変換器運転していたとき、aに示すごとく、T
相がT′になつた場合、各位相制御方式では、b
に示すごとく、各相の相電圧の相交点、即ち各バ
ルブの転流電圧の零点を準点として、その点より
βaの位相点で点弧パルスを発生させる。即ち、
時刻t1を基準点とする。しかるにパルス間隔一定
制御方式では、cに示すごとく、つねに等間隔で
点弧パルスを発生せしめるようにしている為に、
基準点は、時刻t0である。従つて、時刻t0とt1
の位相差をθとすれば、パルス間隔一定制御方式
では、各バルブに対しては実際には、βa−θ又
はβa+θ位相点で点弧パルスを発生させている
ことになる。それ故にβa−θの位相で点弧パル
スを与えられるバルブは、余裕角(以後、γと呼
ぶ。)不足となり転流失敗を引き起す結果とな
る。そこで、dに示すごとく、系統電圧の不平衡
や波形歪を検出して、位相を進める制御方式が、
従来のパルス間隔一定制御方式に付加されてい
た。即ち、前記θを補正して、βb≧βa+θの
位相で点弧パルスを発生させる方式である。
Now, let us express the control lead angle of the AC/DC converter by β, and when the AC/DC converter is operating as an inverse converter with β=βa in a normal state, as shown in a, T
When the phase becomes T′, in each phase control method, b
As shown in the figure, the phase intersection of the phase voltages of each phase, that is, the zero point of the commutation voltage of each valve is used as a quasi point, and an ignition pulse is generated at a phase point βa from that point. That is,
Let time t 1 be the reference point. However, in the constant pulse interval control method, as shown in c, ignition pulses are always generated at equal intervals, so
The reference point is time t 0 . Therefore, if the phase difference between times t 0 and t 1 is θ, then in the constant pulse interval control method, the ignition pulse is actually generated for each valve at the βa-θ or βa+θ phase point. This means that Therefore, a valve to which an ignition pulse is applied with a phase of βa-θ will lack a margin angle (hereinafter referred to as γ), resulting in commutation failure. Therefore, as shown in d, there is a control method that detects unbalance and waveform distortion of the grid voltage and advances the phase.
This was added to the conventional constant pulse interval control method. That is, this is a method in which the above-mentioned θ is corrected and an ignition pulse is generated with a phase of βb≧βa+θ.

しかるに、送電端に原子力発電所を設け、その
原子力の発電電力を直流送電などにより送電する
場合、前記のようなパルス間隔一定制御方式で
は、系統異常時に転流失敗を防止する為に位相進
めを行なう為、原子力の発電電力と送電電力とが
アンバランスとなり、原子炉内の中性子束が異常
に増加して、原子炉をスクラムさせる恐れがある
と云う重大な欠点がある。
However, when a nuclear power plant is installed at the transmission end and the power generated by the nuclear power is transmitted by DC transmission, etc., the constant pulse interval control method described above requires phase advance to prevent commutation failure in the event of a system abnormality. As a result, there is a serious drawback that the nuclear power generated and the transmitted power become unbalanced, and the neutron flux inside the reactor increases abnormally, potentially causing the reactor to scram.

(c) 発明の目的 従つて、本発明の目的は、このような欠点を除
去する為になされたものであつて、逆変換器の転
流失敗を防止し、且つ原子炉をスクラムに到らし
めない交直変換装置の位相制御装置を提供するこ
とにある。
(c) Object of the invention Therefore, the object of the present invention was to eliminate such drawbacks, and to prevent commutation failure of the inverter and prevent the reactor from reaching scram. An object of the present invention is to provide a phase control device for an AC/DC converter that does not shut down.

(d) 発明の構成 第2図は、本発明の一実施例を示すブロツク図
である。第2図において、系統電圧、R,S,T
は、計器用変成器1〜3を介して、パルス間隔一
定制御回路4、各相位相制御回路5、系統電圧の
不平衡や波形歪を検出し、その検出値が所定値以
上のとき、出力信号がロジツク・レベル“1”と
なる、系統電圧異常検出回路6に入力される。
7,8はスイツチである。
(d) Structure of the invention FIG. 2 is a block diagram showing one embodiment of the invention. In Figure 2, the system voltage, R, S, T
The constant pulse interval control circuit 4, each phase phase control circuit 5, detects unbalance and waveform distortion of the grid voltage through the instrument transformers 1 to 3, and when the detected value is greater than a predetermined value, the output The signal is input to the system voltage abnormality detection circuit 6, where the logic level becomes "1".
7 and 8 are switches.

(e) 発明の作用 さて、いま、系統電圧が正常ならば、系統電圧
異常検出回路6の出力信号は、ロジツクレベル
“0”で、スイツチ7はオン、スイツチ8はオフ
であり、パルス間隔一定制御回路4の出力信号が
優先され、各バルブに等間隔の点弧パルスが与え
られているが、系統電圧が異常となり、系統電圧
異常検出回路6の出力信号が、ロジツクレベル
“1”となると、今度はスイツチ7がオフ、スイ
ツチ8がオンとなり、各相位相制御回路5の出力
信号が優先され、各相電圧の相交点を基準とした
点弧パルスが与えられることになるので、系統電
圧が正常ならば、非理論高調波の発生が少ないパ
ルス間隔一定制御で逆変換器運転され、系統電圧
が異常ならば、転流失敗に到らない、ひいては原
子炉をスクラムに到らしめない各相位相制御で逆
変換運転されることになる。
(e) Effect of the Invention Now, if the grid voltage is normal, the output signal of the grid voltage abnormality detection circuit 6 is logic level "0", switch 7 is on, switch 8 is off, and pulse interval constant control is performed. The output signal of the circuit 4 is given priority and ignition pulses are given to each valve at equal intervals, but when the grid voltage becomes abnormal and the output signal of the grid voltage abnormality detection circuit 6 becomes logic level "1", Switch 7 is turned off and switch 8 is turned on, giving priority to the output signal of each phase control circuit 5, and giving an ignition pulse based on the phase intersection of each phase voltage, so that the grid voltage is normal. Then, if the inverter is operated under constant pulse interval control that generates fewer non-theoretical harmonics, and if the system voltage is abnormal, each phase phase will be adjusted so that commutation failure will not occur and the reactor will not reach scram. The reverse conversion operation will be performed under control.

(f) 変形例 第3図は、本発明の他の実施例を示す回路図で
あり、第3図において、例えば、6個のバルブで
構成された変換器において、信号a1〜f1は、パル
ス間隔一定制御回路の出力信号で各6個のバルブ
に対応した点弧パルス、信号a2〜f2は、各相位相
制御回路の出力信号で前記同様、各6個のバルブ
に対応した点弧パルスを示し、信号gは、系統電
圧異常検出回路6の出力検出、9〜20はアンド
素子、21はインバータ素子、22〜27はオア
素子を示す。いま信号gがロジツクレベル
“0”、即ち系統電圧が正常ならば、アンド素子1
5〜20の入力信号a2〜f2は、すべてロツクさ
れ、アンド素子15〜20の出力信号はつねにロ
ジツクレベル“0”で、信号a1〜f1の信号が点弧
パルスとし選択される。即ち、信号a1が、ロジツ
クレベル“1”となれば、アンド素子9、オア素
子22の出力信号が、ロジツクレベル“1”とな
り、信号a1に対応したバルブに点弧パルスが送出
される。次に、系統電圧が異常となつて、信号g
が、ロジツクレベル“1”となると、インバータ
素子21の出力信号がロジツクレベル“0”とな
り、信号a1〜f1は、すべてロツクされ、今度は信
号a2〜f2が選択されることになる。
(f) Modification FIG. 3 is a circuit diagram showing another embodiment of the present invention. In FIG. 3, for example, in a converter composed of six valves, the signals a 1 to f 1 are , the output signals of the constant pulse interval control circuit are ignition pulses corresponding to each of the six valves, and the signals a2 to f2 are the output signals of the respective phase control circuits, corresponding to each of the six valves. A signal g indicates an ignition pulse, a signal g detects the output of the system voltage abnormality detection circuit 6, 9 to 20 are AND elements, 21 is an inverter element, and 22 to 27 are OR elements. If the signal g is now at logic level "0", that is, the grid voltage is normal, then the AND element 1
The input signals a 2 -f 2 of 5-20 are all locked, the output signals of the AND elements 15-20 are always at logic level "0", and the signals a 1 -f 1 are selected as the ignition pulse. That is, when the signal a1 becomes a logic level "1", the output signals of the AND element 9 and the OR element 22 become a logic level "1", and an ignition pulse is sent to the valve corresponding to the signal a1 . Next, the grid voltage becomes abnormal and the signal g
However, when the logic level becomes "1", the output signal of the inverter element 21 becomes the logic level "0", all signals a 1 -f 1 are locked, and signals a 2 -f 2 are selected this time.

(g) 総合的な効果 以上の説明のように、本発明は、交直変換装置
の位相制御装置として、パルス間隔一定制御回路
と各相位相制御回路とを具備し、定常時には、パ
ルス間隔一定制御回路を優先させ、系統異常時に
は、各相位相制御回路を優先させることにより、
前記二つの位相制御回路の利点を最大限に利用
し、非理論高調波の発生が少なく、転流失敗しに
くい、ひいては原子炉をスクラムに到らしめない
と云う著しい効果を有する。
(g) Overall effect As explained above, the present invention is equipped with a constant pulse interval control circuit and a phase control circuit for each phase as a phase control device for an AC/DC converter, and in a steady state, constant pulse interval control is performed. By giving priority to each phase control circuit in the event of a system abnormality,
By making full use of the advantages of the two phase control circuits mentioned above, it has the remarkable effect that non-theoretical harmonics are less likely to occur, commutation failures are less likely to occur, and the reactor does not reach a scram.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、従来の位相制御回路の動作説明図、
第2図は、本発明の一実施例を示すブロツク図、
第3図は、本発明の他の実施例を示す回路図であ
る。 1〜3……計器用変成器、4……パルス間隔一
定制御回路、5……各相位相制御回路、6……系
統電圧異常検出回路、7,8……スイツチ、9〜
20……アンド素子、21……インバータ素子、
22〜27……オア素子。
FIG. 1 is an explanatory diagram of the operation of a conventional phase control circuit.
FIG. 2 is a block diagram showing one embodiment of the present invention;
FIG. 3 is a circuit diagram showing another embodiment of the present invention. 1-3...Instrument transformer, 4...Pulse interval constant control circuit, 5...Each phase phase control circuit, 6...System voltage abnormality detection circuit, 7, 8...Switch, 9-
20...AND element, 21...Inverter element,
22-27...OR element.

Claims (1)

【特許請求の範囲】[Claims] 1 各相位相制御回路とパルス間隔一定位相制御
回路を具備した交直変換装置において、定常状態
では、前記パルス間隔一定位相制御回路を動作さ
せ、系統電圧の不平衡時あるいは波形歪発生時に
は、前記系統電圧の不平衡、波形歪を検出して、
この検出値が所定値以上ならば、各相位相制御回
路を動作させることを特徴とする交直変換装置の
位相制御装置。
1. In an AC/DC converter equipped with a phase control circuit for each phase and a constant pulse interval phase control circuit, in a steady state, the constant pulse interval phase control circuit is operated, and when the system voltage is unbalanced or waveform distortion occurs, the system Detects voltage imbalance and waveform distortion,
A phase control device for an AC/DC converter, characterized in that if this detected value is greater than or equal to a predetermined value, each phase phase control circuit is operated.
JP1477080A 1980-02-12 1980-02-12 Phase controlling device for ac-dc converter Granted JPS56112883A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1477080A JPS56112883A (en) 1980-02-12 1980-02-12 Phase controlling device for ac-dc converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1477080A JPS56112883A (en) 1980-02-12 1980-02-12 Phase controlling device for ac-dc converter

Publications (2)

Publication Number Publication Date
JPS56112883A JPS56112883A (en) 1981-09-05
JPS6231587B2 true JPS6231587B2 (en) 1987-07-09

Family

ID=11870288

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1477080A Granted JPS56112883A (en) 1980-02-12 1980-02-12 Phase controlling device for ac-dc converter

Country Status (1)

Country Link
JP (1) JPS56112883A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0541990Y2 (en) * 1987-09-24 1993-10-22

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59165967A (en) * 1983-02-17 1984-09-19 ゼネラル・エレクトリツク・カンパニイ Method and device for protecting thyristor power converting system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0541990Y2 (en) * 1987-09-24 1993-10-22

Also Published As

Publication number Publication date
JPS56112883A (en) 1981-09-05

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