JPS6230536B2 - - Google Patents

Info

Publication number
JPS6230536B2
JPS6230536B2 JP6141580A JP6141580A JPS6230536B2 JP S6230536 B2 JPS6230536 B2 JP S6230536B2 JP 6141580 A JP6141580 A JP 6141580A JP 6141580 A JP6141580 A JP 6141580A JP S6230536 B2 JPS6230536 B2 JP S6230536B2
Authority
JP
Japan
Prior art keywords
section
tuning
transistor
signal
state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP6141580A
Other languages
Japanese (ja)
Other versions
JPS56158529A (en
Inventor
Masami Miura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP6141580A priority Critical patent/JPS56158529A/en
Publication of JPS56158529A publication Critical patent/JPS56158529A/en
Publication of JPS6230536B2 publication Critical patent/JPS6230536B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03JTUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J7/00Automatic frequency control; Automatic scanning over a band of frequencies
    • H03J7/18Automatic scanning over a band of frequencies

Landscapes

  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Noise Elimination (AREA)

Description

【発明の詳細な説明】 本発明は受信機、特にモータードライブ又はデ
ジタル制御方式等でアンテナ同調回路、局部発振
回路に使用する可変容量素子の静電容量値を変
え、自動的に同調周波数を掃引して同調を取る自
動同調型AM受信機に関する。
Detailed Description of the Invention The present invention automatically sweeps the tuning frequency by changing the capacitance value of the variable capacitance element used in the antenna tuning circuit and local oscillation circuit in a receiver, especially in a motor drive or digital control system. This paper relates to an automatic tuning type AM receiver that uses automatic tuning.

従来、この種の受信機には、一般に、同調状態
か否かの判定をする同調検知回路が組み込まれ、
その同調回路の判定レベルに応じて同調周波数の
掃引を停止させるか否かが決定される。つまり、
受信電波の電界強度が所望の値(以下、この値を
判定限界電界強度という)に達した場合に、同調
回路の判定レベルがローレベルからハイレベル
(又は、ハイレベルからローレベル)に反転し、
これによつて可変容量子の静電容量値変化を停止
させて受信動作を行なわせるものである。
Conventionally, this type of receiver generally has a built-in tuning detection circuit that determines whether or not it is in a tuned state.
Depending on the determination level of the tuning circuit, it is determined whether or not to stop sweeping the tuning frequency. In other words,
When the electric field strength of the received radio wave reaches a desired value (hereinafter, this value is referred to as the judgment limit electric field strength), the judgment level of the tuning circuit is inverted from low level to high level (or from high level to low level). ,
This stops the capacitance value change of the variable capacitor and allows the receiving operation to be performed.

従つて、電界強度が判定限界電界強度よりも小
さな範囲では同調周波数掃引は停止せず、受信状
態とはならない。一方、電界強度が判定限界電界
強度よりも大きい範囲では、同調検知回路の判定
出力により同調周波数掃引は停止し、受信可能状
態に固定される。
Therefore, in a range where the electric field strength is smaller than the decision limit electric field strength, the tuning frequency sweep does not stop and the receiving state does not occur. On the other hand, in a range where the electric field strength is greater than the determination limit electric field strength, the tuning frequency sweep is stopped by the determination output of the tuning detection circuit, and the state is fixed in a receivable state.

このように判定限界電界強度は同調検知回路の
判定レベルや電圧利得の設定によつて決まるた
め、信号対雑音比(S/N比)が充分良好な出力
を得、さらに外部雑音電波に対しても同調判定の
誤動作をなくするために、その判定限界強度を充
分強い例えば40〜50dB/mの電界強度に設定す
ると同調検知回路の判定動作に支障を生じる。な
ぜなら、前述の充分高い電界強度の受信信号が入
力されると、同調検知回路の入力信号レベルが自
動利得制御回路(以下、AGC回路という)の働
きによりほぼ一定に保持されるからである。通
常、同調検知回路はある基準電圧と入力信号レベ
ルとを比較し、その比較出力をもつて周波数掃引
の停止信号としている。よつて、基準電圧の温度
特性等によりその値にバラツキが生じると、ほぼ
一定の入力信号レベルに対する判定動作にもバラ
ツキが生じることになる。
In this way, the judgment limit electric field strength is determined by the judgment level and voltage gain settings of the tuning detection circuit, so it is possible to obtain an output with a sufficiently good signal-to-noise ratio (S/N ratio) and to be able to withstand external noise radio waves. However, if the determination limit strength is set to a sufficiently strong electric field strength of, for example, 40 to 50 dB/m, in order to eliminate erroneous operation of the tuning detection circuit, the determination operation of the tuning detection circuit will be hindered. This is because when the above-mentioned received signal with sufficiently high field strength is input, the input signal level of the tuning detection circuit is held almost constant by the action of the automatic gain control circuit (hereinafter referred to as the AGC circuit). Normally, a tuning detection circuit compares a certain reference voltage with an input signal level, and uses the comparison output as a frequency sweep stop signal. Therefore, if variations occur in the value of the reference voltage due to temperature characteristics or the like, variations will also occur in the determination operation for a substantially constant input signal level.

これを解消するために従来から提案されている
方法として、第1図に示すように、外部スイツチ
により受信部の電圧利得を強制的に低下させ、も
つて強い電界強度の受信信号が入力されても増幅
出力がAGC回路で決まる出力レベルには達しな
いようにした所謂ローカル・デイスタンス切り換
え部12が設けられている。即ち、ローカル・デ
イスタンス切り換え部12に接続された可変抵抗
器14の抵抗値により、第1図の場合にはアンテ
ナ同調部2の選択度Qを低下させ、等価的に40〜
50dB/mの電界強度時にも同調検知部2の入力
信号レベルが直線的に変化するようにし、見かけ
上判定限界電界強度を高めたものである。これに
よつて、アンテナ1から入力される信号が弱い電
界強度のとき同調検知部8の例えばハイレベル出
力により、制御部9はアンテナ同調部2および局
部発振回路部5の可変容量ダイオードに印加する
直流電圧を変化させ、もつて周波数掃引を継続す
る。一方、強い電界強度の入力に対しては同調検
知部の出力がロウレベルに反転し、これによつて
制御部9の印加電圧変化は停止し、もつて周波数
掃引も停止して受信状態となる。
As shown in Figure 1, a conventional method proposed to solve this problem is to forcibly reduce the voltage gain of the receiver using an external switch, thereby preventing the input of a received signal with a strong electric field strength. Also provided is a so-called local distance switching section 12 that prevents the amplified output from reaching the output level determined by the AGC circuit. That is, depending on the resistance value of the variable resistor 14 connected to the local distance switching section 12, the selectivity Q of the antenna tuning section 2 is reduced in the case of FIG.
Even when the electric field strength is 50 dB/m, the input signal level of the tuning detection section 2 is made to change linearly, so that the apparent determination limit electric field strength is increased. As a result, when the signal input from the antenna 1 has a weak electric field strength, the control section 9 applies the signal to the variable capacitance diode of the antenna tuning section 2 and the local oscillation circuit section 5 by, for example, a high level output of the tuning detection section 8. The frequency sweep is continued by changing the DC voltage. On the other hand, in response to a strong electric field strength input, the output of the tuning detection section is inverted to a low level, thereby stopping the change in the voltage applied to the control section 9, and also stopping the frequency sweep to enter the receiving state.

尚、アンテナ同調部2で選択同調された信号は
高周波増幅部3で増幅され、混合部4により局部
発振回路部5の発振出力と混合されて中間周波信
号が得られる。この信号は中間周波増幅部6で増
幅され、検波部7で検波されてその検波出力が出
力端子13から得られる。又、検波出力は信号強
度検知部10へ入力されて直流電圧に変換され、
その電圧はAGC回路11に入力され、もつてア
ンテナ同調部2、高周波増幅部3および中間周波
増幅部6の利得が制御される。
The signal selectively tuned by the antenna tuning section 2 is amplified by the high frequency amplification section 3, and mixed with the oscillation output of the local oscillation circuit section 5 by the mixing section 4 to obtain an intermediate frequency signal. This signal is amplified by the intermediate frequency amplification section 6, detected by the detection section 7, and the detected output is obtained from the output terminal 13. Further, the detection output is input to the signal strength detection section 10 and converted into a DC voltage,
The voltage is input to the AGC circuit 11, which controls the gains of the antenna tuning section 2, high frequency amplification section 3, and intermediate frequency amplification section 6.

このように、第1図の受信機によれば充分強い
電界強度でも、ローカル・デイスタンス切り換え
部12の可変抵抗器14により同調検知部8の判
定動作は確実に正確に行ないうる。
As described above, according to the receiver shown in FIG. 1, even if the electric field strength is sufficiently strong, the variable resistor 14 of the local distance switching section 12 allows the tuning detection section 8 to perform the determination operation reliably and accurately.

しかし、かかる受信機では同調検知部8により
周波数掃引が停止しても、アンテナ同調部2の電
圧利得はローカル・デイスタンス切り換え部12
および可変抵抗器14により低下したままであ
る。
However, in such a receiver, even if the frequency sweep is stopped by the tuning detection section 8, the voltage gain of the antenna tuning section 2 is
and remains lowered by the variable resistor 14.

一般に、増幅段を多段直結した場合、より前段
の増幅器の利得を大きく設定した方が得られる出
力信号のS/N比は良好になるという事は知られ
ている。しかし、第1図の場合、前述のようにア
ンテナ同調部の利得は低下したままであり、よつ
て出力端子13に得られる検波出力のS/N比は
悪下してしまうことになる。
Generally, it is known that when multiple amplification stages are directly connected, the S/N ratio of the output signal will be better if the gain of the amplifier in the previous stage is set larger. However, in the case of FIG. 1, the gain of the antenna tuning section remains reduced as described above, and as a result, the S/N ratio of the detected output obtained at the output terminal 13 deteriorates.

これをさけるために、ローカル・デイスタンス
切り換え部12により中間周波増幅部6の利得を
低下させるように構成すれば、前述のように同調
検知部8の判定動作は確実にかつ正確になされ、
しかも受信時の出力信号のS/N比劣化も避ける
ことができる。しかし、かかる構成では、充分強
い電界強度の受信信号が入力されると、アンテナ
同調部2および高周波増幅部3が飽和してしま
い、得られる検波信号は歪の多いものとなつてし
まう。
In order to avoid this, if the local distance switching section 12 is configured to reduce the gain of the intermediate frequency amplification section 6, the judgment operation of the tuning detection section 8 can be performed reliably and accurately as described above.
Furthermore, deterioration of the S/N ratio of the output signal during reception can also be avoided. However, in such a configuration, when a received signal with a sufficiently strong electric field strength is input, the antenna tuning section 2 and the high frequency amplification section 3 become saturated, and the obtained detected signal becomes highly distorted.

このように、従来の受信機では同調検知部2の
判定動作を確実で正確なものとするため、アンテ
ナ同調部2や高周波増幅段3の利得を低下さるよ
うに構成すると得られる検波出力のS/N比は非
常に劣化したものとなり、これを解消するために
中間周波増幅部6の利得を低下させると得られる
検波出力は歪の多いものとなる。
In this way, in order to make the judgment operation of the tuning detection section 2 reliable and accurate, in the conventional receiver, the gain of the antenna tuning section 2 and the high frequency amplification stage 3 is configured to be lowered, so that the S of the detection output obtained is reduced. The /N ratio becomes extremely degraded, and if the gain of the intermediate frequency amplification section 6 is lowered in order to eliminate this, the obtained detection output will have a lot of distortion.

本発明の目的は、S/N比の劣化および歪率の
増大を防止しながら同調検知動作を確実に行なう
ための手段を簡単な構成で実現した受信機を提供
することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a receiver that has a simple configuration and implements means for reliably performing a tuning detection operation while preventing deterioration of the S/N ratio and increase of distortion rate.

本発明は、アンテナ同調部の同調コイルにトラ
ンジスタを並列結合させ、このトランジスタに掃
引状態であることを示す信号を供給することに共
に自動利得制御信号を供給し、これによつてアン
テナ同調部の同調周波数掃引状態での利得制御と
掃引停止状態での利得制御とを前記トランジスタ
で共用して行なうことを特徴とする。
The present invention combines a transistor in parallel with a tuning coil of an antenna tuning section, and provides a signal indicating a sweep condition to the transistor, and also provides an automatic gain control signal, thereby controlling the tuning coil of the antenna tuning section. The present invention is characterized in that the transistor performs both gain control in the tuned frequency sweep state and gain control in the sweep stop state.

すなわち、本発明では、掃引状態を示す信号を
前記トランジスタに供給してアンテナ同調部の利
得を下げ、これによつて歪率を増大させることな
く同調検知動作を行ない、一方、同調状態時には
前記トランジスタに自動利得制御信号を供給し、
これによつてS/N比の劣化を防止しており、し
かも、一つのトランジスタを共用しているのでそ
のための構成が簡素化されている。
That is, in the present invention, a signal indicating the sweep state is supplied to the transistor to lower the gain of the antenna tuning section, thereby performing a tuning detection operation without increasing the distortion factor. provides an automatic gain control signal to
This prevents deterioration of the S/N ratio, and since one transistor is shared, the configuration for this purpose is simplified.

以下、本発明について図面を参照して詳細に説
明しよう。
Hereinafter, the present invention will be explained in detail with reference to the drawings.

第2図は本発明の動作原理を示すブロツク図
で、第1図と同一機能は同一番号を符してその説
明は省略する。第2図において、ローカル・デイ
スタンス部12の信号を、同調検知部8の出力信
号、すなわちローカル・デイスタンス部12およ
び可変抵抗値14による見かけ上の判定限界電界
強度に受信信号の電界強度が達したときの周波数
掃引を停止させるための信号により動作するゲー
ト回路部15を介してアンテナ同調部2へ入力し
ている。
FIG. 2 is a block diagram showing the operating principle of the present invention, and the same functions as those in FIG. 1 are designated by the same numbers and their explanations will be omitted. In FIG. 2, the electric field strength of the received signal is determined by converting the signal of the local distance section 12 to the output signal of the tuning detection section 8, that is, the apparent judgment limit electric field strength due to the local distance section 12 and the variable resistance value 14. It is input to the antenna tuning section 2 via a gate circuit section 15 that operates based on a signal for stopping the frequency sweep when the frequency is reached.

よつて、同調がとれておらず弱い電界強度のと
きは、同調検知部8のハイレベル信号によりゲー
ト回路部15はそのゲート開き、よつて判定限界
電界強度はローカル・デイスタンス部12、可変
抵抗器14および受信部の増幅段の利得や同調検
知部8の判定レベルにより決まる。従つて、強い
電界強度でもアンテナ同調部2の利得を下げてお
けば、同調検知部8の判定動作は確実にしかも正
確に行なえる。
Therefore, when synchronization is not achieved and the electric field strength is weak, the gate circuit section 15 opens its gate in response to a high level signal from the synchronization detection section 8, and the judgment limit electric field strength is determined by the local distance section 12 and the variable resistor. It is determined by the gain of the amplifier 14 and the amplification stage of the receiving section and the judgment level of the tuning detection section 8. Therefore, even if the electric field strength is strong, by lowering the gain of the antenna tuning section 2, the determination operation of the tuning detection section 8 can be performed reliably and accurately.

一方、入力電界強度が見かけ上の判定限界強度
よりも大きくなると、同調検知部8の周波数掃引
停止信号となるロウレベル出力信号によりゲート
回路部15のゲートが閉じ、アンテナ同調部2の
利得は可変抵抗器14の抵抗値によらずAGC回
路部11によつて制御される。この結果、アンテ
ナ同調部2の利得は大きくなり、得られる検波出
力のV/N比も良好なものとなる。
On the other hand, when the input electric field strength becomes larger than the apparent judgment limit strength, the gate of the gate circuit section 15 is closed by the low level output signal which becomes the frequency sweep stop signal of the tuning detection section 8, and the gain of the antenna tuning section 2 is changed by the variable resistance. It is controlled by the AGC circuit section 11 regardless of the resistance value of the device 14. As a result, the gain of the antenna tuning section 2 becomes large, and the V/N ratio of the obtained detection output also becomes good.

本発明は以上の動作原理にもとづき、アンテナ
同調部2の同調周波数掃引時の利得制御と同調状
態での利得制御とを簡単な構成で実現する手段を
提供するもので、その一実施例を第3図に示す。
なお、第3図では説明の簡略化のために、同調検
知部8、ローカル・デイスタンス部12、ゲート
回路部15およびアンテナ同調部2を示してい
る。
Based on the above-mentioned operating principle, the present invention provides means for realizing gain control during tuning frequency sweep of the antenna tuning section 2 and gain control in the tuned state with a simple configuration. Shown in Figure 3.
Note that, in FIG. 3, the tuning detection section 8, local distance section 12, gate circuit section 15, and antenna tuning section 2 are shown for the sake of simplification of explanation.

即ち、端子30から入力される中間周波増幅部
6の出力はセラミツクフイルター31を介してト
ランジスタQ1、抵抗R1およびコンデンサC1から
なるAM検波器で整流され、差動増幅器の一方の
入力端となるトランジスタQ2のベースへ印加さ
れる。他の入力端となるトランジスタQ3のベー
スには、ダイオードD1,D2および抵抗R2のバイ
アス回路のダイオードD2に生じる電圧降下を抵
抗R3,R4で分圧し、その分圧電圧が基準電圧と
して供給されている。このとき、抵抗R3および
R4の設定によりトランジスタQ3のベース電位は
0.1〜0.2VだけトランジスタQ2のベース電位より
も高く設定されている。よつて、弱電界強度でで
はトランジスタQ2およびQ3は各々遮断および導
通状態にある。尚、ダイオードD3およびトラン
ジスタQ4は差動増幅器の負荷であり、抵抗R5
電流源を構成する。
That is, the output of the intermediate frequency amplifying section 6 inputted from the terminal 30 is rectified by an AM detector consisting of a transistor Q 1 , a resistor R 1 and a capacitor C 1 via a ceramic filter 31, and is then sent to one input terminal of the differential amplifier. is applied to the base of transistor Q2 . The base of the transistor Q 3 , which is the other input terminal, is connected to the voltage drop generated in the diode D 2 of the bias circuit consisting of the diodes D 1 and D 2 and the resistor R 2 , which is divided by the resistors R 3 and R 4 . is supplied as a reference voltage. At this time, the resistance R 3 and
Depending on the setting of R 4 , the base potential of transistor Q 3 is
It is set higher than the base potential of transistor Q2 by 0.1-0.2V. Thus, at low field strengths, transistors Q 2 and Q 3 are in a cut-off and conduction state, respectively. Note that the diode D 3 and the transistor Q 4 are the load of the differential amplifier, and the resistor R 5 constitutes a current source.

トランジスタQ2の遮断によりトランジスタQ5
のベースにはハイレベルの電位が印加され、これ
によつてトランジスタQ5,Q6は導通し、これら
のコレクタ電位はロウレベルとなる。第1および
第2図の説明と一致したいならば、各々のコレク
タ出力にさらに反転増幅器を接続するか、又はト
ランジスタQ5,Q6を取り除けばよい。さらに、
以後の回路動作も反転するように構成すればよ
い。
Transistor Q 5 due to the interruption of transistor Q 2
A high level potential is applied to the bases of the transistors Q 5 and Q 6 , thereby making the transistors Q 5 and Q 6 conductive, and their collector potentials become low level. If it is desired to comply with the description of FIGS. 1 and 2, an inverting amplifier may be further connected to each collector output, or transistors Q 5 and Q 6 may be removed. moreover,
The subsequent circuit operation may also be configured to be reversed.

トランジスタQ5のコレクタはゲート回路部1
5への信号として、トランジスタQ6のコレクタ
は端子33を介する制御部9への信号として用い
られる。この弱電界時でのトランジスタQ5の導
通により定電流源32の電流は引き込まれ、これ
によつてダイオードD4,D5を介するトランジス
タQ7のベースはロウレベルとなる。よつてトラ
ンジスタQ7は遮断し、このことはゲート回路1
5のゲートが開いてローカル・デイスタンス切り
換え部12および可変抵抗器14によりアンテナ
同調部2の利得を低下している。
The collector of transistor Q 5 is gate circuit section 1
As a signal to 5, the collector of transistor Q 6 is used as a signal to control 9 via terminal 33. Due to the conduction of the transistor Q5 in this weak electric field, the current of the constant current source 32 is drawn in, so that the base of the transistor Q7 via the diodes D4 and D5 becomes low level. Therefore, transistor Q 7 is cut off, which means that gate circuit 1
5 is opened, and the gain of the antenna tuning section 2 is lowered by the local distance switching section 12 and the variable resistor 14.

即ち、トランジスタQ7の遮断による定電流源
34からの電流によりダイオードD6,D7にはバ
イアス電圧が生じ、これによつてトランジスタ
Q8は導通する。トランジスタQ8のベースには定
電流源34によつて所定の電流が供給されてお
り、よつてこのコレクタ電流は端子35に接続さ
れた可変抵抗器14の抵抗値によつて任意に設定
できる。トランジスタQ8のコレクタ電流による
抵抗R6、ダイオードD8の電圧降下によりトラン
ジスタQ9は導通し、これによつてトランジスタ
Q10,Q12は導通する。トランジスタQ12のコレク
タは端子36に接続され、さらにコンデンサC2
を介してアンテナ同調部2へ接続されている。
That is, a bias voltage is generated in the diodes D 6 and D 7 due to the current from the constant current source 34 due to the cutoff of the transistor Q 7 , which causes the transistor Q 7 to be cut off.
Q 8 is conductive. A constant current source 34 supplies a predetermined current to the base of the transistor Q 8 , and the collector current can be arbitrarily set by the resistance value of the variable resistor 14 connected to the terminal 35 . Due to the voltage drop across resistor R 6 and diode D 8 due to the collector current of transistor Q 8, transistor Q 9 becomes conductive.
Q 10 and Q 12 are conductive. The collector of transistor Q 12 is connected to terminal 36 and is further connected to capacitor C 2
It is connected to the antenna tuning section 2 via.

アンテナ同調部2は、端子41に制御部9から
の同調周波数掃引のための信号電圧が印加され、
それによつて容量値が変化する可変容量ダイオー
ド39および同調用コイル40で構成され、トラ
ンジスタQ12のコレクタは可変容量ダイオード3
9とコイル40との接続点に接続されている。
The antenna tuning unit 2 has a terminal 41 applied with a signal voltage for tuning frequency sweep from the control unit 9,
It is composed of a variable capacitance diode 39 whose capacitance value changes accordingly, and a tuning coil 40, and the collector of the transistor Q12 is connected to the variable capacitance diode 3.
9 and the coil 40.

従つて、可変抵抗器14の抵抗値によつて決ま
るトランジスタQ8の電流により、トランジスタ
Q12のコレクタ・エミツタ間導通インピーダンス
が変化する。これにより、コイル40と可変容量
ダイオード39との接続点のインピーダンスが変
化することになり、これによつてアンテナ同調部
2の選択度Qを低下させ、もつてより強い電界強
度に対する判定動作を確実で正確なものとしてい
る。
Therefore, the current of the transistor Q8 determined by the resistance value of the variable resistor 14 causes the transistor
Q12 's collector-emitter conduction impedance changes. As a result, the impedance at the connection point between the coil 40 and the variable capacitance diode 39 changes, thereby reducing the selectivity Q of the antenna tuning section 2 and ensuring determination operation for stronger electric field strengths. It is assumed to be accurate.

尚、同調コイル40の他方はコンデンサC3
介して高周波増幅部3の入力となる端子42へ接
続されている。又、トランジスタQ10のベースに
は端子43が接続され、この端子43にはAGC
回路11によるAGC電圧が供給される。
Note that the other end of the tuning coil 40 is connected to a terminal 42 which is an input to the high frequency amplification section 3 via a capacitor C3. Further, a terminal 43 is connected to the base of the transistor Q10 , and the AGC
AGC voltage by circuit 11 is supplied.

次に、受信信号の電界強度が40〜50dB/m以
上になり、トランジスタQ1のエミツタ電位、即
ちトランジスタQ2のベース電位が差動増幅器の
入力差分の約0.2Vよりも大きくなると、トラン
ジスタQ2が導通する。これによりトランジスタ
Q5およびQ6は遮断する。トランジスタQ6の遮断
により端子33に得られる信号レベルは反転し、
もつて制御部9の電圧変化は停止して同調周波数
掃引は停止する。
Next, when the electric field strength of the received signal becomes 40 to 50 dB/m or more and the emitter potential of transistor Q 1 , that is, the base potential of transistor Q 2 becomes larger than the input difference of the differential amplifier, about 0.2 V, transistor Q 2 conducts. This allows the transistor
Q 5 and Q 6 are blocked. By blocking transistor Q 6 , the signal level available at terminal 33 is reversed,
At that point, the voltage change in the control section 9 stops and the tuning frequency sweep stops.

これと共に、トランジスタQ5の遮断により定
電流源32の電流はトランジスタQ7のベースへ
供給され、トランジスタQ7は導通する。トラン
ジスタQ7が導通すると、定電流源34の電流を
引き込むのでトランジスタQ8は遮断する。よつ
て、トランジスタQ9も遮断し、トランジスタ
Q10,Q12への可変抵抗器14による電流供給は
なくなる。このため、アンテナ同調器2は端子4
3から入力されるAGC電圧によつて定まる電圧
利得で動作し、得られる検波出力のS/N比劣化
という問題はない。
At the same time, the current of the constant current source 32 is supplied to the base of the transistor Q 7 by cutting off the transistor Q 5 , and the transistor Q 7 becomes conductive. When transistor Q 7 becomes conductive, it draws current from constant current source 34, so transistor Q 8 is cut off. Therefore, transistor Q9 is also cut off, and transistor
Current supply from the variable resistor 14 to Q 10 and Q 12 is eliminated. Therefore, the antenna tuner 2 is connected to the terminal 4.
It operates with a voltage gain determined by the AGC voltage input from 3, and there is no problem of deterioration of the S/N ratio of the obtained detection output.

以上のように、本発明によれば簡単な構成によ
つて強い電界強度での同調検知判定が確実に、正
確に行なわれると共に、検波出力のS/N比も充
分良好でしかも歪率も良好となる。また、非同調
時の利得が小さいので放送電波のない所での受信
時に生じる耳ざわりなnoiseも少くすることがで
きる。
As described above, according to the present invention, with a simple configuration, tuning detection judgment can be performed reliably and accurately under strong electric field strength, and the S/N ratio of the detection output is sufficiently good as well as the distortion rate is also good. becomes. Furthermore, since the gain when out-of-tuning is small, it is possible to reduce the unpleasant noise that occurs when receiving in a place where there is no broadcast radio wave.

尚、本発明は上記実施例に限定されないこと無
論である。即ち、同調検知部8の出力信号レベル
の変化状態は任意に設定でき、それに応じてゲー
ト回路部15の動作状態を変更すればよい。又、
第3図に示した具体的回路構成も適宜反転増幅器
や回路素子を挿入しても一向にかまわない。さら
に又、制御部9による可変容量ダイオードの制御
も、高周波増幅部3にも適用してもよく、可変抵
抗器14も予め適切な値の固定抵抗器でもよい。
そしてさらに、同調検知部8の入力は検波部7か
らとつてもよく、信号強度検知部10の入力も中
間周波増幅部6からとつてもよい。
It goes without saying that the present invention is not limited to the above embodiments. That is, the state of change in the output signal level of the tuning detection section 8 can be set arbitrarily, and the operating state of the gate circuit section 15 can be changed accordingly. or,
In the specific circuit configuration shown in FIG. 3, an inverting amplifier or circuit element may be inserted as appropriate. Furthermore, the control of the variable capacitance diode by the control section 9 may also be applied to the high frequency amplification section 3, and the variable resistor 14 may also be a fixed resistor with an appropriate value in advance.
Furthermore, the input to the tuning detection section 8 may be taken from the detection section 7, and the input to the signal strength detection section 10 may also be taken from the intermediate frequency amplification section 6.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の自動同調型AM受信機のブロツ
ク図、第2図は本発明の動作原理を示すブロツク
図、第3図は本発明の一実施例を示す回路結線図
である。 1……アンテナ、2……アンテナ同調部、3…
…高周波増幅部、4……混合部、5……局部発振
回路部、6……中間周波増幅部、7……検波部、
8……同調検知部、9……制御部、10……信号
強度検知部、11……AGC回路部、12……ロ
ーカル・デイスタンス切り換え部、13……出力
端子、14……可変抵抗器、15……ゲート回路
部、Q1〜Q12……トランジスタ、R1〜R6……抵
抗、C1〜C3……コンデンサ、31……セラミツ
クフイルタ、39……可変容量ダイオード、40
……同調用コイル。
FIG. 1 is a block diagram of a conventional automatic tuning type AM receiver, FIG. 2 is a block diagram showing the operating principle of the present invention, and FIG. 3 is a circuit diagram showing an embodiment of the present invention. 1...Antenna, 2...Antenna tuning section, 3...
... High frequency amplification section, 4 ... Mixing section, 5 ... Local oscillation circuit section, 6 ... Intermediate frequency amplification section, 7 ... Detection section,
8... Tuning detection section, 9... Control section, 10... Signal strength detection section, 11... AGC circuit section, 12... Local distance switching section, 13... Output terminal, 14... Variable resistor , 15...gate circuit section, Q1 - Q12 ...transistor, R1 - R6 ...resistor, C1 - C3 ...capacitor, 31...ceramic filter, 39...variable capacitance diode, 40
...tuning coil.

Claims (1)

【特許請求の範囲】[Claims] 1 同調周波数の掃引状態であることを示す信号
に応答してアンテナ同調部の利得を下げ、この状
態で同調周波数の掃引を行ない、同調周波数の信
号レベルが所定値に達したときに同調周波数の掃
引を停止し、かつ前記掃引状態であることを示す
信号の発生を停止して前記アンテナ同調部の利得
を同調状態での自動利得制御信号によつて決定さ
れる状態にする受信機において、前記アンテナ同
調部は同調コイルとこのコイルに実質的に並列結
合されたトランジスタとを有し、このトランジス
タに前記掃引状態であることを示す信号を供給す
ると共に前記自動利得制御信号を供給し、これに
よつて前記アンテナ同調部の同調周波数掃引状態
での利得制御と掃引停止状態での利得制御とを前
記トランジスタを共用して行なうことを特徴とす
る受信機。
1 In response to a signal indicating that the tuning frequency is in the sweep state, the gain of the antenna tuning section is lowered, the tuning frequency is swept in this state, and when the signal level of the tuning frequency reaches a predetermined value, the tuning frequency is changed. In the receiver, the sweep is stopped, and the generation of the signal indicating the sweep state is stopped, and the gain of the antenna tuning section is set to a state determined by the automatic gain control signal in the tuning state. The antenna tuning section has a tuning coil and a transistor coupled substantially in parallel to the coil, and provides the transistor with a signal indicating the sweep condition and provides the automatic gain control signal; Accordingly, the receiver is characterized in that the transistor is used in common to perform gain control in the tuned frequency sweep state of the antenna tuning section and gain control in the sweep stop state.
JP6141580A 1980-05-09 1980-05-09 Receiver Granted JPS56158529A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6141580A JPS56158529A (en) 1980-05-09 1980-05-09 Receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6141580A JPS56158529A (en) 1980-05-09 1980-05-09 Receiver

Publications (2)

Publication Number Publication Date
JPS56158529A JPS56158529A (en) 1981-12-07
JPS6230536B2 true JPS6230536B2 (en) 1987-07-02

Family

ID=13170448

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6141580A Granted JPS56158529A (en) 1980-05-09 1980-05-09 Receiver

Country Status (1)

Country Link
JP (1) JPS56158529A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4509204A (en) * 1983-09-23 1985-04-02 National Semiconductor Corporation AM Radio stop detector

Also Published As

Publication number Publication date
JPS56158529A (en) 1981-12-07

Similar Documents

Publication Publication Date Title
US5175883A (en) Receiving apparatus
EP0428170B1 (en) Radio receiver comprising automatic gain controlling function
US3344355A (en) Delayed automatic gain control for transistorized wave signal receivers
US4030035A (en) Circuit for preventing output clipping of R.F. stage in radio receiver
JP2589202B2 (en) Radio sensitivity switching circuit
US4147991A (en) Automatic gain control apparatus
US4041390A (en) Transceiver squelch circuit
JPS6230536B2 (en)
US4313218A (en) Extended AGC for a radio receiver
US4330866A (en) Arrangement for selectively routing a signal indicative of received signal strength to different portions of a radio receiver in response to different levels of a control signal
US3596184A (en) Squelch circuit with squelch tail elimination
US4411019A (en) AGC System for television receivers
US3548315A (en) Compensated vhf-uhf automatic gain control delay system
US3823379A (en) Television automatic gain control circuitry providing for compatible control of vhf tuner and uhf tuner
JPS6046133A (en) Radio receiver
JP3143393B2 (en) AM radio receiver
US4558289A (en) Bias and AGC control of two RF amplifiers with a shared control element
US3968438A (en) Off channel gain control circuit
US5303410A (en) Signal strength meter circuit for radio receiver
JP3082922B2 (en) Radio receiver
JP3809334B2 (en) Television tuner
JPS6025930B2 (en) Muting circuit
JP3060708B2 (en) FM receiver
JPS6345051Y2 (en)
JP3149615B2 (en) AM receiver