JPS62291847A - Fluorescent display pannel - Google Patents

Abstract

PURPOSE:To make IC logic levels exactly recognized to realize stable normal operations, by making wiring pattern, in which power supply terminals of an IC element are connected, larger in width than the general wiring pattern. CONSTITUTION:External drawing-out leads are connected with external drawing- out leadpads 7, with the fixed supply powers and signals being inputted. The pads 7 are connected with bonding pads 6, which function as power sources in IC chips and input terminals for the signals, by using aluminium wiring layers 2 formed larger in width than the general wiring pattern. Besides, the pads 7 are connected with thick wiring layers 71-73 of power supply lines. Such formation of the thick layers enables the wiring resistance value in IC chip power supply lines to be lowered, so that it can be exactly recognized whether IC logic levels are high or low, to realize stable normal operations.

Description

[Detailed Description of the Invention] 3. Detailed Description of the Invention (Industrial Application Field) The present invention is a device that incorporates a drive circuit for a display section in a vacuum, commonly known as C.
IG (chip in glass, chip 1nGlass)
) structure.

(Prior Art) FIG. 2 is a partially cutaway perspective view of a conventional example of this type of fluorescent display panel, and FIG. 3 is a cutaway plan view of the main part of FIG. 2. A wiring layer 2, an insulating layer 3, a phosphor layer 5, a bonding pad 6, and an external terminal pad 7 are formed on the glass substrate 1, and an IC chip 8 for a drive circuit is fixed in a predetermined position. Ponding pad 6 and IC according to law etc.
An anode substrate 9 is connected to the chip 8 . Further, a portion of the external drawer 10, a grid 11, and a filament 12 are arranged on the anode substrate 9, and are vacuum-sealed together with a cover glass 13 using a low melting point glass 14.

In a fluorescent display panel having such a CIG structure, by applying a predetermined voltage and signal to the external drawer 10, the display section 15 can be driven and emitted light via the IC chip 8. There was an advantage that the number of drawer doors 10 could be significantly reduced.

[Problem that the invention seeks to solve]

In fluorescent display panels having such a CIG structure, problems often occur such as malfunction or non-operation of the mounted IC chip 8. This problem is relatively rare in segment-type CIG fluorescent display panels equipped with only one chip, as shown in Figures 2 and 3 as conventional examples, but a display of several tens of digits is made up of 5 x 7 dots. The above problem is likely to occur in dot character type CIG fluorescent display panels.

Analysis has revealed that the cause of this problem is a voltage drop occurring within the wiring layer 2 from the external lead IO, which serves as the power supply line for the mounted IC chip, to the IC chip 8.

In particular, in a dot character type CIG fluorescent display panel, it is necessary to mount a plurality of IC chips 8 that serve as anode drivers and grid drivers, and it is also necessary to increase the density of the thin film wiring formed on the glass substrate 1. Therefore, if the anode pattern design standard of a general fluorescent display panel that does not have a CIG structure is used, the wiring resistance value will be high, and the power supply voltage (VDII) of the IC chip 8, which is 5V, will be applied to the external lead-out board 10. Even if applied, the actual human power pad of IC chip 8 has 3.5V L.
, or no voltage is applied, resulting in a fairly large voltage drop. In a normal fluorescent display panel that does not have a CIG structure, the anode current is as small as about IIIA, and even if the wiring resistance is +00Ω, the voltage drop is 1 mAX 100Ω = 0. IV, which is a value that can usually be ignored, and there was no need to consider it in the design.

However, in logic circuits, the allowable fluctuation range for high (L) level and low (L) level input terminals is specified, and within this range, it will operate reliably as H or L. However, if fluctuations occur beyond this range, I
It becomes obvious that C is malfunctioning or not working.

Therefore, in the fluorescent display tube having the CIG structure,
There is a drawback that the wiring layout must be designed after sufficient consideration has been given to the selection of the wiring resistance value, depending on the type, quantity, or electrical characteristics of the IC chips to be mounted.

[Means for solving problems]

A fluorescent display panel of the present invention is a fluorescent display panel in which a display section made of a phosphor and a drive circuit composed of an IC element for driving the display section are provided in a vacuum container on a glass substrate. The width of the wiring pattern to which the power supply terminal is connected is approximately 20 times or more larger than the width of the general wiring pattern.

In this way, among the wiring patterns, the VDD line, which is the power supply line for the IC element, the Vss line, and the GND
By making the wiring width of the line extremely thick, the wiring resistance is sufficiently lowered and the ability to supply power to the IC elements is increased.

(Example) Next, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a diagram showing an internal wiring pattern of an embodiment of the fluorescent display panel of the present invention.

Here, we will discuss the dot character type CIG fluorescent display panel with 5 x 7 dots (with cursor) and 40 digit display.
The first one is made of aluminum thin film to make the explanation easier to understand.
Only layer wiring patterns are shown. It is assumed that the displayed member groups represent members having the same reference numerals as shown in FIG. 2.3, or members having the same reference numerals are assembled.

In this embodiment, external drawer leads 10 are connected to the external drawer batts 7 at both ends, and predetermined power supply and signals are input thereto. Batt 7 for external drawer has aluminum wiring layer 2
It is electrically connected to the honda pad 6 which serves as the power supply and signal input terminal for the IC chip. The bonding pad 60, which serves as the output terminal of the IC chip, has a size of 5×7.
It is connected to a dotted anode display section 15 by a fine aluminum wiring layer 2.

In this way, the fluorescent display panel with the CIG structure of this embodiment can control the pads 6 and 60 to which IC chips are connected by applying a predetermined voltage and signal to the external drawer batt 7. It becomes possible to drive the display section 15 and cause it to emit light.

In FIG. 1, the portion where the aluminum wiring layer 2 is extremely thick is the main part of the present invention. Three thick wiring layers 71.7 connected to the left external lead lead bat 7
2.73 is the power supply line of the IC, the wiring layer 71 is the Vss line, the wiring layer 72 is the VDD line, and the wiring layer 73 is the VSS line.
is the GND line. On the other hand, one thick wiring layer 73 connected to the external lead pad 7 on the right side is also connected to the external lead pad 7 on the left side.
This is the ND line. This embodiment has a structure in which two external leads are connected to the GND line.

By forming such a thick wiring layer, it is possible to reduce the wiring resistance value of the power supply line of the IC chip. In this embodiment, the wiring layer 2 forming the anode display section 15 has a minimum aluminum line width of 50 μm and a line spacing of 4
The wiring pattern is formed with a width of 70 degrees and an interval of 50 degrees as an average value of 0-1, while the wiring layers 71, 72, and 73, which are IC power supply lines, have a minimum line width of 20 degrees.
Maximum 4 mm (4000μ), average value 150
The line width is 0p, which is about 20 times the line width of the display section 15. Furthermore, since the GND line is provided with external leads at both ends, current is distributed, and as a result, the combined resistance value is lowered.

The wiring combined resistance values in this example are: 7.9Ω for the Vss line 71, 9°Ω for the VDD line 72, and 9°Ω for the VDD line 72.
The resistance of the ND line 73 is actually measured to be 1.5Ω. At this resistance value, it was confirmed that the logic functions (H and L levels) of the IC mounted on the glass substrate operated normally.

In addition, in this example, two external drawer leads are connected only to the GND line, but VDD, V
It goes without saying that the ss line may be connected to two or more external leads at the same time, and it is obvious that this can be selected after thorough consideration of the characteristics of the IC chip to be mounted and the design stage of the CIG fluorescent display panel.

〔Effect of the invention〕

As explained above, the present invention makes it possible to keep the wiring resistance low by widening the width of the thin film wiring connected to the power supply terminal (VD (1, Vss, GND terminal)) of the IC element of the fluorescent display panel. (2) The effect is that high and low levels, which are logic levels, can be correctly recognized and stable normal operation can be realized.

[Brief Description of the Drawings] Fig. 1 is a diagram showing an internal wiring pattern of an embodiment of the fluorescent display panel of the present invention, Fig. 2 is a partially cutaway perspective view of a conventional example, and Fig. 3 is a diagram showing the internal wiring pattern of an embodiment of the fluorescent display panel of the present invention. FIG. DESCRIPTION OF SYMBOLS 1...Glass substrate, 2...Wiring layer, 6.60...Ponding butt, 7...External lead lead pad, 9...Anode substrate, 15...Anode display section, 16 ...Drive circuit section, 7]--Wiring layer (Vss line), 72-...Wiring layer (VDD line), 73-...Wiring layer (GND line).

Claims (1)

[Claims] 1. A fluorescent display panel in which a display section made of a phosphor and a drive circuit made up of an IC element for driving the display section are provided in a vacuum container on a glass substrate, comprising: A fluorescent display panel characterized in that a wiring pattern width to which a power supply terminal is connected is formed to be approximately 20 times or more larger than a general wiring pattern width. 2. The fluorescent display panel according to claim 1, wherein two or more external leads are connected to at least one of the wiring patterns to which the power supply terminals of the IC elements are connected.