JPS62290364A - Output voltage malfunction detector for inverter - Google Patents

Abstract

PURPOSE:To shorten the time delay from the time of the generation of a voltage malfunction to the time of the detection of it by converting an output voltage from an inverter to an absolute value and comparing it with the set value of a voltage setter. CONSTITUTION:A DC power from a DC power source 2 is input through a smoothing condenser 3 to an inverter 4, and an converted AC power is supplied through a filter of a filter reactor 5 and a filter capacitor 6 to a load 7. A reference sinusoidal wave signal from a reference sinusoidal wave oscillator 11 and an output voltage signal from a transformer 12 are input to the controller 10 of the inverter 4, which controls so that both coincides. In this case, an absolute value converter 21 for converting the output voltage signal into an absolute value, a voltage setter 22, a comparator 23, and a time measuring circuit 24 are provided. Thus, as a result of the comparison by the comparator 23, when the period that it is larger than the set value is longer (shorter) than a predetermined time, the output voltage of the inverter is judged to be malfunction to apply a voltage malfunction signal to the controller 10.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention [Technical Field to Which the Invention Pertains] The present invention relates to a circuit that detects an abnormality in the output voltage of an inverter that outputs an alternating current voltage corresponding to a reference sine wave signal.

[Prior art and its problems]

FIG. 4 is a circuit diagram showing a conventional example of detecting an abnormality in the output voltage of an inverter that outputs an AC voltage corresponding to a reference sine wave signal. The AC power input to the inverter 4 and converted by the inverter 4 is passed through the filter reactor 5.
After the waveform is shaped by a filter circuit composed of a filter capacitor 6 and a filter capacitor 6, the waveform is supplied to a load 7. Reference numeral 10 is an inverter control circuit.
A reference sine wave oscillator 11 is connected to this inverter control circuit 10.
The reference sine wave signal from the inverter 4 is inputted, and the output voltage signal detected by the potential transformer 12 is fed back, and the output voltage of the inverter 4 is controlled according to the above-mentioned reference voltage by instantaneous voltage control. It is controlled to have a value Kf corresponding to a sine wave signal.

In the above-mentioned circuit, a failure of the inverter 4 or the inverter control circuit 10 is the cause.

Protection when the voltage applied to the load 7 becomes abnormal is provided as follows. That is, the output voltage signal of the inverter 4 detected by the instrument transformer 12 is converted into DC by the rectifier 13, and this DC is further averaged by the smoothing circuit 14. Alternatively, the overvoltage detector 16 or the low voltage detector 18 detects whether there is a shortage.

Both the overvoltage detector 16 and the low voltage detector 18 are composed of comparators, and the overvoltage detector 16 is activated when the voltage value input from the smoothing circuit 14 exceeds the value set by the overvoltage setting device 15. When the voltage value input from the smoothing circuit 14 falls below the value set by the low voltage setting device 17, the low voltage detector 18 issues a voltage abnormality signal to the inverter control circuit 10 to determine whether it is necessary to stop the inverter 4, etc. By taking measures, continuous application of abnormal voltage to the load 7 can be avoided.

This is because the inverter output voltage signal input to the overvoltage detector 16 and the low voltage detector 18 needs to be a DC voltage with little ripple content.

A smoothing circuit 14 is provided, and this smoothing circuit 1
The time constant of 4 is increased to reduce the amount of ripple (conventionally, the time constant was about several hundred milliseconds). Therefore, there is a drawback that there is a large time delay from when an abnormality occurs in the output voltage of the inverter 4 until the voltage detectors 16 and 18 detect the abnormal voltage. For example, if the inverter 4 is an inverter that outputs constant-voltage, constant-frequency AC power, and a computer is connected as the load 7, the above-mentioned situation may occur due to a delay in detecting an abnormality in the output voltage of the inverter 4. There is an inconvenience that even if an abnormal voltage is applied for a constant period, the electronic computer will malfunction.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide an inverter output voltage abnormality detection circuit that can detect an output voltage abnormality of an inverter that outputs an AC voltage corresponding to a reference sine wave signal with a very small time delay.

[Key points of the invention]

In this invention, when an inverter outputs alternating current at a rated voltage, a comparator compares a set voltage that is set to be lower than the maximum value of the rated voltage and a voltage waveform obtained by converting the inverter output voltage into an absolute value. However, when the period during which the voltage waveform is higher than the set voltage is longer than a predetermined time.

Alternatively, by configuring the circuit to determine that the inverter output voltage is abnormal when the voltage is short and immediately send a voltage abnormality signal to the inverter control circuit, the use of a smoothing circuit that causes operation delay can be omitted. This is intended to minimize the time delay from the occurrence of a voltage abnormality to its detection.

[Embodiments of the invention]

FIG. 1 is a circuit diagram showing an embodiment of the present invention.

In FIG. 1, DC power from a DC power source 2 is input to an inverter 4 via a smoothing capacitor 3, and the AC power converted by the inverter 4 is composed of a filter reactor 5 and a filter capacitor 6. After being waveform-shaped by the filter circuit, it is supplied to the load 7. A reference sine wave signal from a reference sine wave oscillator 11 and an output voltage signal fed back via an instrument transformer 12 are input to an inverter control circuit 10 for controlling the inverter 4, and the inverter control circuit 10 is always input with the reference sine wave signal from the reference sine wave oscillator 11 and the output voltage signal fed back via the instrument transformer 12. By comparing these two human power signals, the alternating current voltage output from the inverter 4 matches the reference sine wave signal, as in the case of the conventional circuit shown in FIG. 4.

In the present invention, since the output voltage of the inverter 4 having a sine waveform is taken out from the instrument transformer 12, this output voltage signal is inputted to the absolute value conversion circuit 21, which is composed of, for example, a full-wave rectifier. Okay, convert this input into an absolute value and output it.

Assuming that the maximum value of this absolute value output voltage signal is E when the rated voltage is reached, i! The pressure setting device 24 sets a value smaller than this E (ie, O<K<1). The comparator 23 is the absolute value conversion circuit 21
A voltage signal of a sinusoidal waveform whose maximum value is converted into an absolute value and which is outputted from the voltage setting device 22 and a setting signal having a value of −E set by the voltage setting device 22 are inputted.

A signal is sent from the cono comparator 23 to the time measuring circuit 24 when the former value is higher than the edge value.

As mentioned above, the time measurement circuit 24 measures the period during which the output signal of the absolute value conversion circuit 21 is larger than the setting signal from the voltage setting device 22, but the output voltage of the inverter 4 is higher than the rated value. During this period, one person is expressed by the following equation (1), where T is the half cycle time of the output voltage of the inverter 4.

-2・T, -+ TA-sinK・・・・・・・・・・・・・・・・・・
・・・・・・・・・(1)π Here, if the voltage abnormality occurs when the output voltage of the inverter 4 increases or decreases by X percent with respect to the rated voltage, then when the voltage increases by X percent, the comparator 2
The time TB during which the comparator 23 outputs a signal and the time Tc during which the comparator 23 outputs a signal when the X percent voltage decreases are calculated by the following equations (2) and (3), respectively.

"B= ', 7"'-'((1" too)・K)
...Curves...(2) Fig. 2 is a waveform diagram explaining the operating principle of the embodiment circuit shown in Fig. 1, in which the sine waveform A indicated by the solid line is the waveform at the rated voltage. The maximum value is E, and the value set by the voltage setting device 22 is indicated by K.E. The horizontal axis in FIG. 2 is the time axis, and T is the time corresponding to a half cycle, that is, 180 degrees in electrical angle. Here, the voltage waveform when the maximum voltage value increases by X percent to become E.
The time during which the signal is output is TB. Further, the voltage waveform when the voltage is reduced by X percent from the rated voltage is indicated by a broken line C, and the time during which the comparator 23 outputs a signal is Tc.

For example, when the rated output voltage of the inverter 4 is AC100 pol, 50/60 hertz, the setting value of the voltage setting device 22 is 110 volts, and the abnormal voltage is ±10% of the rated voltage, the comparator 23 outputs a signal. The time is the value shown in Table 1 for manure.

FIG. 3 of Table 1 is a circuit diagram showing the inside of the time measuring circuit described in the embodiment circuit shown in FIG. 1, and is designed to be able to switch between 50 hertz and 60 hertz.

When a voltage exceeding the value set by the voltage setter 22 is input to the comparator 23, the period during which a signal is output from the comparator 23 is determined by the clock oscillator 31, the counter 32, the inverting element 33. OR element 34, rib element 41~
49. It is measured by flip-flops 51-56.

That is, when the counter 32 Ifi clear (CLR) input is a logic H signal, the count of clock pulses from the clock oscillator 31 is advanced, and when the CLR input becomes a logic logic signal, the output of the counter 32 becomes a logic logic signal. . When the counter 32 counts a predetermined number before the output of the comparator 23 becomes a logic high signal, the flip-flop 51 changes its output Q to a logic high signal, so when 50 hertz is selected as the frequency, the inverter output voltage When the voltage exceeds the rated voltage by a predetermined value, the Q output of the flip-flop 51 becomes a logic H signal. Similarly, 7 lip-flop 52 causes its Q output to be a logic high signal due to a predetermined overvoltage when 60 hertz is selected. Furthermore, if the counter 32 does not count a predetermined number before the output of the comparator 23 becomes a logic high signal, the Q output of the 7 lip-flop 54f'i is set to a logic high level.
Since it is a signal, if the inverter output becomes a predetermined voltage lower than the rated voltage when 50 hertz is selected, a logic H signal is output. Similarly, the 7-rip 70-tube 56 makes its Q output a logic high signal at a predetermined low voltage when 60 hertz is selected. Therefore, a stop command may be given to the inverter when the OR element 34 outputs a logic H signal.

〔Effect of the invention〕

According to this invention, after converting the sine waveform voltage output from the inverter into an absolute value, it is compared with the set voltage of the voltage setting device, and if the time for which the voltage exceeds the set voltage is measured, the output voltage of the inverter is Abnormalities can be easily detected, but since it is not necessary to smooth the signal using a smoothing circuit with a large time constant as in conventional methods, it is possible to minimize the time delay from the occurrence of a voltage abnormality to detection. Can be reduced in a short time. Therefore, the time during which this abnormal voltage is applied to the load is very short, and the possibility of a failure spreading to the load can be avoided.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of the present invention. 2 is a waveform diagram illustrating the operating principle of the embodiment circuit shown in FIG. 1, and FIG. 3 is a circuit diagram showing the inside of the time measuring circuit described in the embodiment circuit shown in FIG. 1. FIG. 4 is a circuit diagram showing a conventional example of detecting an abnormality in the output voltage of an inverter that outputs an alternating current voltage corresponding to a reference sine wave signal. 2... DC power supply, 3... Smoothing capacitor, 4...
Inverter, 5... Filter reactor, 6... Filter capacitor, 7... Load, 10... Inverter control circuit. 11... Reference sine wave oscillator, 12... Instrument transformer, 13... Rectifier, 14... Smoothing circuit, 15...
・Overvoltage setting device, 16... Overvoltage detector, 17...
Low voltage setting device, 18... Low voltage detector, 21... Absolute value conversion circuit, 22... Voltage setting device, 23... Comparator, 24... Time measurement circuit, 31... Clock Oscillator, 32... Counter, 33... Inversion element,
34...08Figure 1Figure 2Fri-Tub FlopFigure 3

Claims (1)

[Claims] 1) in an inverter that outputs an alternating current voltage corresponding to a reference sine wave signal by controlling an instantaneous voltage value, an absolute value conversion means that detects the output voltage of the inverter and converts the output voltage signal into an absolute value; A comparison means that compares the absolute value conversion means output signal with a set voltage and outputs a signal when the absolute value conversion means output signal is larger, and a predetermined period during which the comparison means outputs the signal. 1. An output voltage abnormality detection circuit for an inverter, comprising time measuring means for detecting that the voltage is longer or shorter than the time and outputting a voltage abnormality signal.