JPS62290215A - Analog/digital converter - Google Patents

Abstract

PURPOSE:To minimize conversion errors by branching and amplifying one analog input signal to a signal with plural analog values and leveling distortion due to said conversion characteristic through the use of plural A/D conversion points in case the analog/digital conversion characteristic has linear error and differential linear errors. CONSTITUTION:An amplifier circuit 1 has one sample holding amplifier 1-0 and n-amplifiers 1-1-1-n. The output of the amplifier 1-0 is branched into n- pieces, supplied to the amplifiers 1-1-1-n with amplification degrees Al-An, and amplified. One analog value is multiplied by AO.Al in the amplifier 1-1 and by AO.An in the amplifier 1-n similarily, supplied to an A/D converter circuit 2 and converted into a digital value. When it is latched in latch circuits 3-1-3-n, a timing circuit 5 outputs the outputs of the latch circuits to an adder circuit 4, which adds said outputs. As a result, the total amplification degree comes to '1', and a digitally converted value with respect to one input analog value can be obtained, whereby linear and differential errors due to the A/D conversion can be reduced.

Description

[Detailed Description of the Invention] 3. Detailed Description of the Invention [Summary] When there is linear distortion or differential linear distortion in the analog-to-digital conversion characteristics, - analog input signals can be converted into signals having a plurality of different analog values. By branching and amplifying the signals and using multiple analog-to-digital conversion points, distortion based on conversion characteristics is averaged and conversion errors are improved.

[Industrial application field]

The present invention relates to improvements in analog-to-digital conversion devices.

It is desirable that the conversion characteristic showing the relationship between the input analog value and the digital output value of the analog-to-digital conversion device be a curved line having an ideal step-like change along one straight line.

[Conventional technology]

Conventionally, linearity of conversion characteristics has been strictly required in order to always obtain a change in the digital output signal in units of a unit for each change in the input analog signal.

However, a circuit with ideal linearity is complicated and expensive.

In general, in a normal analog-to-digital conversion circuit, as shown in Figure 3, the change in the digital output signal value for one unit change in the input analog signal does not follow an ideal curve like the dotted line, but in reality it follows the solid line. There are cases where the value is large and the value is small.

The error in the output signal that occurs with respect to the straight line connecting the output value corresponding to the minimum value input signal converted by the analog-to-digital conversion circuit and the output value corresponding to the input signal maximum value is the linearity error of the analog-to-digital conversion characteristics. The differential deviation value that occurs between adjacent digital signal values output every time the input analog signal changes by one unit is called a differential linearity error.

Generally, such characteristic distortion cannot be avoided in analog-to-digital conversion.

[Problem that the invention seeks to solve]

Conversion errors such as those described above result in distortion of the digital output value; in the case of the former linearity error, a low-frequency noise component is superimposed on an ideal output signal without distortion, and in the case of the latter differential linearity error In this case, a state appears where high frequency noise is superimposed.

In particular, there is a problem in that distortion caused by the latter differential linearity error gives large interference noise to the digital output signal.

[Means for Solving the Problems] The above-mentioned problems with the conventional method are as shown in FIG. 1, which is a diagram of the principle of the present invention. Amplifier circuit 1 that amplifies and outputs
The problem is solved by the analog-to-digital converter of the present invention, which comprises an analog-to-digital converter circuit 2 that individually converts each amplifier output of the amplifier circuit, and an adder circuit 4 that adds the digital outputs of the converter circuit 2. Ru.

[Effect]

According to the present invention, the amplifier circuit 1 branches one analog input signal into a plurality of signals, amplifies them separately, and supplies them to the analog-digital conversion circuit 2 as a plurality of signals having different analog values. The conversion circuit 2 performs conversion operations at a plurality of operating points having different error characteristics. The plurality of digital output signals thus obtained are summed, the overall error is averaged, and the conversion error distortion occurring in the output signal is reduced.

〔Example〕

The present invention will be described in detail according to the illustrated embodiments.

FIG. 2 shows the analog-digital conversion ffl' according to the present invention.
FIG. 2 is a block circuit diagram of one embodiment of 1iff.

In the figure, the amplifier circuit 1 includes one sample Antholt amplifier 1-0 and ni [1i1 amplifiers 1-1 to 1-n
have. 3-1 to 3-n are n (private launch circuits), and 5 is a timing circuit.

The analog signal input is amplified by a sample-and-hold amplifier 1-0 with an amplification factor of AO, and its output is held.

The output of the sample-and-hold amplifier 1-0 is branched into n parts and supplied to amplifiers 1-1 to 1-n, each having an amplification degree of 1 to An, for amplification.

The outputs of the amplifiers 1-1 to 1-n are switched by signals generated by the timing circuit 5 and are sequentially supplied to the analog-to-digital conversion circuit 2.

One analog value is a value multiplied by AO-A1 in amplifier 1-1, and a value multiplied by 80.62 in amplifier 1-2.
Similarly to the drive down, the amplifier 1-n supplies the value multiplied by AO-An to the analog-to-digital conversion circuit 2, where it is converted into a digital value.

Since the amplification degrees 1 to An are set to different values according to the present invention, analog-to-digital conversion is performed at different positions on the conversion curve, and the conversion characteristics are different for the output of each amplifier.

The n1 latch circuits 3-1 to 3-n hold each digital value converted from analog to digital.

If the analog/digital conversion circuit 2 converts the analog signal at fe given sequentially from the amplifiers 1-1 to ln of 1 to An to n amplification degrees, and the output from the latch circuit 3-1 is Y, then , the gain of the entire analog-to-digital converter is expressed as follows.

Y=K −X Here, K=A(lA1+A(lA2+ ・ ・ ・ ・ +
A(lAn=AO−(81+A2+ ・ ・ ・ ・
+An).

Therefore, when determining the amplification degree AO and A1 to An of the amplifier circuit l, AO(A1+A2+ . . . 1 to n) = 1
If it is determined that are changed to different analog values, but the latch circuits 3-1 to 3-n
By adding the latched digital values in the adder circuit 4, the total amplification becomes 1, and a digital conversion value for one input analog value is obtained.

However, since the output values of each amplifier are different from each other, the conversion error given by the linearity error, difference, and differential linearity error of the conversion curve is different. Then, the error distortion of analog-to-digital conversion is reduced.

- Although the above embodiment shows the case where the amplification degree is selected to be 1, it is also possible to select a value larger or smaller than (2).

〔Effect of the invention〕

According to the present invention, it is possible to reduce linearity errors and differential linearity errors during analog-to-digital conversion, it is possible to make the linearity of the strictly required conversion characteristics gentle, and it is possible to simplify the circuit configuration. Since an analog-to-digital converter can be constructed using the following, its effects are extremely large.

[Brief explanation of drawings]

FIG. 1 is a principle diagram of the present invention, FIG. 2 is a block circuit diagram of an embodiment of an analog-to-digital conversion device of the present invention, and FIG. 3 is a diagram of analog-to-digital conversion characteristic curves. In the figure, 1 is an amplifier circuit, 1-0 is a sample-and-hold amplifier, 1-1 to 1-
n is an amplifier, 2 is an analog-to-digital conversion circuit, and 5 is a timing circuit. Figure I Figure 2 → Analog input analog digital /v,% curve box Figure 3

Claims (1)

[Claims] An amplifier circuit (1) having a plurality of amplifiers that branches one analog input signal and amplifies each into a different analog value, an analog-to-digital conversion circuit (2) that converts the output of each amplifier of the amplifier circuit, and An analog-to-digital conversion device comprising: an addition circuit (4) for adding digital outputs of the conversion circuit (2).