JPS62287773A - Writing device driving circuit - Google Patents

Abstract

PURPOSE:To completely digitally set a multi-binary level by using a clock circuit and a phase-shifting circuit, generating plural pulses of a different pulse width and selecting one among plural pulses. CONSTITUTION:A clock signal CLK is phase-shifted by the first phase-shifting circuit 2 and the second phase-shifting circuit 3, and inputted to plural logic circuits A1, OR1 and OR2 together with the clock signal CLK which is not phase-shifted. Respective logic circuits output plural pulses P0-P3 of a mutually different pulse width from the inputted signal. A selecting circuit 4 executes the selection action by digital inputs D1-D2 for selection and selects one among plural inputted pulses P0-P3. An AND circuit A2 modulates the pulse width for on and off data D0 by using one of the above-mentioned selected pulses P0-P3. The pulse width modulated signal drives directly a laser diode and the dot diameter written is made multivalued.

Description

[Detailed Description of the Invention] 3. Detailed Description of the Invention (Technical Field) The present invention relates to a writing device for writing write data based on image information onto a photoreceptor, and particularly relates to an optical or thermal writing device.

This type of writing device is applied to printers, digital copying machines, etc.

(Prior Art) Optical writing devices that write image information onto a photoreceptor using a laser beam are used in printers and the like.

In most cases, this lightning writing device performs binary writing using a 0N10FF beam.

Therefore, to express halftones, it is necessary to use a technique called area gradation. This is to express 16 levels of gradation by using, for example, 4×4 dots in the vertical and horizontal directions as approximately 1 ja. Therefore, according to this area gradation, 4 vertical dots equal 1
Since it is a pixel, the pixel density is A. Similarly, in order to set the gradation to 64 levels, the pixel density must be increased to 1. If the writing density is increased, for example, by 8 times, the pixel density will be compensated for, but the laser beam optical system also has its limits, and the practical limit is about 16 dots per dot.

On the other hand, if the output image of a printer is also used as a digital copier, at least 64 gradations are required.

In this situation, 1 dot is ON10FF (binary)
If it is expressed in multi-value (for example, 4-value) instead, 64 levels of gradation can be expressed in combination with 4×4 area gradation. That is,
Multi-value conversion of one dot can increase the pixel density proportionally.

To modulate a laser beam into multiple values, there are two methods: one method is to change the laser power (power modulation), and the other method is to change the pulse width.

However, the former requires a margin for the current-optical output temperature characteristics of the laser diode, so it is difficult to provide many levels.

On the other hand, the latter does not have this difficulty and can have many levels depending on the modulation circuit. Specifically, a circuit as shown in FIG. 4 has been considered.

That is, PWM is performed by creating a sawtooth plate using an RC charging/discharging circuit and slicing it using an analog level signal.

However, since this method uses an analog circuit, there is a problem in high-speed processing. Furthermore, the stability of the analog level is poor, and it is necessary to correct variations using a single temperature compensation component.

Conventionally, there have been various difficulties in multileveling a laser beam as described above.

(Purpose) The present invention was made based on this background,
The purpose of this is to stably and with a simple configuration perform multi-level writing in optical text feeding using a laser beam.

(Configuration) When converting one dot of a beam into multiple values, the circuit system is required to be able to stably reproduce each multi-value level, and to be able to set each level independently.

In the present invention, this includes one or more phase shift circuits that shift the phase of a clock signal, a logic circuit that compares the phase of the output of the phase shift circuit and the clock, and a selection circuit that selects a plurality of outputs of the logic circuit. This is achieved by pulse width modulating the data according to the selected signal to drive the write element.

Hereinafter, one embodiment of the present invention will be described based on the drawings.

The present invention employs a pulse width modulation method and processes it digitally.

FIG. 1 is a block diagram of a pulse width modulation circuit system according to an embodiment.

In this example, the data is 3 bits DO to D2, O(
D latch 1 selects five levels of values including OFF). DO represents a dot 0N10FF; when it is 0, the dot is OFF, and when it is 1, the dot is ON. Furthermore, only when the dot is ON, four pulse widths are selected using the two bits Di and D2. We will explain how to create four different pulse widths. C1. obtained through the data clock CLK and the delay element 2.3. Three types of signals of C2 are generated. Approximately 1 by AND (Al) of CLK and 01
/4 duty PO is obtained. CLK himself is about 50
% duty Pl. On the other hand, 0R of C1 and CLK
P2 of 3/4 duty is obtained by (ORB,),
Furthermore, 23, which is approximately 90% duty, is obtained by OR2 of CLK and C2.

PO-P3 is a data selector (e.g. 5N74LS17
5) Data D1.4 is input. One of them is selected by D2. Pn (selected only when 00 is 1)
The pulse width is modulated by n-Q~3). When D is O, 0 is output regardless of Dl and D2. In this way, the output ■ (video signal) can have five values including O.

In this Video No. 43, the dot diameter written by directly driving the laser diode is multivalued.

In the circuit shown in FIG. 1, since the delay time of delay element 2.3 can be arbitrarily selected, the set value of the pulse width can also be varied freely. However, in this example, the level of PO and the level of P2 are not independent, and Pl is also fixed at 50% (CLK duty).

FIG. 3 shows a circuit that further improves this point and allows each level to be set completely independently. Each logic element 5.6, 7.8
is an OR game for a duty larger than CLK) (
OR3, 0R4), AND gates (A3, A4) are used for small duty. Furthermore, delay elements whose delay times can be selected by tap switching are also available on the market, and using such elements makes it easy to set each level.

Figure 2 shows D2 to DO, CL explained based on Figure 1.
K, C1, C2, PO, Pl, P2. It is a timing chart of P'3, ■.

(Effects) The present invention is as described above, and according to the writing device drive circuit according to the present invention, the setting of the multi-value level can be performed completely digitally, and the level stability and It can improve reproducibility, and there is little variation in performance during mass production.Furthermore, the circuit configuration is simple and low cost because it consists of only basic logic elements, and the high-speed performance is comparable to the response speed of logic elements. can be handled.

[Brief explanation of drawings]

FIG. 1 is a pulse width modulation circuit according to an embodiment of the present invention, FIG. 2 is a timing chart of each part of the signal, and FIG. 3 is a diagram showing an example of a circuit in which the level of each pulse width can be set independently. be. 2.3, 5.6, 7.8...phase shift circuit, Al, A3,
A4. OR1, OR2, ○R3, OR4...logic circuit, 4...selection circuit. Figure 1 Figure 2 District 3

Claims (1)

[Claims] A writing device that reads image information, obtains write data converted into an electrical signal, and writes digital data onto a photoreceptor in accordance with the write data and a data clock signal, which includes one or more transfers that shift the phase of the clock signal. A phase circuit, a logic circuit that performs a phase comparison between the output of the phase shift circuit and a clock, and a selection circuit that selects a plurality of outputs of the logic circuit, pulse width modulates the data according to the selected signal, A writing device drive circuit characterized by driving a writing element.