JPS62283787A - A-d converter - Google Patents

Abstract

PURPOSE:To attain a quick switching without the need of externally fitted parts such as a switch and a relay by providing a switching circuit in the interior of an A-D converter IC and switching an action state and a standby state with the aid of a clock from the outside. CONSTITUTION:When the inverse of a chip enable signal CE is supplied to the terminal 28 of a bias circuit 14, a diode 26 is turne on at a low level, and the base potential of a transistor 21 comes to a low level. In the transistor 21 its base current does not flow to turn off the transistor 21, and simultaneously a transistor 22 is also turned off. In that case a current does not flow in a diode 27, and a connection point between the collector of a transistor 23 and the base of a transistor 24 is kept at a high potential. Consequently the transistors 23 and 24 are simultaneously turned on, an appropriate base current is supplied to switching transistors 351, 352, ... in comparators 121, 122,.... As a result the transistors 351, 352,... are turned on to bring the comparators 121, 122,...operable, and a video signal is sampled.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention [Field of Industrial Application] The present invention relates to an A-D conversion device in a television receiver using a four-channel display device.

For example, in a liquid crystal television receiver using a liquid crystal display panel, the video signal amplified by the video amplification circuit is
-D: It is converted into a digital signal of several bits by an f inverter, and this digital signal is used to drive a liquid crystal display panel to display an image. Generally, a parallel comparison type A-D converter is used as the above-mentioned A-D converter, but this parallel comparison type A-D converter consists of one comparator, for example, in the case of 4-bit output, 15 comparators, A large number of comparators are required, such as 31 for 5-bit output and 63 for 6-bit output. Therefore, although the current consumption per comparator is about 1 mA, the current consumption for the whole converter becomes large. LCD television receivers that use batteries as a power source are required to reduce current consumption, and for this reason conventionally a resistor has been connected between the power supply terminal of the IC that makes up the A-D converter and the power supply. ,A-D
While the converter is on standby, the resistor is switched to a high resistance to reduce current consumption. Since the screen of a liquid crystal television receiver is very small, the number of effective scanning lines is set to about the same number as that of a general cathode ray tube television receiver. Therefore, in a liquid crystal television receiver, compared to a cathode ray tube television receiver, each screen is on standby, and as mentioned above, a high resistance is created between the A-D converter and the current. This reduces current consumption.

However, as in the conventional case, A-D
Current consumption of converter? If the number is reduced, external parts such as switches and relays are required, and there is a problem that it is not suitable for high-speed switching.

[Purpose of the Invention] This invention has been made in view of the above points, and it is possible to switch between an operating state and a standby state by providing a switching circuit inside an A-D converter IC without using external parts. It is an object of the present invention to provide an A-D converter device ili that can perform high-speed switching and reliably reduce current consumption.

[Summary of the Invention] This invention includes a plurality of converter/equerators that compare video signals with different reference potentials and convert them into binary signals, and on/off control of bias currents of these converter/equerators. A bias current output circuit is provided, and the bias current output circuit is controlled to be turned on/off in accordance with a control signal outputted in accordance with the scanning period of the video signal.

[Embodiment of the Invention] An embodiment of the invention will be described below with reference to the drawings. FIG. 1 shows the configuration of the main parts of a liquid crystal television receiver. In the figure, reference numeral 1 denotes a video amplification circuit which amplifies a signal from a video detection circuit (not shown) and outputs it to a synchronous separation circuit 2 and an AD converter 3. Further, a part of the output signal of the video amplifier circuit 1 is sent to an audio amplifier circuit (not shown).

The synchronization separation circuit 2 separates horizontal and vertical synchronization signals from the input video signal and outputs them to the control circuit 4. This control circuit 4 provides a drive timing signal to a first drive circuit 6 via a shift register 5, and also provides a drive timing signal to a second drive circuit 7.
and give a timing signal. The first drive circuit 6 scans the liquid crystal display panel 8 in the vertical direction, and the second drive circuit 6 scans the liquid crystal display panel 8 in the vertical direction.
The drive circuit 7 scans the liquid crystal display panel 8 in the horizontal direction. The control circuit 4 also generates a tick enable signal CE for selecting the video signal every other horizontal scan, and outputs a
-Give to D conversion device rit3. This A-D converter 3 includes a reference potential generation circuit 11, comparators 12, to 12n.
, a decoder 13, and a bias circuit 14. The reference potential generation circuit 11 generates a low level reference potential vL according to the white level voltage and black level voltage of the video signal.
and generates a high-level reference potential vH, and these reference potentials vL and viI can be directly or directly connected to the resistors R and %Rn1.
The pressure is divided by the converter/fourth regulator 12. ~12n reference terminal. Then, the converter 12i to 1
The output signal of the video amplification circuit 1 is given to the comparison terminal 2n. On the other hand, the bias circuit 14 operates in synchronization with the chip enable signal CE, and the comparators 12 . ~12n has a bias circuit. Comparator 12. ~12n is a bias circuit, which is biased from 14 and operates in the open state, and its output signal is sent to the decoder 13.
Enter. This decoder 13 inputs No. 1 into, for example, 4
A-D converter 3 decodes it into a bit digital signal.
It is sent to the shift register 9 as an output. This shift register 9 has, for example, a liquid crystal display channel 8 of 120X1.
In the case of a 60-dot double matrix, there are 320 stages of 4 pits. The data input to the shift register 9 is sent to the second drive circuit 7 via the buffer 101jH. The second drive circuit 7 performs brightness modulation on the output of the buffer 10 based on the brightness signal from the control circuit 4, and applies a drive bias to the liquid crystal display panel 8.

Next, the above-mentioned converter/quadrator 12. ．． 12. . . , and the details of the bias circuit 14 will be explained with reference to FIG. The bias circuit 14 mainly includes, for example, N-channel transistors 21 to 24, diodes 25 and 26, and a seat diode 27. A terminal 28 to which a chip enable signal (J) is applied is grounded via a diode 25 with the polarity shown and connected to the base of the transistor 21 via a diode 26.

The transistor 21 has its base and collector connected to the VCC power supply through resistors 29 and 30, respectively, and its emitter is grounded and connected to the base of the transistor 22 through a resistor 31f. The emitter of this transistor 22 is grounded, and the collector is connected to the collector of the transistor 23 and the transistor 24 via a diode 27.
Connected to 0 base. Then, the transistor 23
The collector of is connected to the vcc power supply via a resistor 32,
The emitter is grounded via a resistor 33. Further, the collector of the transistor 24 is directly connected to the VCC power supply, and the emitter is grounded through the resistor 34 and connected to the pace of the transistor 23. That is, the transistors 24 and 23 constitute a bias current output circuit, and the emitter output potential of the transistor 24 is the same as that of the comparator 12□.

12, . . . switching transistors 35K, 35. ...Supplied as Ic Heiss bias.

Next, the operation of the above embodiment will be explained. The chip enable signal CE is a signal that selects the video signal existing between the horizontal synchronization signals every other scan, as shown in FIG.
It is at high level every scan, and is at low level at other times. A signal CE obtained by inverting the chip enable signal CI is sent from the control circuit 4 to the bias circuit 14.
This is the signal given to However, the above chip
Guru signal CE is detailed in Figure 2? When applied to the terminal 28 of the bias circuit 14 shown in FIG. 1, the diode 26 is turned on during the low level period, and the pace potential of the transistor 21 becomes low level. Therefore, the transistor 21 is turned off with no base current flowing therethrough, and at the same time, the transistor 22 is also turned off.

When this transistor 22 is off, no current flows through the diode 27, and the connection point between the collector of the transistor 23 and the base of the transistor 240 is kept at a high potential.

Therefore, transistors 24 and 23 are both turned off, and comparators i12. .

12,... switching transistor 351.

35! Supply an appropriate base current to... As a result, transistors 35□, 35. ... are turned on, and comparators 121.12. ... is in the operating state, and the video signal is sampled.

10,000, during the period when the chip enable signal CE is at a high level, the diode 26 becomes reverse biased and turns off.
The pace potential of transistor 2.1 rises. Therefore, transistor 21 is turned on, and at the same time transistor 22 is turned on, current flows through diode 27, and transistor 2
4 pace potential to approximately 0.4 V. Therefore, transistors 24 and 23 are turned off, and transistor 3
5m.

No base current is supplied to 35, . As a result, transistors J 5X , j 5. ... is turned off, and comparator Z2. , 12. ... is in a non-operating state.

In this way, the A-D converter (lls operates every other scan, converts the video signal 1 output from the video amplifier circuit 1 into a 4-bit digital signal, and outputs it to the shift register 9. The data written in the shift register 9 is sent to the second drive circuit 7 via the buffer 10f, and displayed on the liquid crystal display panel 8. In the above embodiment, the chip enable signal CE was used to control the current fttlJ to the comparator, but it goes without saying that the current fttlJ to the comparator may be controlled using a non-inverted chip enable signal CE, and the present invention is not limited to the above embodiment. .

As described above, according to the present invention, a switching circuit is provided inside the A-D converter IC, and the operating state and standby state are switched using an external clock. No additional parts are required, high-speed switching is possible, and current consumption can be reduced. Furthermore, in the standby state,
Comparator 12. Since the power supply to 12n is stopped, the consumed power can be further reduced.

[Brief explanation of drawings]

The drawings show one embodiment of the present invention. FIG. 1 is a circuit configuration diagram, FIG. 2 is a diagram showing details of the condenser and bias circuit parts in FIG. 1, and FIG. 3 is a diagram showing a video signal and a bias circuit. FIG. 6 is a diagram showing a correspondence relationship with a tick enable signal. 3... A-D converter, 11... Reference potential generation circuit, 12, to 12n... Comparator, 13... Decoder, 14... Bias circuit.

Claims (1)

[Claims] A bias current output circuit consisting of a plurality of comparators that compare video signals with different reference potentials and convert them into binary signals, a pair of transistors that control on/off the bias current for the comparators, and this bias current output circuit. A, characterized in that it is equipped with a switching transistor that controls the supply of an operating voltage to the video signal, and a control means that controls on/off the transistor in accordance with a control signal that is output in accordance with the scanning period of the video signal. -D conversion device.