JPS62281636A - Circuit setting system for loop network - Google Patents

Abstract

PURPOSE:To improve the availability of a transmission line by forming for the first time a request part into a frame, and writing the prescribed information to the request part via a slave station having a request for the right of transmission. CONSTITUTION:A request part detecting circuit 5g is added to a frame detection deciding circuit 5 forming a node N between the master and slave stations. At the same time, a request part operating circuit 7e is added to a frame operating circuit 7 together with a request part Req. formed into a transmission frame. Thus a circuit can be set immediately from the first of the actual data communication by writing the address of the master station requested by the slave station for transmission to the part Req.

Description

[Detailed Description of the Invention] 3. Detailed Description of the Invention [Summary] This is a line setting method for a loop network, in which a request section is created in a frame, and a slave station requesting a transmission right sends predetermined information to the request section. By writing this, it is possible to request the transmission right from the master station, thereby increasing the efficiency of using the transmission path.

[Industrial application field]

The present invention is a loop network line setting method. The communication form to which the present invention is applied is as shown in FIG.

F is connected by a loop-shaped transmission path β through each node a, b, c, d, e, f, and a master station communicates with a specific slave station,
A communication method that involves setting up a line.

This loop network can be used, for example, when communication between channel devices and input/output devices inside a large computer is realized using an optical loop network.

The present invention relates to a method in such a loop network in which a master station identifies in advance a slave station that has a transmission request to the master station and sets up a line.

[Conventional technology]

The conventional loop network line system was implemented by a node N' shown in FIG. This node N' has the same configuration as the master station and the slave station, and line setting is performed by circulating the frame shown in FIG.

Conventionally, the master station uses this node N' (Figure 4) and the frame (Figure 5) to check the transmission of the slave station before starting data communication from the slave station to the master station (■ in Figure 6). Empty frames were being circulated to investigate requests (■, ■ (part T) in Figure 6).

The operation will be explained in detail below.

(1) Operation on the master station side (Supporting transmission start ■) ■ Node N' that accommodates the master station (corresponding to node a or b in Figure 7) starts the first frame of the passing frame (Figure 5). The flag pattern F is constantly detected by the flag pattern detection circuit 5a of the frame detection and determination circuit 5' (FIG. 4).

■ When the flag pattern F is detected at 5a', this becomes a trigger and the timing generation circuit 5b' sequentially outputs each part of the frame (used and unused bits) to the B/11 receiving address D.
A. Destination address SA.

Timing signals for the control section CMD and the data section DATA are generated and transmitted to each circuit within the node N'.

■ The master station repeats a transmission cycle and a reception cycle with a specific slave station, but when it enters a reception cycle (receiving data from the slave station), this is sent to the control circuit 7a' in the frame manipulation circuit 7'. Tell them and have them do the following:

(2) When an unused frame or a usable frame addressed to the own station arrives at the parent station node N', the B/I and address detection circuit 5c' detects it.

(2) When this information is transmitted to the frame determination circuit 5f', it is determined whether the frame can be used and this is notified to the control circuit 7a'.

- Having received the notification, the control circuit 7a' refers to the timing signal given from the timing generation circuit 5b' and performs the B/I operation of the frame manipulation circuit 7' while this frame passes through the delay circuit 9'. B/I using circuit 7b'
bit (FIG. 5) is used, and the address manipulation circuit 70' and address memory 6' are used to set the global address for the slave station to the receiving address DA in the frame.
Then, write the local node address to the source address SA, and use the control unit operation circuit 7d' to write the own node address to the source address SA.
A transmission start instruction bit (not shown) of the control unit CM D in the frame is set, and a frame for investigating the transmission request of the slave station is transmitted.

(2) Operation on the slave station side (transmission request ■) ■ This frame is sent to the slave station node (C2d, e in Figure 7).
, f), the flag pattern detection circuit 5
A flag pattern F is detected at a', and a timing generation circuit 5b' sequentially generates timings for each part of the frame and transmits them to each part of the node.

■ Then, the B/I and address detection circuit 5C' detects the B/I bit, the global address for the slave station of the receiving address DA, and the sending source master station node address S.
Detect A.

(2) Also, the control unit detection circuit 5d' decodes the transmission start instruction bit and node from the control unit CMD.

(2) The above information is transmitted to the packet determination circuit 5f'. When the slave station 15' has a transmission request to the master station, the node address of the other master station is stored in the address memory 6 in advance.
It is transmitted to 5f' through. At step 5f', this address is compared with the master station address of the above frame, and if they match, this is transmitted to the control circuit 7ar.

■ In the control circuit 7a', the address operation circuit 7c't-
This master station address is written to the receiving destination, and the local node address is written to the sending source.

Further, using the control section operation circuit 7d', the frame is operated by sending a transmission request bit (not shown) of the control section CMD.

(3) Operation on the master station side (transmission permission ■) ■ If this frame arrives at the master station node again, the fourth
In the figure, similarly, each part of the frame detection judgment circuit 5' is used to know the slave station node address of the transmission source, and the control unit CM
Decipher D's transmission request pinto. Then, the slave station node address is transmitted to the master station side.

(2) Then, using each part of the frame manipulation circuit 7', the destination address DA and the source address SA are exchanged, a transmission permission bit (not shown) of the control section in the frame is set, and the frame is sent out. The master station enters a waiting state for receiving data from the slave node.

(4) Operation on the slave station side (data ■) ■ When the slave station receives this frame, each part of the frame detection/judgment circuit 5' receives transmission permission (■) from the master station that previously made the transmission request. Check what is given.

(2) Further, each part of the frame manipulation circuit 7' exchanges the transmission and reception addresses, and switches the transmission selector 10' to the data transmission circuit 12' side at the data portion DATA of the frame according to the timing given by 5b'.

The data transmission circuit 12' sends out the data in the transmission buffer 14' to the transmission path.

(5) Operation of the master station example (response ■) When this frame arrives at the master station node again, each part of the frame detection judgment circuit 5' detects it, and the data section DA
Data is written from the beginning of the TA to the reception buffer 13' via the data reception circuit 11'.

Then, using each part of the frame manipulation circuit 7', the transmission and reception addresses are exchanged, and the normal reception focus (not shown) of the control unit CMD in the frame is set to respond to the slave node. Thereafter, the sequence is executed using the same frame.

[Problem that the invention seeks to solve]

As mentioned above, according to the prior art, before starting data communication between the slave station and the master station (after ■ in Figure 6), the master station sets up an empty space just for investigating the slave station to which it should make a transmission request. The frame must be circulated throughout the network (T in Figure 6).
(■,■)).

Therefore, there is a problem in that the time used for actual data communication is reduced and the transmission efficiency of the transmission path is reduced.

[Means for solving problems]

An object of the present invention is to solve the above problems and improve the transmission efficiency of a loop network.

As shown in FIG. 1(A), the means for this purpose is to include a request section detection circuit 5g in the frame detection/judgment circuit 5 constituting the node N of the master station and the slave station, and a request section operation circuit 7e in the frame operation circuit 7. and a new request section Req in the transmission frame (FIG. 1(B)).

[For production]

As described above, according to the present invention, a request section detection circuit and a request section operation circuit are newly provided in the node N, and a request section is provided in the frame.

Therefore, by writing the address of the master station from which the slave station requests transmission into the request section Req in the frame, the line settings can be made immediately from the beginning of actual data communication (■ in Figure 1 (C)). can.

For this reason, the empty frame circulation time T (FIG. 6) unlike in the prior art is no longer necessary, and the transmission efficiency is greatly increased.

〔Example〕

Hereinafter, the present invention will be explained by way of examples and with reference to the accompanying drawings.

FIG. 2 is a diagram showing an embodiment of the present invention. The node N in FIG. 2 has the same configuration for both the master station and the slave station, where reference numeral 1 is a receiving section, 2 is a transmitting section, 3 is a serial-to-parallel converting section, and 4 is a receiving section.
1 is a parallel-to-serial converter, 5 is a frame detection/judgment circuit, 6 is an address memory, 7 is a frame manipulation circuit, 9 is a delay circuit, 10 is a transmission selector, 11 is a reception circuit, 12 is a transmission circuit, 13 is a reception buffer, 14 is the send buffer,
Reference numeral 15 indicates a master station or a slave station, and l indicates a transmission path.

What is different from the prior art (FIG. 4) is that the frame detection/judgment circuit 5 includes a request section detection circuit 5g and a frame operation circuit 7.
The point is that a request section operation circuit 7e is provided inside each of them.

FIG. 3 is a frame configuration diagram used in the present invention, which includes a flag pattern F, used and unused bits B/■, request section Req, receiving address DA, and source address SA.
, a control section CMD, and a data section DATA.

What is different from the conventional frame (Figure 5) is the request section R.
The point is that eq. This request section Req is a section where a slave station making a transmission request displays its own address and the address of the master station of the request destination.

(1) Assume that data communication is now taking place between the slave station and the master station (Fig. 7) via each node N having the configuration shown in Fig. 2, using the frame shown in Fig. 3. .

(2) Each slave node detects the circulating frame (FIG. 3) using each circuit of the frame detection and determination circuit 5. Then, if a transmission request is sent from the slave station to the frame determination circuit 5f for the specific master station that is using this frame, the B/I and address detection circuit 5c will be used to
A match between the partner master station address in the address memory 6 and the frame reception address DA or transmission source address SA is detected at step 5r.

(3) The frame determination circuit 5f transmits the result to the control circuit 7.
Tell a.

(4) The control circuit 7a writes the node address of its own station into the request section Req in the frame using the request section operation circuit 7e. Each slave station independently writes its own node address into the request section Req, and acquires the transmission right for the next cycle from the master station node.

The request section Req can be provided with various modes, thereby making it possible to control the priority order of transmission rights of slave nodes. For example, (i) a request section (Req, 1) that permits overwriting; in this case, the priority order of transmission rights is slave stations F>E>D>C (FIG. 7).

(ii) Once a valid slave station node address is written, the request section (Req, 2) prohibits writing by other slave nodes. In this case, the priority order of transmission rights is slave stations C>D>E>F. Yes (Figure 7).

Writing to the request section Req, 2 is performed after confirming that an invalid address has been written in the request section Req, 2 of the arrived frame using the request section detection circuit 5g in the slave node.

(5) When the sequence being executed using this frame ends and the frame returns to the master station node, the request part detection circuit 5g in the master node detects the request part Re.
It is detected that a valid node address is written in q, and this is notified to the control circuit 7a and the master station 15.

(6) If valid addresses are written in Req, 1 and Req, 2 at the same time, the frame determination circuit 5f selects one of the slave nodes according to a predetermined priority order.

The address manipulation circuit 7c writes the slave node address of the selected request unit Req in the destination address DA, and writes its own node address in the source SA. Further, the request section operation circuit 7e sets the request section Req as an invalid pattern.

The control unit operation circuit 7d controls the control unit DM in the frame.
The transmission permission bit (not shown) in D is set and the frame is transmitted. The master station enters a state of waiting for data reception from the slave node.

(7) When this frame arrives at the slave station that made the request, it decodes the transmission permission (FIG. 1(c) (■)) and starts data transmission (FIG. 1(c) (■)).

(8) From then on, the same sequence as in the conventional method is executed (below ■ in FIG. 6).

〔Effect of the invention〕

As described above, according to the present invention, a request section detection circuit and a request section operation circuit are newly provided in the node N, and a request section is provided in the frame.

Therefore, by writing the master station address from which the slave station requests transmission into the request section Req in the frame, the line settings can be made immediately from the beginning of actual data communication (■ in Figure 1 (C)). .

For this reason, the empty frame circulation time T (FIG. 6) unlike in the prior art is no longer necessary, and the transmission efficiency is greatly increased.

[Brief explanation of drawings]

Fig. 1 is a diagram showing the principle of the present invention, Fig. 2 is a diagram showing an embodiment of the invention, Fig. 3 is a block diagram of a frame used in the present invention, Fig. 4 is a block diagram of the prior art, and Fig. 5 6 is a conventional frame configuration diagram, FIG. 6 is an explanatory diagram of conventional operation, and FIG. 7 is an explanatory diagram of an industrial application field. 1... Receiving section, 2... Transmitting section, 3...
・Serial-parallel converter, 4... Parallel-serial converter, 5... Frame detection determination circuit, 5a... Flag pattern detection circuit, 5b... Timing generation circuit, 5c... B/I and address Detection circuit, 5d...
Control section detection circuit, 5e... Data detection circuit, 5f... Frame judgment circuit, 5g... Request section detection circuit, 6... Address memory, 7... Frame operation circuit, 7a... Control Circuit, 7b...B/r operation circuit, 7c...Address operation circuit, 7d...Control unit operation circuit, 7e...Request unit operation circuit, 9...Delay circuit, 10...Transmission Selector, 11...reception circuit, 12...transmission circuit,
13... Reception buffer, 14... Transmission buffer, 15... Master station or slave station. 1-20 Node configuration diagram (A) Frame configuration diagram (B) Principle of the present invention 1... Receiving section 2... Transmitting section 10... Transmission selector 15... Master station or slave station N...・Node L... Transmission line. Main station Slave station operation explanatory diagram (C) Figure Frame configuration diagram used in the present invention Figure 3 Conventional frame configuration diagram Figure 5 Master station Slave station Conventional operation explanatory diagram Figure 6

Claims (1)

[Claims] A loop network in which a plurality of master stations and slave stations are connected via loop-shaped transmission paths via nodes, in which the master station occupies frames and sets up lines with specific slave stations. In a loop network line setting method in which communication is realized using frames circulating on a transmission path, a request part is provided in the frame to display the slave station address and the master station address, and the above-mentioned master station and slave station A request part detection circuit and a request part operation circuit are provided in each node, and any slave station requesting transmission rights to the master station detects the request part by the request part detection circuit and freely writes its own address in the request part. and the master station address of the request destination are written by the above-mentioned request section operation circuit, and the corresponding master station detects the request section into which this address has been written using the request section detection circuit, thereby knowing the request from the slave station, and transmitting the request to the slave station. A loop network line setting method characterized by granting transmission rights.