JPS6228000Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital/synchronized converter (D/S converter) that converts a digital signal to a synchronized signal, and particularly relates to a D/S converter that drives a low impedance load.

There is a synchro electric machine as a means for electrically transmitting the rotation angle to a remote location. FIG. 1 is a winding layout diagram of a synchro electric machine, which is an AC rotating machine with a primary single phase and a secondary three phase.

When a constant amplitude AC power source is applied to terminals 1 and 2, and if the angle between the primary winding and the winding axis of one of the secondary windings is θ, the voltage between terminals 3, 4, and 5 is as follows.
Ksinθ・sinωt, Ksin(θ+120°)sinωt,
It is expressed as Ksin(θ−120°)sinωt. However, K
is the transmission number between the primary winding and the secondary winding, and ω is the angular frequency of the power supply applied to the primary winding. The D/S converter inputs a digital signal as an angle θ and outputs the above-mentioned synchronization signal.

FIG. 2 shows a block diagram of a conventional D/S converter. A signal having the same frequency as the output synchro signal is input from the signal line 6, and the reference signal generating section 7 outputs two reference signals 14 and 15 having a phase difference of 180°. Input angle digital signals are input from signal lines 8, 9, and 10. As an example of this input signal, when a pure binary code is used, the most significant bit input from signal line 8 represents 80 degrees, the bit input from signal line 9 represents 90 degrees, and the most significant bit input from signal line 10 represents 80 degrees. The bits input from 1 to 2 represent angles that decrease by a factor of 1/2.

The angle represented by the input signal is all angles from 0° to 360°, but between the sine and cosine functions of the angle in the first quadrant and the angles in the second to fourth quadrants, 0°≦θ
If ≦90°, cosθ=sin(90°−θ), sin(90°+θ)=sin, respectively.
(90°−θ) cos(90°+θ)=−sinθ, sin
(180°+θ)=-sinθ cos(180°+θ)=-
sin(90°−θ), sin(270°+θ)=−sin(90
゜−θ) cos(270゜+θ)=sinθ 〓〓〓〓〓
The equation holds true. From the above equation, the function value of the angle in the second to fourth quadrants can be obtained by taking the complement (90° - θ) of the angle in the first quadrant to 90°, or by reversing the sign of the function value. I understand that.

Since each quadrant is divided by a change in integer multiple of 90°, in the case of the input signal format of this example, the quadrant to which the angle of the input signal corresponds is determined by the signal of the most significant bit representing 180°. is determined by the signal of the second upper bit representing 90°. Therefore, the quadrant selection unit 11 selects the bit indicating 45° or less that is input to the signal line 10 based on the signal of the most significant bit input to the signal line 8 and the signal of the second upper bit input to the signal line 9. It is determined whether to leave the input signal as it is or take the 90° complement, and send it to the function generator 13 via the signal line 12. Outputs 14 and 15 from the reference signal generator 7 are also selected by the upper two bits, and a reference signal having the same phase or the opposite phase as the signal from the line 6 is sent to the D/A converter 17 via the line 16.

The digital signal from the quadrant selection section 11 is converted into a sine function of the angle represented by the function generation section 13, and the D/A conversion section 17 changes the amplitude of the reference signal from the quadrant selection section 11. That is, D/A conversion is performed. The output of the D/A converter 17 is on lines 8 to 1.
In other words, the sin and cos functions of the angle input to 0 are converted into synchro signals by the resolver synchro converter 20, which includes a Scotto-T transformer for converting resolver signals/synchro signals, and then sent to the torque synchro receiver. The power is amplified by a power amplifying section 21 for driving the circuits, etc., and outputted from a signal line 22.

By the way, the signal lines 8, 9, 10 of the D/S converter
The digital signal input to the circuit has a discontinuous transition from one signal value to another. In particular, when the signal input to the signal line 8 changes from "0" to "1", the output 22 of the D/S converter instantly differs by 180 degrees from the previous state, and the torque synchronizer receiver is used as a load. is connected, the power amplifier output and the load differ by 180 degrees, so the synchro receiver enters a dead zone and the amplifier becomes overloaded.

Therefore, the conventional D/S converter has the disadvantage that the angle change of the input angle signal must be taken into consideration so as not to interfere with the operation of the synchro electric machine.

SUMMARY OF THE INVENTION An object of the present invention is to provide a D/S converter which eliminates the above-mentioned drawbacks and does not limit changes in the input digital signal. A feature of the present invention is that a D/S converter converts a digital signal representing an angle into a synchronized signal, and includes means for converting the digital signal into a synchronized signal, and means for amplifying the synchronized signal.
D/S conversion that does not limit input digital signal conditions, comprising means for detecting an overload state of the amplifier, and means for temporarily changing a digital signal to a different value depending on a signal output at the time of overload detection and an input digital signal. It is about providing the equipment.

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 3 is a block diagram of the entire D/S converter according to an embodiment of the present invention. The power amplifying section 21 and the overload detection circuit 24 (hereinafter referred to as the circuit 24) are connected by the signal line 23, and the circuit 24 is connected to the signal line 25 and 2.
6, the quadrant selection unit 11 is connected to the adder 27 via signal lines 28 and 29, respectively. Again, signal lines 8 and 9 are also connected to adder 27. Other configurations and connections are the same as in FIG. 2. If the power amplifying section 21 becomes overloaded when the synchro electric machine does not follow the same, the current consumption will increase, so this is
3 and is detected by the circuit 24.

The circuit 24 uses this change as a trigger to generate a pulse with a constant width. This pulse causes the signal line 2 to
5 generates a pulse when an overload occurs, and the signal line 26 generates a pulse when the signal line 25 does not return to normal operation due to the pulse. The adder 27 receives the signals on the signal lines 9 and 25 and the signals on the signal lines 8 and 26 as signals of the same bit, respectively.
The added value is output to signal lines 28 and 29. In other words, when the synchro electric machine is operating normally, the signal line 25
Since the signals of and 26 are “0”, the signals of signal lines 8 and 9
The same signal as the signal is output from the adder 27,
The original input angle is input to the D/S converter.

When an overload occurs, the adder 27 adds the inputs of signal line 25 and signal line 9, which give an angle of 90°, and adds the inputs of signal line 26 and signal line 8, which give an angle of 180°. Therefore, in the end, an angle 90° or 270° larger than the original input angle is input to the quadrant selection unit 11. The D/S converter will represent this angle only during the rising edge of the constant width pulse outputted by the circuit 24.

FIG. 4 shows an example of the configuration of the circuit 24. Signal line 2
3 is connected to the trigger generation section 31, and its output is a signal
The signal line 32 is applied to a monostable multivibrator 33, and the signal line 34 is applied to a flip-flop 36.
The output of the monostable multivibrator 33 is applied to the AND gate 38 through a signal line 35, and the output of the flip-flop 36 is applied through a signal line 37. The signal line 25 is a monostable multivibrator 33
The signal line 26 is connected to the output of the AND gate 38. The trigger generation section 31 generates a trigger input for the monostable multivibrator 33 based on the voltage change input through the signal line 23 when there is an overload. Since the monostable multivibrator 33 generates a pulse with a width determined by the CR time constant by the trigger signal input through the signal line 32,
One pulse is output to the signal line 25 every time an overload occurs. When the output of the monostable multivibrator 33 is input to the flip-flop 36, the flip-flop 36 sets the output from "0" to "1" at the rising edge of the first pulse, and sets the output from "0" to "1" at the rising edge of the second pulse. Since it is reset from ``1'' to ``0'', the AND gate 38 is reset at the first pulse.
Since "1" is sent to the signal line 35 input to the signal line 35, but the signal on the signal line 37 is "0", the gate is not opened and no pulse is output to the signal line 26. Next, the second pulse is applied to the signal line 35 of the AND gate 38.
Since the output of the flip-flopper is set to "1" at the rising edge of the first pulse, the AND gate 38 opens and a pulse is output to the signal line 26. At the rising edge of the second pulse, the output of flip-flop 36 becomes "0" again, so in the next malfunction, signal line 2
Outputs a pulse only to 5.

By the above-described operation, a pulse is outputted to the signal line 25 every time there is an overload, and a pulse is outputted to the signal line 26 once every two pulses to the signal line 25 when the overload continues. In other words, when the D/S converter becomes overloaded, it is detected, and the input angle of the converter is temporarily equivalently changed to another input angle so that the synchronized receiver of the load follows the output. hand,
The operation is restored by returning to the original input angle. In this embodiment, either 90° or 270° is added to recover from malfunctions for all angles. Therefore, according to this embodiment, by detecting a malfunction when it occurs and recovering from the malfunction, it is possible to construct a D/S converter that is not limited by input angle changes.

As explained above, the present invention detects overload of the D/S converter and has a function to restore normal operation, so that even signals with large angle changes can be applied to the converter without limiting the input conditions. It is possible to input.

[Brief explanation of the drawing]

Fig. 1 is a winding layout diagram of a synchro electric machine, Fig. 2 is a block diagram of a conventional D/S converter, Fig. 3 is a block diagram of an embodiment of the present invention, and Fig. 4 is an embodiment of Fig. 3. FIG. 7... Reference signal detection section, 11... Quadrant selection section,
13...Function generation section, 17...D/A conversion section, 2
0... Synchro-resolver conversion unit, 21... Power amplification unit, 24... Overload detection circuit, 27... Adder, 31... Trigger generation unit, 33... Monostable multivibrator, 36... Flip-flop, 3
8...AND gate.

Claims (1)

[Scope of utility model registration request] In a digital/synchronous converter for converting a digital signal representing an angle into a synchronous signal,
A digital/synchronization converter comprising: means for converting said digital signal into a synchronizing signal; amplifying means comprising an amplifier for amplifying the output of each phase of said synchronizing signal; an overload detector for detecting an overload state by detecting an overcurrent in at least one or more phases of the amplifier of said amplifying means; a monostable multivibrator for generating a pulse of a constant width when an overload is detected by said overload detector; means for outputting a predetermined digital signal during the existence of said pulse; and means for performing parallel addition of the output from said means and the most significant bit of said digital signal, thereby making it possible to restore normal operation even if the digital/synchronization converter is temporarily in an overload state, and not restricting the input conditions of said digital signal.