JPS62279367A - High voltage power unit for electrostatic recorder - Google Patents

Abstract

PURPOSE:To stabilize operation characteristics of respective chargers by controlling high voltage power sources which generate various high voltages required by charges in a recording process by activating the respective high voltage power sources individually and detecting current photosensitive drum currents individually. CONSTITUTION:A fine sequence where in the activation times of respective high voltage power sources 200 which activate main, transfer, separation, and before-cleaning chargers 2, 4, 5, and 7 arranged at the periphery of the photosensitive drum 1 are not coincident is set at the head of the recording process, a current detecting means RS is provided between the photosensitive drum 1 and a specific power source line, and the respective chargers 2, 4, 5, and 7 are activated individually to detect a current flowing through the photosensitive drum 1. Then, the control commands of the high voltage power sources 200 are updated according to the detected current value and the value is held after the end of the fine sequence. Consequently, even if the respective chargers 2, 4, 5, and 7 deteriorate in characteristics, the drum current is controlled to a constant value to preclude ground staining, white absence, a deficiency in cleaning, etc.

Description

Detailed Description of the Invention 3. Detailed Description of the Invention ■Technical Field The present invention relates to an electrostatic recording device, such as an electrophotographic copying machine, which includes a plurality of chargers for forming an image on a charge carrier. In particular, the present invention relates to a high-voltage power supply device that generates various high voltages required for a charger during the recording process.

■Prior Art A recording unit of an electrostatic recording device such as an electrophotographic copying machine generally has a photoreceptor drum 11 as a charge carrier, and around the drum there are a main charger, a developing electrode, a transfer charger, Chargers such as separate chargers (
Equipped with a charger).

Then, a predetermined high voltage power is applied to each charger,
A current is caused to flow between the charger and the photosensitive drum by corona discharge. Generally, this type of charger includes a metal casing with an open surface facing the photoreceptor drum, and a linear electrode supported inside the casing. The casing is grounded to electrically isolate the linear electrode from surrounding equipment. Therefore, when a voltage is applied to the linear electrode, a current flows between the electrode and the photosensitive drum 11, and at the same time, a current flows between the electrode and the casing. Namely.

FIG. 1 schematically shows the components near the photoreceptor drum 11 of a copying machine. It branches into Ic, which discharges to 2b, and Id, which discharges to photoreceptor drum As1. In other words, the output current rH of the high-voltage power supply device that supplies power to the charger does not match the current Id that actually flows through the photosensitive drum. Of these, it is the current Id flowing through the photoreceptor drum that determines the latent image potential of the electrostatically recorded image, so the current used in the recording process is the current Id flowing through the photoreceptor drum lzL.
d, and when setting the parameters of the recording process, the current that actually flows through the photoreceptor drum must be detected and set. However, conventionally, the high-voltage power supply that supplies high-voltage power to generate electrostatic corona in the charger is controlled so that its output current is constant regardless of the input voltage and load; What is flowing through the main charger 2 is a current IM (sum of IC and Id), which is different from the drum current Id. For this reason, the following problems existed. That is, as the discharge wire of the charger deteriorates over time, the drum current Id increases (and therefore Ic decreases) even though IM is controlled to be constant.
As a result of the drum charging potential of the photosensitive drum 1 increasing,
Background smearing (fogging) occurs due to an excessively high eA degree, and white spots (part of a black solid area appear white) occur due to poor transfer 2 separation. Further, even when detecting the current discharged to the photoreceptor drum 1 as a drum current, the switching power supply that controls the high voltage power supply is attached to each high voltage power supply that supplies high voltage to each charger that charges the photoreceptor drum. Since the drum current timings were almost simultaneous, it was not possible to individually detect the drum current for each high voltage power supply.

■Purpose Therefore, in order to stabilize the image quality in an electrostatic recording device, the present invention provides control of the high-voltage power supply that generates various high voltages required for the charger in the recording process.
This is done by individually energizing each high-voltage power supply and individually detecting the photoreceptor drum current at that time, with the purpose of stabilizing the operating characteristics of various chargers.

■Configuration In order to achieve the above object, in the present invention.

In a high-voltage power supply device that sets output voltages of a plurality of high-voltage power supplies that supply high-voltage voltages to a plurality of chargers used for forming an image on a charge carrier in an electrostatic recording device according to a control target value, the charge carrier A minute sequence is set at the beginning of the recording process in which the energization times of the current detection means connected between the body and a predetermined power supply line and the high-voltage power supplies that energize each charger do not overlap, and the minute sequence is set at the beginning of the recording process. A control means is provided which energizes the high-voltage power supply, updates the control target value of each high-voltage power supply according to the output of the current detection means of the minute sequence, and holds the control target value after the minute sequence ends.

Here, each high voltage power supply is a pulse width modulation type digitally controlled switching power supply, the current detection means includes an analog/digital conversion means, and the control means corresponds to the digital signal from the current detection means during a minute sequence. The output pulse width of the digitally controlled switching power supply is set, and the set value is held after the minute sequence is completed.

According to this, for example, a current detection means such as a resistor is connected to a charge carrier and a predetermined power supply line (for example, an earth line).
energizes each high-voltage power supply that supplies high voltage to each charger individually during a minute sequence, and detects the current that actually flows to the photoreceptor drum of the charge carrier during the energization time. do.

Then, the control target value of the high voltage power supply is updated according to the detected current value of the photoreceptor drum current. After the minute sequence of this control target value updating process is completed, the updated control target value is held.

In other words, updating the control target value of the high-voltage power supply by individually energizing the high-voltage power supply of each charger and detecting the current actually flowing through the charge carrier is performed in a minute sequence in which the energization periods of the high-voltage power supplies do not overlap. and set this minute sequence at the beginning of the recording process. The control target value of each high-voltage power supply updated during the minute sequence is not changed after the minute sequence ends, and the control target value is maintained.

With this configuration, each high-voltage power supply that directly supplies high-voltage power to each charger is individually controlled by each drum current that actually flows between each charger and the photoreceptor drum, so that various chargers can Even if the wires etc. deteriorate in the charger and the characteristics deteriorate, the drum current in each charger is controlled to be constant. Therefore, background stains due to a defective main charger, white spots due to a defective transfer/separation charger, insufficient drum cleaning due to a defective cleaning charger, etc. do not occur.

Other objects and features of the present invention will become apparent from the following description of embodiments with reference to the drawings.

[Example 1] Fig. 1 shows a block diagram of a configuration mainly showing the vicinity of the photosensitive drum of a copying machine embodying the present invention in one embodiment, and Fig. 2a
The figure schematically shows the configuration of one type of copying machine that implements this configuration.

First, the general structure of the copying machine will be described with reference to FIG. 2a. 21 is a contact glass on which the original is placed.

An optical scanning system 22 is provided below the contact glass 21, and an image of light reflected from the original is formed on the photosensitive drum 1 via the optical scanning system 22. The photosensitive drum 1 rotates clockwise in this figure.

On the other hand, the paper feed system has two stages, with paper feed cassettes 24 and 24.
The recording paper is fed by the paper feed roller 26 or 27 from the one selected by the paper feed roller 25. The fed recording paper passes between the registration roller 28 and the leading edge bending roller 29 and is guided to the photosensitive drum 1 .

The vicinity of the photosensitive drum 1 is shown enlarged in FIG. Referring to FIG. 1, a main charger 2. Eraser 31° developer 32. Transferable static elimination lamp 6, transfer charger 4, separation charger 51
Separation claw 36. Before cleaning charger 7, fur brush 37. A static elimination lamp 82 and the like are arranged. A thermistor 9 is arranged inside the photosensitive drum 1 to detect its temperature. The support shaft 1a of the photoreceptor drum is grounded via a resistor Rs in order to detect the current flowing through the photoreceptor drum.

The main charger 2 includes a metal charge wire 2a and a casing 2b made of gold that surrounds and supports the charge wire 2a. The casing 2b is grounded and the charge wire 2
The output terminal M of the high voltage power supply unit 200 is connected to a. Metal developing sleeve 3 provided in the developing device 32
The output terminal B of the high-voltage power supply unit 200 is connected to. The pre-transfer static elimination lamp 6 is connected to a high-voltage power supply unit 20
0 output terminal PTL. Transfer charger 4, separation charger 5, and pre-cleaning charger 7
Each charge wire is connected to the high voltage power supply unit 2, respectively.
It is connected to output terminals T, D and C of 00. The static elimination lamp 8 is connected to the output terminal QL of the high voltage power supply unit 200. Thermistor 9 and resistor Rs are connected to input terminals BT and DR of high voltage power supply unit 200, respectively. Further, the power supply terminal of the high voltage power supply unit 200 is connected to VPP, and the ground terminal COM is grounded. This ground terminal COM is a common ground terminal for each output terminal for supplying high-voltage power and signal input terminal.

Explain the general copy process. The photosensitive drum 1 is
The surface is uniformly charged to a high potential by the energization of the charger 2, and when it is irradiated with reflected light from the original, the surface potential changes depending on the light intensity, thereby forming an electrostatic latent image. Ru. When this electrostatic latent image passes through the developer 32, it becomes visible with toner. The fed recording paper is sent by the registration rollers 28 at a predetermined timing according to the rotation of the photoreceptor drum 1, and overlaps the surface of the photoreceptor drum 1 on which the toner image is formed. Thereafter, the toner image is transferred from the photosensitive drum 1 to the recording paper side by the urging of the transfer charger 4. Further, due to the biasing force of the separation charger 5, the recording paper on which the toner image has been transferred is separated from the photosensitive drum 1 and moves toward the conveyance belt 39. Then, the recording paper passes through a fixing roller 40 having a built-in heater to fix the toner image thereon, and then passes through a paper ejection roller 41 to a copy tray 42 .

FIG. 2b shows an operation board 300 of the copying machine shown in FIG. 2a.
Shows the appearance. Referring to FIG. 2b, this operation board has a number of operation keys Kl, 2°K3. ni4a, ni4
b. 5. 6a, 6b.

K7+ K8y K9a, 9b, 9c, KIO.

Kl 1. 12a, 12b, 13. K.C.

KS, # and KI, and a number of indicators Di, D2°B3
．． B4. B5. It is equipped with...

K1 is a key for specifying the operation mode of the sorter, and when the sorter is connected, one of the normal mode, sort mode, and stack mode can be selected by operating this key. K2 and 3 are keys for specifying the operation mode of the automatic document feeder, and by operating K3, the ADF
You can specify either (fully automatic) mode or 5ADF (semi-automatic) mode. Also, by operating 2, you can enter 1 normal mode.

Either size uniformity mode or automatic paper selection mode can be specified.

In the size uniformity mode, the copy magnification is automatically set according to the size of the original and paper (copy sheet) (for example, A4, 85, etc.). In automatic paper selection mode, the paper source is automatically selected according to the original size and copy magnification.

K4a and K4b are keys for adjusting the binding margin. That is, this copying machine is capable of copying by shifting the correspondence between the position of the original image and the position on the copy sheet in the sub-scanning direction.

Keys 4a and 4b are used to set binding margins for the front and back sides of the copy sheet, respectively.

K5 is a key for specifying the dimension specification variable magnification mode. In dimension specification variable magnification mode, after pressing 5 on the key (
Specify the fM draft size (by operating the numeric keypad described later), press # on the key, press 5 on the key again, specify the copy dimensions (by operating the numeric keypad), and press # on the key. push. With this operation, the copy magnification is automatically set by calculating the dimensions of the original and the copy.

K6a and 6b are zoom magnification keys.

By pressing K6a, the copy magnification is adjusted in an increasing direction in 1% units, and by pressing K6b, the copy magnification is adjusted in a decreasing direction in 1% units.

However, in the example of this copier, the copy magnification is 50% to 200.
The magnification can be adjusted within a range of %.

K7 is a duplex mode designation key, and each time this key is pressed, duplex mode and single-sided mode are alternately designated. K8 is a document size specification key, and by pressing this key, A3. A4. A5゜B4. Either B5 or B6 standard size can be specified sequentially. The specified document size is displayed on the display D5.

K9a, K9b, and K9c are keys for specifying any one of ten predefined copy magnifications. In this example, the copy magnification is 50+61°71.82.8
7,93,100,115°122 and 141 (%)
is stipulated. By pressing 9a on the same magnification key, no matter what magnification is set, the magnification can be returned to 100% with a single key operation. When 9b is pressed on the enlargement key, larger magnifications are selected sequentially from among the 10 types of magnification, and when 9c is pressed on the reduction key, smaller magnifications are selected sequentially from among the 10 types of magnification.

Note that, regardless of which mode the specified copy magnification is specified, the specified content is displayed as a maximum three-digit numerical value on the display D4.

KIO is a numeric keypad for inputting numerical values, and is used for setting the number of copies and for setting dimensions in the size/magnification mode. The set value is displayed on the display D1 as a maximum of two digits.

Kll is a paper key for selecting a paper feed system, and by operating this key, either the middle paper feed tray 122 or the lower paper feed tray 123 is selected alternately. The distinction of the selected paper feeding system and the size of the copy sheet loaded in the tray of each paper feeding system are displayed on the 1 display D3.

K12a and K12b are keys for adjusting copy density. In this example, the copy density can be adjusted in 7 steps.By pressing key 12a, the density can be set darker by one step in the dark direction, and by pressing key 12b, the density can be adjusted by one step in the lighter direction. It can be set to be thinner.

The concentration is adjusted. The set copy density is displayed on 1 display D2.
will be displayed.

K13 is a preheating key, KC is a clear and stop key that instructs to clear the numerical value entered with the numeric keypad KIO and stop the operation after starting the copy operation, and KS is a print start key that instructs the start of the copy operation.

KI is an interrupt key.

However, the above explanation is for the operation in normal mode.

That is, by operating switch DIPSW, which is covered with a lid in the normal state, on the operation panel shown in FIG. 2b, the parameter setting mode is entered. By selecting this mode, that is, by operating this DIPSW to specify the parameters to be set, and specifying the parameter setting mode, some of the functions of the above keys 2 display will be as follows. Become.

The numeric keypad KIO indicates the current between the main charger 2 and the photoconductor drum 1, the current between the transfer charger 4 and the photoconductor drum 1, the current between the separate charger 5 and the photoconductor drum 1, and the current between the pre-cleaning charger 7 and the photoconductor drum. It serves as a numerical setting key for inputting an instruction value for setting either the current or the developing bias voltage, and is used for input instructions.

The copy magnification display D4 displays the current (current flowing through the six-photo drum) or voltage (developing bias voltage) of the system selected by the parameter setting mode switch D-PSW.

The zoom up key 6a is used to update the control index value of the system selected by the numeric keypad KIO in the increasing direction, and the zoom down key 6b is used to update the control index value of that system in the decreasing direction. used for.

FIG. 3 shows the configuration of the electric circuit of the high voltage power supply unit 200. See Figure 3. 205 is an AC-DC converter, which converts a predetermined DC power (voltage Vpp
) is generated. 210 is a voltage stabilization circuit, and the voltage V
Convert PP to a stabilized voltage Vcc. ICI,I
C2 and IC3 are integrated circuits. Specifically, ICI
is a 7811G single-chip microcomputer manufactured by NEC Corporation, and has an internal oscillation circuit (not shown).

It is equipped with 10 serial I/O circuits, 2 interrupt control circuits, a timer, an event counter, an 8-person A/D (analog/digital) converter, ROM, RAM, 170 parallel circuits, and more.

IC2 and IC3 are 8253 programmable timers. The integrated circuits IC2 and IC3 each have 3 internal circuits.
It has two timers.

This high voltage power supply unit 200 includes six conversion circuits 2
51, 252, 253, 254, 255 and 256 are provided. Each of the conversion circuits 251 to 256 includes a transformer, and a higher voltage is generated on the secondary side of the transformer than on the primary side. The conversion circuits 251 to 255 are equipped with diodes that convert alternating current on the secondary side of the transformer to direct current.

On the primary side of each transformer of the conversion circuits 251 to 256, driver circuits 241, 242, 243, 244
, 245 and 246 are connected. The input terminals of the driver circuits 241 to 246 have gates Gl, G2 . G3゜G4. The output terminals of G5 and G6 are connected.

Each gate Gl, G2 . G3. G4. One input terminal of G5 and G6 is connected to the microcomputer IC1 (
7) Output ports PAO, PAL, PA2°PA3. P.A.
4 and PA5. In addition, each gate Gl,
The other input terminals of G2 and G3 are connected to timer I, respectively.
C2 channel #o.

#1 and #2 are connected to the output terminals (OUT) of each gate G4. The other input terminals of G5 and G6 are, respectively,
It is connected to the output terminals (OUT) of channels #C1, #1, and #2 of the timer IC3.

All clock input terminals (C
LK) is the output port P of the microcomputer ICI.
Commonly connected to C4. In addition, all three gate signal input terminals (GATE) of timer IC2 and IC3
is the output port PC6 of the microcomputer ICI.
are commonly connected. In this example, the output port PC
4, a pulse signal (To) with a period of 086 μsec appears, and a pulse signal (COO) with a period of 48 μsec appears at the output port PC6 (see FIG. 5a).

Output terminals M and T of each conversion circuit 251-256.

D, C, B, PTL and QL are respectively connected to the main charger 2. as described above. Transfer charger 4° Separation charger 5. Charger 7° developing sleeve 3 before cleaning
．． It is connected to the pre-transfer static elimination lamp 6 and the static elimination lamp 8. The conversion circuit 256 is shared by the pre-transfer static elimination lamp 6 and the static elimination lamp 8. In addition, the conversion circuits 255, 25
6 is provided with variable resistors VR5 and VR6 for detecting the output level from each circuit.

The output terminals of the variable resistors VR5 and VR6 of this conversion circuit are respectively connected to the analog input port AN4. Connected to AN5. The analog input port AN6 is connected to the thermistor 9 shown in FIG. 1.The male analog input port AN7 is connected to the resistor Rs for drum current detection shown in FIG.
The voltage at which the drum current was detected is input. The voltage for detecting this drum current is input in a time-division manner in a minute sequence set at the beginning of the recording process.
The output levels from converters 1 to 254 are detected respectively, and control inputs to these converters 251 to 254 are set.

Terminals TxD, RxD and SE of high voltage power supply unit 200
L is connected to the serial interface circuit 180 (FIG. 4) of the copying process control unit 100.

Further, a pulse signal synchronized with the rotation of the photosensitive drum 1 is applied to the terminal DCLK. Note that 220 is a reset signal generation circuit, and 230 is a monitor unit connectable for testing.

FIG. 4 shows the copying process control unit 100 of the copying machine shown in FIG. 2a and its peripheral electric circuit configuration. Referring to FIG. 4, the control unit 100 includes a microprocessor 110. ROM (read-only memory 120.RAM
(read/write memory) 130, I10 boat 140. A
/D converter 150, serial interface circuit 1
60°170 and 180 are provided. Each serial interface circuit 160, 170 and 180 includes a sorter 600. An ADF (automatic document feeder) 700 and a high voltage power supply unit 200 are connected.

Note that the sorter 600 and ADF 700 are not shown in FIG. 2a.

The control unit 100 also includes a scanner unit 210.
．． Fixing unit 220. Lamp (for exposure) control unit 230. A paper feed unit 24o, a driver 25o, an operation board 300, etc. are connected.

Next, the operation of the high voltage power supply unit 200 will be explained. The following Tables 1, 2, 3 and 4 respectively show the assignment of each port of the microcomputer ICI, the assignment of the internal timer of IC1, and the external timer (IC2 and IC3).
The assignment of microcomputer IC and the correspondence of data or registers in each control system are shown in Figure 6a.
A part of the memory map of I is shown.

Furthermore, among the ports, registers, memories, or signals indicated by symbols in Tables 1, 2, 3, and 4 of this specification and the flowcharts in the drawings, those in parentheses refer to the symbols in parentheses. It indicates the content, and if it is not attached, it indicates the address or location.

Table 2 Table 3 Table 4 First, an outline of the circuit operation will be explained with reference to FIG.

Each of the conversion circuits 251 to 256 provides alternating current electrical energy to the primary side of the transformer that is superior to them.
A voltage or current is output at a level depending on the electrical energy and the characteristics of the transformer. The electrical energy on the primary side of these transformers is controlled by the signals applied to the gates G1 to G6. For example, the electrical energy on the primary side of the transformer TI of the conversion circuit 251 is controlled by the signal 0υ.
TMC and signal DRVMC.

If the signal OUTMC is at a high level H, the electrical energy becomes zero regardless of the signal DRVMC. When the signal OUTMC is at a low level L, electrical energy is generated according to the signal DRVMC. These gates Gl, G2. G3゜G4. G
5. Signals from each timer of IC2 and IC3 added to G6 1) RVMC, DRVTC, DRV[)C, DRVC
C.

DRVBV and DRVQV are as shown in FIG. 5a,
This is a pulse width modulated pulse with one period of 48 μsec.

Therefore, the level of the output voltage (or current) of each conversion circuit 251 to 256 changes according to this pulse width. By controlling this pulse width, the level of each power source is adjusted. Pulse signals DRVMC, DRVTC,
DIIIVDC, DRVCC, DRVBV and DRVQ
D is.

It is generated by timers IC2 and IC3. That is, the pulse width is determined in advance by the microcomputer ICI using the timers IC2 and IC2.
The pulse period is determined according to the timer value set for each channel of 3, and the pulse period is determined by the microcomputer ICI at port PC6
It is determined by the constant periodic trigger pulse COO outputted to . That is, as shown in FIG. 5a, the trigger pulse C○0
When becomes a high level (in synchronization with the falling edge of clock To), each signal DRVMC, DRVTC, DRVDC
, DRVCC, DRVBV, and DRVOV are set to a low level B, and each timer starts counting the clock To from that timing.

When the count value reaches the timer setting value, the signal becomes high level H.
The operation of resetting is repeated every time the trigger pulse COO becomes a high level H.

This signal generation operation is automatically performed by timers IC2 and IC3. Microcomputer ICI is a timer IC
All that is required is to update the timer setting values for each channel of IC2 and IC3. Signals C00 and To are output by the internal hardware of the microcomputer ICI.

That is, TO is the internal clock φ3 with a period of 0.6 μsec, and COO is the output of the internal timer/event counter. Since the values shown in Table 2 are set in the registers ETMO and ETMI of the timer/event counter, the timer/event counter always outputs a pulse with a period of 48 μsec.

FIG. 7a shows a schematic operation of the microcomputer ICI. This will be explained with reference to FIG. 7a. When the power is turned on,
First, various ports, internal read/write memory, various internal registers, timers IC2, IC3, etc. are set to initial states, and an interval timer for sampling is started. This timer is ICI's internal timer TMO, and as shown in Table 2 above, in this example, by setting the clock TO to φ384 and the timer setting value to 26, 1m5
Operates as an ec interval timer.

Then, every time the internal timer TMO counts 1m5ec, an internal timer interrupt 1NT is sent to the microcomputer ICI.
To occurs. When the interrupt 1NTTo occurs, the "sampling proportional calculation" subroutine 5PCAL is executed next. If there is no abnormality in the result of subroutine 5PCAL, then the trigger input signal is checked.

The trigger input signal referred to here is control data provided by the copying process control unit 100 and is present in the receive buffer register TRIG shown in FIG. 6a. This register TRIG receives six trigger signals MCIN and TCIN as shown in FIG. 6C.

Contains data bits corresponding to DCIN, CCIN, BVIN and QVIN. Each data bit is "1"
That is, a high level H indicates that the signal is on.

A "0" or low level L indicates the signal is off. When at least one of the six trigger signals is on, output of the clock pulse TO and trigger pulse COO is permitted. Then, a subroutine 0UTPUT for output processing is executed, and six trigger output signals OUTMC, 0UTTC, 0UTDC, OUTMC, 0UTTC, 0UTDC,
OυTCC, 0UTBV, and 0UTQV are connected to the respective output ports PAO, PA of the microcomputer I (, L).
L, PA2. PA3. PA4゜PA5. PA6 and PA
Output to 7. Then, the internal timer interrupt 1NTT again
Wait for o and repeat the above process as a loop. If there is an abnormality in the result of this subroutine 5PCAL, or if all trigger input signals are off, the output of clock pulse To and trigger pulse C00 is set to be prohibited.

When an A/D conversion interrupt request and a reception interrupt request occur during the above loop processing, these interrupt requests are accepted and predetermined interrupt service processing is executed. A/
A D conversion interrupt request occurs when A/D conversion is completed, and a receive interrupt occurs when data from copy process control unit 100 is received.

The processing contents of subroutine 5PCAL are shown in FIGS. 7c and 7d. This subroutine is roughly divided into eight processing groups.

When this subroutine is entered, the contents of the register TRIG are first referred to, and processing is selectively performed depending on the result.

If the content of TRIG is OIH (MCIN), first
The boat AN7 is selected as the signal input terminal of the /D converter. Note that when the input terminal is selected, the A/D converter automatically starts the conversion operation. Next, the sampling data is loaded into accumulator A. The sampling data at this time is the content of the level of the analog input port AN7, that is, the output level of the resistor Rs, but it is the content of the drum current (main corona) MCD when only the conversion circuit 251 is energized by MCIN. Next, it is determined whether the contents of accumulator A are within a predetermined normal value range. The criterion for judgment is the minimum value MC: M I
N, whether it is within the maximum value MCMAX. If it is abnormal, the abnormality flag EMGMF is set to "1" and the process returns to the main routine. If normal, the contents of the accumulator are subtracted from the target data SMC, and the result, that is, the error between the target value and the detected value, is stored in the accumulator. Next, the contents of the accumulator and the proportional gain KM are calculated, and the result is stored in the accumulator. Then, store the contents of the accumulator in register MC.
It is added to TIM (register of PWM control timer value for high voltage power supply control when main corona occurs) and the register MCTl is added.
The contents of M are updated, and finally, ADCNT is set to 0 and the process proceeds to check the contents of the primary ADCNT.

If the content of TRIG is 028 (TCIN), first
Port AN7 is selected as the signal input terminal of the /D converter. Next, the sampling data is loaded into accumulator A. The sampling data at this time is the level of the analog input port AN7, that is, the content of the output level of the resistor Rs.
This is the content of the drum current (transfer corona) TCD when only energized. Next, it is determined whether the contents of accumulator A are within a predetermined normal value range. If it is abnormal, the abnormality flag EMGTF is set to "1" and the process returns to the main routine. If normal, the contents of accumulator A are subtracted from the target data STC, and the result, that is, the error between the target value and the detected value, is stored in accumulator A.

Next, the contents of accumulator A are multiplied by the proportional gain KT, and the result is stored in accumulator A. Then, the contents of accumulator A are added to register TCTIM (register of PWM control timer value for high-voltage power supply control of transfer corona generation system), the contents of register TCTIM are updated, ADCNT is set to 1, and the next ADC
Proceed to NT content check processing.

If the content of TRIG is 04H (DCIN), first
Port AN7 is selected as the signal input terminal of the /D converter. Next, the sampling data is loaded into accumulator A. The sampling data at this time is the level of the analog input port AN7, that is, the content of the output level of the resistor Rs.
This is the content of the drum current (separated corona) DCD when energizing only. Next, it is determined whether the contents of accumulator A are within a predetermined normal value range. If it is abnormal, the abnormality flag EMGDF is set to "1" and the process returns to the main routine. If normal, the contents of accumulator A are subtracted from the target data SDC, and the result, that is, the error between the target value and the detected value, is stored in accumulator A.

Next, the contents of accumulator A are multiplied by the proportional gain KD, and the result is stored in accumulator A. Then, the contents of the accumulator A are added to the register DCTIM (register of the PWM control timer value for controlling the high voltage power supply of the minute M corona generation system), and the contents of the accumulator A are added to the register DCTIM.
Update the contents of.

Set ADCNT to 2 and proceed to the next ADC:NT content check process.

If the content of TRIG is 088 (COIN), first,
Port AN7 is selected as the signal input terminal of the A/D converter. Next, the sampling data is loaded into accumulator A. The sampling data at this time is the level of the analog input port AN7, that is, the content of the output level of the resistor Rs.
The drum current (cleaning corona) in the energization of only 4 is the content of the CCD 6. Next, it is determined whether the content of the accumulator A is within a predetermined normal value range. If it is abnormal, set the abnormal flag EMGCF to "
1” and return to the main routine. If normal,
The contents of accumulator A are subtracted from target data SCC, and the result, that is, the error between the target value and the detected value, is stored in accumulator A. Next, the contents of accumulator A are multiplied by proportional gain KC, and the result is stored in accumulator A. And accumulator A
The contents of register CCTIM (PWM control timer value register for high voltage power supply control of cleaning corona generation system)
and updates the contents of the register CCTIM.
Set DCNT to 3 and proceed to the next ADCNT content check process.

In other words, the processing of 5PCAL up to this point is control based on proportional calculation only for each of the triggered high-voltage power supplies 251 to 254. And TRIG is OIH, 02H, 0
If it is neither 4H nor 08H, check the contents of ADCNT.

If ADCNT is 3 or less, set ADCNT to 4,
If it is not 3 or less, the process directly proceeds to the next ADCNT content checking process (Fig. 7d). Next, when proceeding to ADCNT check processing, the contents of ADCNT are referred to and processing is selectively performed according to the result.

If the content of ADCNT is 4, port ANA is first selected as the signal input terminal of the A/D converter.

Next, the sampling data is loaded into accumulator A. The sampling data at this time is the level of the analog input port AN4, that is, the content of the voltage (developing bias voltage) BVD in the conversion circuit 255. Next, it is determined whether the contents of accumulator A are within a predetermined normal value range. If abnormal, abnormal flag EM
Set GVF to "1" and return to the main routine. If normal, the contents of the bias data register BIAS are loaded into the accumulator A. This register BIAS
is located in the receive buffer shown in FIG. 6a, and the contents of this register are updated by instructions from the replication process control unit 100.

Next, the contents of the bias data lookup table BTBL (not shown) are referred to according to the contents of the accumulator A, and the obtained data is stored in the accumulator A. After storing the contents of accumulator A in register B, the developing bias temperature B is stored in accumulator A.
TD is loaded, a constant KBT, the contents of register B, and bias voltage target data SBV are sequentially added to it, and the result is stored in accumulator A. Furthermore, after storing the contents of accumulator A in the register, the sampling data BVD is loaded again, the value is subtracted from the contents of register B, the result is multiplied by the proportional gain KB, and the result is stored in the 7-accumulator A. Store. lastly,
The contents of the accumulator A are added to the register BVTIM (register for the PWM control timer value of the developing bias system), the contents of the corresponding register are updated, and the process returns to the main routine.

Therefore, the control content (substantially the target value) of the developing bias system is set by adding the bias level BIAS corresponding to the copy density display value and the drum temperature BTD to the reference value SBV. Namely.

Corrected according to temperature.

If the content of ADCNT is 5, port AN5 is first selected as the signal input terminal of the A/D converter.

Next, the sampling data is loaded into accumulator A. The sampling data at this time is the level of the analog input port AN5, that is, the content of the voltage (static elimination lamp) QVD in the conversion circuit 256. Next, it is determined whether the contents of accumulator A are within a predetermined normal value range.

If it is abnormal, the abnormality flag EMGQF is set to "1" and the process returns to the main routine. If normal, target data S
The contents of accumulator A are subtracted from QV, and the result, that is, the error between the target value and the detected value, is stored in accumulator A. Next, the contents of accumulator A are multiplied by proportional gain KQ, and the result is stored in accumulator A. Finally, register QVTIM (register for the PWM control timer value of the static elimination lamp system) is set to the accumulator A.
The contents of the register are updated by adding the contents of the register, and the process returns to the main routine.

If the content of ADCNT is 6, port AN6 is first selected as the signal input terminal of the A/D converter.

Next, the sampling data is loaded into accumulator A. The sampling data at this time is the content of the temperature data BTD according to the level of the analog input port AN6, that is, the state of the thermistor 9. Next, it is determined whether the contents of accumulator A are within a predetermined normal value range. If it is abnormal, set the abnormal flag EMGBF to "
1” and return to the main routine. If normal, return to the main routine immediately.

If the content of ADCNT is 7, first, port AN7 is selected as the signal input terminal of the A/D converter. Next, the sampling data is loaded into accumulator A. The sampling data at this time is.

This is the level of the analog input port AN7, that is, the content of the output level DRD (drum current) of the resistor Rs. Next, it is determined whether the contents of accumulator A are within a predetermined normal value range.

If there is an abnormality, the abnormality flag EMGRF is set to "1" and the process returns to the main routine.

If the content of ADCNT is not one of 4 to 7,
Skip these processes and return to the main routine.

By the way, when the A/D converter starts the conversion operation, it operates in parallel with the execution of the program, and when the data is collected in the four conversion result registers CRO-CR3, it takes approximately 230 μsec.
Then finish the conversion. When the conversion is completed, an A/D conversion interrupt request is generated.

When this interrupt request occurs, the microcomputer I
CI is the A/D interrupt service routine i shown in FIG. 7e.
Execute NTAD.

See Figure 7e. This routine i N T A D
Now, when an interrupt occurs, the contents of the register are temporarily saved, A/D conversion is stopped, and the A/D conversion result registers CRO and CRI inside the microcomputer tc1 are saved.
, CR2 and CR3, and store the result in accumulator A. Next, the start address MCD of the sampling data buffer of the memory map shown in FIG. 6a is set in the HL register (address pointer), the contents of the register ADCNT are stored in the B register, and the memory ( Store the contents of accumulator A in the sampling buffer. Next, check ADCNT, and if it is 3 or less, skip the subsequent processing and proceed to register restoration processing, and if it is not 3 or less (4 or more), register ADCNT is checked.
Increment (+1) the contents of NT. the result,
If the contents of registers A and DCN T are 8 or more,
Set this register ADCNT to 4. Then, restore the previously saved registers, enable interrupts,
From this process, return to the original routine.

That is, in this A/D interrupt service routine, sampled data is stored at a predetermined address in the transmission buffer register and the contents of register ADC:NT are updated, but ADCNT 0 to 3 are stored in the above-mentioned 5PCAL processing. , TRIG; otherwise, in the A/D interrupt service routine, ADCNT values 4 to 4 are fixed.
7 will be repeated sequentially.

By the way, how is the trigger output signal TRIG generated?

The process in FIG. 7b is carried out by UTPUTJ. That is, by loading the contents of register TRIG into accumulator A and calculating the logical product (AND) of the data and the fixed value 3F (hexadecimal representation) bottom 6
Extract bits.

Furthermore, the data is complemented bit by bit and the result is output to the output port PA.

Further, when data is sent from the copy process control unit 100, a receive interrupt request is generated, which causes the microcomputer ICI to execute the receive interrupt service routine riNTsRJ shown in FIG. 7f.

This process will be explained with reference to FIG. 7f. In this routine, first, the registers are saved, the contents of the receive buffer register RXB of the serial interface unit are loaded into the accumulator A, and it is checked whether the loaded data matches a predetermined synchronization character. If it is not a synchronous character, set the start address of the receive buffer shown in Figure 6a, that is, the address of TRIG, in the HL register, set the contents of the receive byte counter RXCNT in the B register, and set the contents of the receive byte counter RXCNT to the B register, which is indicated by the sum of the HL register and B register. The contents of accumulator A, that is, the received 1-byte data, are stored in the memory at the address. Then, the received byte counter RXCNT is incremented. The received byte counter RXCNT is cleared to 0 when its value becomes 8 or more and when a synchronization character is received. Next, check the transmission end flag FST and wait until it becomes "1". Transmission end flag FST
When becomes "1", the value of the start address of the transmission buffer shown in FIG. Load the contents of the memory on the transmit buffer indicated by the sum of
Store in. Next, the contents of the transmission byte counter TXCNT are incremented. however.

When TXCNT becomes 10 or more, clear it to 0. Next, the contents of the registers previously saved are restored, one interrupt is enabled, and the routine returns to the original routine. The data stored in the transmission buffer TXB is automatically converted to serial data (independent of software processing) and transmitted to the copying process control unit 100.

The transmitting buffer and receiving buffer of the microcomputer CL are arranged as shown in FIG. 6a, and the synchronization character T
N C, sampling data M CD.

TDC, DCD, CCD, BVD, QVD.

The BTD, DRD, and abnormality flag EMG are sent to the copy process control unit 100. Additionally, trigger data TRIG transmitted from the copying process control unit 100
, bias data BIAS, each target value data SMC,S
TC, SDC, SCC.

SBV and SQV are stored in the receive buffer of microcomputer ICI.

Next, the operation timing of this high voltage power supply unit will be explained. As mentioned above, data to the microcomputer ICI that controls each high voltage power supply is sent to the copying process control unit 1.
00, this copying process control unit 100 provides a minute sequence at the beginning of one recording process, and provides control data to update the control target value of each high voltage power source. That is, as shown in FIG. 5b, the trigger data TRIG, which has a slightly shifted timing sequence at the beginning of the copy cycle, is transmitted from the copy process control unit 100 to the microcomputer rC1.
By controlling each high-voltage power supply using this TRIG data and shifting the energization timing of each high-voltage power supply 251 to 254, a minute sequence is provided at the beginning of the copy cycle in which only 1ffi[ is turned on. conduct.

- in the copy cycle, the trigger data TRIG
is supplied at the timing shown in FIG. 5b.

That is, a minute sequence iM+tTr tT:)g t in which only one power supply is always turned on at the beginning of a copy cycle.
Trigger data TRIG is supplied so as to provide a period of Q. Therefore, when the high voltage power supply unit 200 executes the main routine shown in Fig. 7a, and executes the "sampling proportional calculation" subroutine 5PCAL shown in Figs. 7c and 7d using the internal timer interrupt 1NTTo every 1m5ec, the A /D conversion is started, and when the conversion is completed, an A/D interrupt service routine is executed to take in the conversion data. However, in the initial minute sequence, proportional control calculations are continued to update the control target values of each high voltage power supply. I will do it. The time required for this one time processing is completed within 1m5ec, so
The processing will be executed at the timing shown in FIG. 5c.

That is, first, the M CI according to the contents of TRIG is
Micro sequence with only N on 1. Select the input port A N7 to perform A/D conversion, and depending on the result, set the pulse width timer value MC of the main corona system.
Update TIM. Here, only the power supply of the main corona system is turned on according to the contents of TRIG, and the drum current is detected to update the pulse width timer value MCTIM of the main corona system.

As long as the contents of this TRIG do not change, this process will continue for 1m.
Repeated every 5ec. At this time, ADCNT is fixed at O by the processing of 5PCAL, and is not changed by the processing of the A/D interrupt service routine. The updating of the pulse width timer by controlling this sampling/proportional calculation converges within 5 times, so the minute sequence tM is 5 m
It is 5ec. Next, micro sequence 11 is entered, and in the same way, only the transfer corona system power is turned on according to the contents of TRIG, and the input port AN7 for detecting the drum current is selected and its A/D conversion is performed. The pulse width timer value TCTIM of the transfer corona system is updated according to the result. That is, in this minute sequence tT, only the power source of the transfer corona system is turned on based on the content TCIN of TRIG, and the drum current at this time is detected to update the pulse width timer value MCTIM of the transfer corona system. This process is repeated every tmsec unless the contents of TRIG change. At this time, ADCNT is fixed to 1, and A/
It is not changed by the processing of the D interrupt service routine. This sampling/proportional calculation control is performed within 5 times;
Since it converges, this minute sequence 1. It is also 5m5ec. With this minute sequence tT of 5 m5 ec, the proportional calculation control for updating the pulse width timer value T CT I M of the transfer corona system is completed. Similarly, the pulse width timer value DCT IM of the separated corona system is updated at 5 m5 ec of the next minute sequence to, and the pulse width timer value CCT IM of the cleaning corona system is updated at 5 m5 ec of the next minute sequence tc. Perform proportional calculation control.

When this minute sequence CM+ iT+ to, ic ends at t4, the trigger data TRIG becomes + MCI N, TCI N, as shown in FIG. 5b.

DCIN, CCIC, BVIN, QVIN (7) are all set to be on, and from this t4 onwards, the pulse width timer value MC of the main corona system is set during one copy cycle.
T IM, transfer corona system pulse width timer value TCT I
M, isolated corona system pulse width timer value DCTI M,
and cleaning corona system pulse width timer value CCT
For IM, its pulse width is fixed.

After t4 of the minute sequence, the trigger data TR
IG is 01. Since it is none of H, 02H, 04, and 08H, in the processing of 5PCAL in Figure 7C, A
It is checked whether the content of DCNT is 3 or less, and if ADCNT is 3 or less immediately after completing the minute sequence, ADCNT is set to 4. This completes the process of updating the control target value of the high-voltage power supply in the initial minute sequence, and from now on, the contents of ADCNT will be repeated sequentially from 4 to 7 in the process of the A/D interrupt service routine. Become. As a result, when the next interval timer interrupt occurs, the input port ANA is selected and its A/D conversion is performed, and the pulse width timer value BVTIM of the developing bias system is updated in accordance with this result. The A/D interrupt service routine process at this time causes the ADC to
Since NT has been updated to 5, when the first interval timer interrupt occurs, the input capacitor (AN5) is selected and its A/D conversion is performed, and according to this result, the pulse width timer value of the static elimination lamp system is set. Update QVTIM. The A/D interrupt service routine process at this time causes the ADC to
Since NT has been updated to 6, when the next interval timer interrupt occurs, input port AN6 is selected and its A/D conversion is performed, and this result, that is, the developing bias temperature is taken in, and this developing bias temperature is Determine whether the value is within the normal range. Since ADCNT has been updated to 7 by the processing of the A/D interrupt service routine at this time, when the primary interval timer interrupt occurs,
Select input port AN7 and perform A/D conversion on it,
The result, that is, the drum current is taken in, and it is determined whether or not this drum current is within a normal value range. The value of the drum current at this time is the total value of the drum current at that time since all the chargers are turned on by the trigger data TRIG. Here, ADCNT is set to 4 by the processing of the A/D interrupt service routine during this A/D conversion, so when the next interval timer interrupt occurs, input port AN4 is selected and its A/D D conversion will be performed, and from then on ADCNT will be 4 to 7.
Sequentially iterate through the values of and repeat the above process.

Therefore, the infinitesimal sequence iM+ iT+ iD+t
At step c, only one of each high voltage power supply is energized and control processing for updating the control target value is performed for each, and after the minute sequence (after t4: Figures 5b and 5c), the developing bias is Voltage system control amount update processing, static elimination lamp system control amount update processing,
Developing bias temperature detection processing and drum current detection processing are
Each will be executed repeatedly at a cycle of 4m5ec.

By the way, as mentioned above, microcomputer IC
The receive buffer of I is as shown in Figure 6a,
Character TXS for synchronization signal present in the transmission buffer
YNC, sampling data MCD, TCD, DCD,
CCD, BVD.

The QVD, BTD, DRD, and abnormality flag EMG are sent to the copy process control unit 100.

Further, trigger data TRIG, bias data BIAS, and target value data SMC, STC, and SDC are transmitted from the copying process control unit 100.

SCC, SBV and SQV are microcomputer I
Stored in the CI's receive buffer.

Therefore, from the copying process control unit 100, the actual voltage 1 circuit current of the high voltage power supply unit 200.

The drum current, temperature, etc. can be known, and control target values for each control system of the high voltage power supply unit 200 can be arbitrarily set.

FIG. 8a shows a schematic operation of the copying process control unit 100, and FIG. 6b shows a portion of the memory map of the unit. First, explanation will be given with reference to FIG. 8a. When the power is turned on, initial settings are performed, and then standby processing is performed. In the standby process, the status reading process of various switches and various sensors, key manual processing 2 compliance processing 2 display processing, etc. are performed.
Determines whether or not a copy operation is possible and checks the status of the print key.

When the print key is turned on after copying becomes possible, a predetermined copy process is executed, and when all copies are completed, the process returns to standby process.

The standby process G2 includes a subroutine rTE shown in FIG. 8c.
This subroutine is a process for setting parameters for the high-voltage power supply unit 200. First, the mode switch DIPSW for setting the test mode and selecting the high-voltage power supply to be set shown in FIG. If the mode switch DIPSW is off, this subroutine does nothing and returns to the original routine.However, if DIPSW is on, the subroutine rGEN
TRG" generates a trigger signal for each high-voltage power supply, the next subroutine rsETsJ sets the output target value of each high-voltage power supply, the next subroutine rADJsJ adjusts the output setting value of each high-voltage power supply, and the final Subroutine rDI
S PJ sequentially executes these processes to display the number and output value of each selected high voltage power supply. The specific processing contents of these subroutines are shown in FIG. 8d.

This is shown in Figures 8f, 8e and 8b.

The subroutine rGENTRGJ will be explained with reference to FIG. 8d. In this routine, first the start key KS on the operation board is set, and the clear/stop key KC is set.
Check the start flag that is reset with . If the start flag is 0, the accumulator A is set to O, the 0 of this accumulator A is transferred to TRIG, and all trigger data TRIG, which is a trigger signal for each power supply, is reset. If the start flag is 1, the contents of the input buffer register of the dip switch DIPSW on the operation panel are transferred to accumulator A, and the contents of accumulator A are further transferred to the TRIG register.

Next, the contents of accumulator A are checked.

If the content of accumulator A is O, that is, if there is no trigger, the routine returns to the original routine.

If accumulator A is not 0, encode its contents, that is, trigger data TRIG, and store it in array buffer AR.
Store in RAY and return.

As a result, the contents of the dip switch DIPSW, OIH, 02H, are stored in the array buffer ARRAY.

04H, 08H, IOH and 20H are numerical data 0,
1, 2, 3.4 and 5 and stored. In other words, if this subroutine is executed after any of the DIP switches DIPSW is pressed, the trigger data TRI will be changed according to the setting bit of the DIP switch DIPSW.
Each bit 0°1.2, 3.4 and 5 of G is set to "1".

That is, by setting bit O of dip switch DIPSW, trigger data TRIG is set to energize only the main corona system, and similarly, by setting bit O of dip switch DIPSW, trigger data TRIG is set to energize only the main corona system.
IPSW bit l, bit 2, bit 3. By setting bits 4 and 5, the trigger data TREG is set to energize only the transfer corona system, the separation corona system, the cleaning corona system, the developing bias system, and the static elimination lamp system (see Figure 6c). ).

Next, the subroutine "5ETS" will be explained with reference to FIG. 8f. In this routine, first, the rising edge of # is checked on the recall key, and if the rising edge is detected, the contents of the numeric keypad buffer TKYBUF are transferred to the set value buffer 5ETBUF, and if not, this is skipped. Next, depending on the contents of array buffers A and RRA Y, which contain encoded data of the dip switch DIPSW, the routine branches to seven routines depending on the type of each high-voltage power supply to be set.
A proportional constant x1 and a bias constant x2 given according to each high voltage power supply are stored in the register and the C register. Then, dimension conversion of the data set in 5ETBUF is performed.

That is, the contents of 5ETBUF are loaded into accumulator A and multiplied by the proportionality constant of register B.

Furthermore, the bias constant of the C register is added and stored in the accumulator A. SMC of the transmit buffer shown in Figure 6b
Set the address of array buffer A in the HL register and
Load the contents of RRAY into the B register. And H
The calculated contents of accumulator A are stored in the memory whose address is the sum of the contents of the L register and the contents of the B register. In other words, the relationship between the output current or voltage of each high-voltage power supply and the value obtained by A/D conversion of this is expressed by the following formula: y=a
x+b (x: analog quantity, y: digital value, a, b:
(a constant determined by the A/D converter and sensor), the data to be given to the following equation is 5ETBUF as X, ml as a, il+ din C
1+b! + qt as b, C2, t2+ d2+
C2+ b2+ 'T2 is given, and the resulting output data y is SMC, STC.

Obtain SDC, SCC, SBV, 5QV (7) data.

For example, 40o [μA] entered using the numeric keypad is
It is converted to 203 [unitless] by calculating the following equation, and this numerical value 203 is controlled within the microcomputer ICI as a target value.

The subroutine rADJ SJ will be explained with reference to FIG. 8e. In this routine, first, zoom keys 6a and 6b (see FIG. 2b) on the operation board are checked. If both are off, delay timer register DLTI
Clear the contents of M to 0 and return to the original routine. If either one is on, register DLTIM is subsequently incremented.

The result is compared with 2, and if they do not match, then compared with 20. If it matches 20, the register DLTIM is cleared to 0, and if not, it immediately returns to the original process. If the contents of the register DLTIM match 2, it is determined whether the zoom up key 6a or the zoom down key 6b is turned on. Numeric keypad register TKY
BUF holds a value corresponding to the operation of the numeric keypad KIO on the operation board. In other words, the numerical value entered by the key operated immediately before is displayed in the numeric keypad register TKYB.
It is held at UF. If K6a is on, the contents of the numeric keypad register TKYBUF are incremented, and if K6b is on, the contents of the numeric keypad register TKYBUF are decremented, and the process returns to 1.

The numeric keypad register TKYBUF holds a value corresponding to the operation of the numeric keypad KIO on the operation board, and the numeric value entered by the key operated immediately before is held in the numeric keypad register TKYBUF. When the key displaying the numerical value 3 is pressed, the numerical value 3 is held in the register TKYBUF. Therefore, when subroutine rADJSJ is executed.

The contents of the target value data specified by the numeric keypad are displayed depending on the time and number of times the key 6a or 6b is pressed.
Increase or decrease sequentially.

Therefore, if you keep pressing 6a on the zoom up key after setting a predetermined numerical value SMC with the numeric keypad, the contents of the target value data SMC will be transferred to the delay timer register DLT.
It increases by +1 once every 20 counts of the IM value.

Next, the rD I S PJ subroutine for display processing is shown in FIG. 8b. This will be explained with reference to FIG. 8b.

First, the state of the mode switch DIPSW is checked. When this dip switch DIPSW is off, that is, in the normal mode, the set copy magnification data is loaded into the accumulator A, and numerical information corresponding to the value is displayed on the magnification display D4 on the operation board. If any of these dip switches DIPSW is on,
Load the contents of the array buffer ARRAY into the B register, and set the value of the address of MCDD located at the head of the drum current buffer shown in Fig. 6b into the HL register.
The data at the address of the sum of the contents of the HL register and the contents of the B register is set to low in the accumulator A, and the data is displayed on the magnification display D4 on the operation board. At this time, the data content of the B register, ie, the number of each selected high voltage power supply, is displayed on the copy number display DI on the operation board.

In other words, 1 Normally, the copy magnification is displayed on the display D4,
The number of copies is displayed on the display D1, but when the mode switch DIPSW is turned on to enter the drum current setting mode by energizing each high voltage power supply, the display D4 shows the drum current MCDD being adjusted.

The value of TCDD, DCDD or CCDD is displayed, and the number of each high voltage power supply being adjusted is displayed on the display Di. This display content is the actual drum current sampled by the high voltage power supply unit 200, so while checking the actual drum current value for each high voltage power supply on the display D4, press the zoom up key 6a and the zoom down key 6b.
Set value (i.e. target value) of the control system of each high voltage power supply using
can be updated.

The reception interrupt service routine in the copying process control unit 100 is shown in FIG. 8g. When the unit 100 receives data from the high voltage power supply unit 200 through the internal serial interface unit during execution of the main routine shown in FIG. 8a, A reception interrupt request occurs and the 8th
Execute the process shown in figure g.

This will be explained with reference to FIG. 8g. In this routine, the registers are first saved, the contents of the receive buffer register RXB of the serial interface unit are loaded into accumulator A, and it is checked whether the loaded data matches a predetermined synchronization character. Unless it's a sync character.

The start address of the receive buffer shown in FIG. 6b, that is, MC
Set the address of D in the HL register, set the contents of the receive byte counter RXCNT in the B register, and
The contents of accumulator A, that is, the received 1-byte data, are stored in the memory at the address indicated by the sum of the contents of the L register and the B register. Then, the received byte counter RXCNT is incremented. When the received byte counter RXCNT has a value of 9 or more,
It is cleared to 0 when a synchronization character is received.

Next, check the transmission end flag FST and see if it is "
Wait until it reaches 1. When it becomes "1".

The start address of the transmission buffer shown in FIG. 6b, that is, TX
Set the address value of SYNC to the HL register, load the contents of the transmit byte counter TXCNT to the accumulator A, load the contents of the memory on the transmit buffer indicated by the sum of the HL register and accumulator A to the accumulator, Its contents are stored in the transmission buffer TXB of the serial interface unit. Next, the contents of the send byte counter are incremented. However,
Then, when TXCNT becomes 9 or more, clear it to 0. Next, the contents of the previously saved registers are restored, interrupts are enabled, and this routine returns to the original routine.

The data stored in the transmission buffer TXB is automatically converted into serial data (separately from software processing) and transmitted to the high voltage power supply unit 200.

The transmission buffer and reception buffer in the copy process control unit 100 are as shown in FIG. 6b.
synchronization character TXSYNC present in the transmit buffer,
Trigger data TRIG, bias data BIAS, and each target value data SMC.

STC, SDC, SCC, SBV and SQV are transmitted to high voltage power supply unit 200. In addition, the sampling data MCD, TCD, transmitted by the high voltage power supply unit 200,
DCD, CCD, BVD.

QVD, BTD, DRD and abnormal flag EMG are 6th b
Stored in the receive buffer shown in the figure.

Copy process control unit 100 and high voltage power supply unit 2
00, data transmission and reception are performed alternately, but the first data transmission is performed by the copying process control unit 100 in the initial setting (Gl in FIG. 8a). Once data transmission is initiated, the copy process control unit and high voltage power supply unit repeat data transmission and reception by executing their respective receive interrupt service routines.

Note that the data in the buffer shown in FIG. 6a is stored in the battery B connected to the power line of the microcomputer ICI.
The data in the buffer shown in FIG. 6b is held by an unillustrated battery connected to the power supply line of the copying process control unit 100.

■Effects As described above, according to the present invention, in an electrostatic recording device,
The high-voltage power supply for energizing each charger is individually energized, the current actually flowing between each charger and the photosensitive drum 11 is detected, and the control target value of the high-voltage power supply that supplies high voltage to each charger is updated. A micro-sequence for controlling is set at the beginning of the recording process, and during this micro-sequence, update control of the control target value of the high-voltage power supply that energizes each charger is performed.
After the minute sequence ends, this control target value is held. Thereafter, each high-voltage power source is simultaneously energized to continue the recording process. According to this, for example, since the drum current caused only by the main corona discharge is directly detected and controlled, the drum currents l, ff, and currents are controlled to be constant, and background smearing due to a malfunction of the main charger does not occur. Further, since the other chargers are similarly controlled by the drum IX current, there will be no occurrence of white spots or insufficient drum cleaning due to defects in the chargers.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing components near a photoreceptor drum 11 of a copying machine embodying the present invention in one embodiment and connections between them and an electric circuit. FIG. 2a is a front view showing the internal configuration of one type of copying machine embodying the present invention. FIG. 2b is a plan view showing the appearance of the operation board of the copying machine shown in FIG. 2a. FIG. 3 is a block diagram showing the electrical circuit configuration of the high voltage power supply unit 200 of FIG. 1. FIG. 4 is a block diagram showing the electrical circuit configuration of the copying process control unit 100 of FIG. 1 and its peripheral circuits. 5a and 5b are waveform diagrams showing an example of the timing of each signal in FIG. 3, and FIG. 5c is a timing chart showing an outline of the operation timing of the microcomputer ICI in FIG. 3. FIG. 6a is a memory map showing the structure of a part of the internal memory of the microcomputer IC1 of FIG. FIG. 6b is a memory map showing the configuration of a portion of the internal memory of the copying process control unit 100 of FIG. Figure 6C shows the registers TRIG and EMG shown in Figure 6a.
This is a memory map showing the allocation of each bit of . 7a, 7b, 7c, 7d, 7e, and 7f are flowcharts showing the operation of the microcomputer ICI of FIG. 3. Figure 8a, Figure 8b, Figure 8C, Figure 8d, Figure 8e,
8f and 8g are flowcharts showing the operation of the copying process control unit 100 of FIG. 4. FIG. 1: Photosensitive drum 2: Main charger 3: Developing sleeve 4: Transfer charger 5: Separation charger 6: Pre-transfer static elimination lamp 7: Pre-cleaning charger 8: Electric static elimination lamp 9: Thermistor 100: Copying process control unit 200: High voltage power supply unit 300: Operation board Tl, T2. T3. T4. T5. Ding 6: Trance 241
~246: Driver circuits 251~256: Conversion circuit (high voltage power supply) IC and microcomputer (control means, analog/digital conversion means) IC2, I
C3: Timer DIPSlil: 6a for mode switch, 6b for mode switch: 10 for zoom key: Numeric keypad R3: Resistor (current detection means) D4: Magnification display

Claims (2)

[Claims] (1) In a high-voltage power supply device that sets the output voltages of a plurality of high-voltage power supplies that supply high-voltage voltages to a plurality of chargers used for image formation on a charge carrier in an electrostatic recording device according to a control target value: a current detection means connected between the charge carrier and a predetermined power supply line; and a minute sequence in which the energization times of the high-voltage power supplies that energize each charger do not overlap are set at the beginning of the recording process,
Control that energizes each high-voltage power source in the minute sequence, updates the control target value of each high-voltage power source according to the output of the current detection means of the minute sequence, and holds the control target value after the minute sequence ends. A high-voltage power supply device for an electrostatic recording device, comprising: means; (2) Each high voltage power supply is a pulse width modulated digitally controlled switching power supply, the current detection means includes analog/digital conversion means, and the control means corresponds to the digital signal from the current detection means during a minute sequence. A high-voltage power supply device for an electrostatic recording apparatus according to claim 1, wherein the output pulse width of the digitally controlled switching power supply is set and the set value is held after the minute sequence ends.