JPS62275287A - Multiwindow display unit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] 3. Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a graphic display device, and particularly a graphic display device suitable for multi-window display! Regarding.

[Conventional technology]

In conventional graphic display devices, especially color graphic display devices, before the contents of the frame memory are converted from DA to DA, the contents of the frame memory must be destroyed (changed in color tone or gradation, or changed in intermediate brightness). It has a look-up table to arbitrarily set things like emphasis, isoluminance line display, digital gamma correction, etc.However, in recent years, color graphics displays have begun to display two or more types of images on one screen. A multi-window display method is attracting attention, but if there is only one lookup table, it cannot be rewritten quickly.

[Melting point that the invention seeks to solve]

In order to solve the above-mentioned problems of the prior art, the present applicant has previously proposed a multi-window, that is, multiple windows on one CR7 screen, as ``Color Matsubuto Video D'A Converter'' in No. 60-201544. When displaying multiple display areas at the same time, an application was submitted for a configuration in which each window has its own look-up table, but no consideration was given to how to determine priority when windows overlap.

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and provide a graphic display device in which each window has an independent look-up table and can display images according to priority order.

[Means for solving problems]

The purpose of the above is to configure a window selection circuit that stores the window position and window priority, and outputs a signal to select one of multiple look/annogo tables using that information as pixels are displayed. This can be achieved by doing.

[Effect]

The window selection circuit determines whether or not the current pixel position is within the window for each i[fIi pixel, for all windows, as the raster scan is performed. Next, if there are multiple (two or more) windows, the number of the window with the highest priority is output according to the stored priority, and if there is only one window, the window number is output. The output window number selects the corresponding lookup table of the lookup tables for each window. This allows an independent lookup table to be selected for each window.

〔Example〕

A first embodiment of the present invention will be described below with reference to FIGS. 1 to 4.

FIG. 1 shows the configuration of a multi-window display device according to the present invention. In the figure, 100 is a processor, 200 is a window selection circuit, 300 is a frame memory, and 410 is a look-up table corresponding to window number 0. , 420 is a look up table corresponding to window number 1, 500 is a multiplexer, 600 is a digital φ analog converter, and 700 is a CRT monitor. In this embodiment, the number of windows is assumed to be two, but the number of look-up tables 410 and 420 may be increased.

It is also possible to display many windows.

Now, when performing multi-window display, the processor 100 first reads the contents of the look-up table 41o, 420 via the CPU bus 110, which corresponds to the window number by χ. Store. The position and priority of each window are stored in the Saranko window selection circuit 200 via the CPU bus 110. Next, a figure to be displayed is written into the frame memory 300. The frame memory 300 is read out periodically by raster scanning, its output is commonly given to look up tables 410 and 420, and the luminance signals 411 and 421 read out from both are sent to the multiplexer 50.
Assigned to 0. The multiplexer 500 receives the window selection signal 21 which is also output from the window selection circuit 200.
0 selects one of the signal lines 411 and 421 and applies it to the signal line 510. Selected luminance signal 5
10 is applied to a digital-to-analog converter 600, and its output, an analog luminance signal 610, is applied to a CRT monitor 7.
00.

FIG. 2 shows the details of the window selection circuit 200 in FIG. 1. Reference numeral 220 is a raster scan address generation circuit, and signal lines 221 and 222K each indicate the X and Y address of the next pixel to be displayed. Sent out.

231 to 234 are registers for storing the position of window number 0. For example, in order to store window 0 defined by point P and point Q as shown in FIG. The X coordinate of point Q, the X coordinate of point P in 233, and the X coordinate of point Q in 234 are stored using data from the CPU bus 110. Similarly, the positions of the window number 10 point R2 point S are stored in 241 to 244 based on the data of the CPU bus 110. Window storage register 231~
234, 241-244 outputs 235-238, 2
45 to 248 and outputs 221 and 222 from the scan address generation circuit 220 are both comparators 251 to 258.
has been granted.

The comparators 251-258 logically set their output signals 281-288 to 11' only when the conditions indicated by the equal sign in the figure are satisfied. That is, the signal line 281 becomes logic 11' when the display pixel position X is on the right side of the main frame of window 0, and the signal line 282 becomes logic 11' when the display pixel position X is on the left side of the cloth frame of the window. Therefore, the signal line 265 obtained by logically multiplying the signal lines 281 and 282 by the AND gate 261 becomes logical ``I'' when the display pixel X is within the frame of window 0. Similarly, signal line 26
6 is logic 1 when display pixel Y is within the frame of window 0
1', and the signal lines 265 and 266 are connected to the AND gate 27.
The signal line 273 that is ANDed with 1 is the display pixel (x, y)
is a signal that becomes logic 11' when is within window 0. Similarly, signal line 274 is a signal that becomes logic 11' when display pixel (X, Y) is within window 1. Signal lines 273 and 274 are provided to a priority storage circuit 290.

The priority storage circuit 290 is configured as a memory in this embodiment, and its contents are stored through the CPJ bus 110. Also, signal lines 273 and 274 should be provided as address lines. Data read from priority storage circuit 290 is applied to signal line 210 and sent to multiplexer 500 as shown in FIG. Signal fj[21
If 0 is 10', the output of lookup table O is 1
1', the output of lookup table 1 is used as signal IQ
510.

In such a configuration, when performing multi-window display as shown in FIG.

FIG. 4 shows how a look up table is selected in C. As mentioned above, the obscene line 273 in FIG.
So it becomes %11. Further, the signal line 274 is connected to the display pixels (X, Y
) is within the window 1, the signal becomes logic 111, and becomes 11' in regions B and C. Signal line 273, 2
74 is a signal serving as an address of the priority storage circuit, and indicates addresses 2, 6, and 1 in areas A, B, and C, respectively. Priority list.

Data indicating a window number is stored in advance in the storage circuit 290 from the processor 100 via the CPU bus 11. When displaying the multi-window shown in FIG. 3, data as shown in the priority storage circuit 290 in FIG. 2 is stored. That is, when displaying area A, address 2 is 0 to display window 0, when displaying area B, address 3 is 1 to display window 1, and when displaying territory VCC, address 3 is 1 to display window 1. At address 1, a value 1 for displaying window 1 is stored, and this value is sent to the erase line 210. Here, in order to give window O a higher priority than window 1 in area B, the content at address 3 should be set to 0.

Since the signal 1210 is applied to the multiplexer 500, the lookup table O
, +, 1 are selected, and it is possible to provide a multi-window compatible lookup double.

This embodiment has been explained using a 2G window display as an example, but in order to display even more windows, for example, 1 windows, 1 look-up tables, 1:1 multiplexers, and rL windows are required. It is easy to imagine that this can be realized by providing a window position storage means, a priority storage circuit for 2rl and 2rl pits.

Next, a description will be given using FIG. 5, which is a second example of the sky view.

The difference in FIG. 5 from the first embodiment shown in FIG. 1 is that there is no multiplexer indicated by 500 in FIG.
The difference is that it consists of two lookup tables 400. However, the capacity of the look-up table 400 has been expanded to have a look-up table capacity corresponding to the number of windows, and in this example, look-up table 410 stores look-up table 0 and look-up table 1 stores look-up table 1. Consists of 420. Further, the window selection signal 210 output from the window selection circuit 200 is applied to the lookup table 400, and becomes the most significant pit of the address of the lookup table.

That is, when window selection signal 210 is logic 10', look up table 0 is selected, and when window selection signal 210 is logic %11, look up table 1 is selected. In this manner, in the same manner as in the first embodiment, areas A, B, and C in FIG.
lookup tables 0 and 1.1 are selected respectively in
It will be possible to provide lookup tables that support multi-windows.

〔Effect of the invention〕

As explained above, according to the present invention, when changing the color of the target window, K only needs to rewrite the contents of the corresponding lookup table, and this allows K to change the color of another window that used the same color. The color will also change and it will no longer be 5.

In this way, each window can have an independent look-up table, which has the effect of providing an easy-to-use graphic processing device.

[Brief explanation of drawings]

FIG. 1 is a diagram showing a first embodiment of the multi-window display device of the present invention, FIG. 2 is a diagram showing a window selection circuit, FIG. 3 is an example of multi-window display, and FIG. 4 is a signal line for the window area. FIG. 5 is a diagram showing the second embodiment of the multi-window display device of the present invention. 200... Window selection circuit, 220... Scan address generation circuit, 231-23
4,241-244...Window position storage means, 2
90...Priority storage circuit, 410.420...Lookup table, 500...
...Multiplexer. ′＼ ,′,...,ψ 14′− Representative Patent Attorney Katsutoshi Ogawa ゛′蝬 1 Prisoner No. 2 [8 ￥ 3 Figure 40

Claims (1)

[Claims] 1. A frame memory for storing color codes, a look-up table for storing brightness corresponding to the color code read from the frame memory, and a look-up table for storing brightness values corresponding to the color codes read from the frame memory; In a multi-window display device that is equipped with a raster scan type display means for displaying a display on a screen with the read brightness, and that performs multi-window display by defining a plurality of window areas within the area of the frame memory, the above-mentioned look is provided.・Window selection in which the up table is set as a look up table group corresponding to each of the window areas, and one corresponding table of the look up table group is selected as pixels are displayed on the display means. A multi-window display device characterized by being provided with a circuit. 2. Means for the window selection circuit to store the positions of each of the plurality of windows, means for comparing the scan address of the display means with the window position stored in the storage means, and an output from the comparison means. 2. The multi-window display device according to claim 1, further comprising means for outputting a window selection signal indicating the highest display priority among the plurality of windows. 3. The multi-window display device according to claim 2, wherein the output means is a storage means whose address is a signal based on the output of the comparison means.