JPS622738A - Decoder for information service - Google Patents

Abstract

PURPOSE:To obtain a release means for a control data part at the decoder side by inserting a variable length code to a sync code, and utilizing a gate signal having the code length covering up to the sync code including the variable length code to detect a sync code following the first detected sync code. CONSTITUTION:Both a sync code SC and a coincidence signal are supplied to a sync pattern comparison part 62 with either timing of a period during which a gate signal is kept at 'H'. Thus it is possible to detect the sync code SC following a dummy code DC even if the code DC has the variable length. Then the code SC put into a control data part CD can be surely detected even though the part CD has a variable length constitution. The control data CDA may possibly contain the same pattern as the code SC. However the code DC supplied in a period during which the comparison of patterns is carried out contains no said pattern. In such a way, the detecting accuracy of the code SC is improved.

Description

[Detailed description of the invention] Stones that describe the invention in the following order:

A. Field of industrial application B. Overview of the invention C. Prior art D. Problem to be solved by the invention E. Means for solving the problem F. Effect G. Example G, general explanation of information service system G2. Information service system Systematic diagram showing the basic world structure (Edict 1 diagram) The format of the transmission signal inserted into the G3 broadcast signal
(Fig. 2) Formant of service data BSD before shuffling (Fig. 3) Format 7 showing the relationship between G5 service data part SD and the following service data SDA (Fig. 4) Formant of G6 baud rate part BR Explanation (Figure 5) Explanation of G control data section CD (Figure 6) Explanation of CB zinc code SC (Figure 7) Explanation of G9 control data CDA (Figure 8) Explanation of GIG addressing (Figure 9) G11 Atranging data AD format (Figure 9) G122 Reason for using type B key code Grqn
Reason for setting multiple addressing modes System diagram of G14 receiver 30 (Figure 11) Circuit explanation of GIS decoder 50 (Figure 12) CI6 Service data D
Decoding process of A Decoding process in Czi addressing mode G11l Explanation of the sync code detection unit 60 and judgment circuit unit 59 (FIG. 13) Effect of the invention A Industrial application field This invention aims to conceal information data and The present invention relates to a new information service system in which information services can be provided for a fee, and in particular to a decoder having means for detecting a sync code in a control data section whose data length is set to be variable.

B. Summary of the Invention The present invention relates to a decoder for an information service system in which information data is concealed and information services are charged.

This information service system receives the service data and key code sent from the database station using a decoder installed on the subscriber side, and the key code sent after decoding these data matches the key code on the receiving side. This is a system that allows you to receive specific information services sent from database stations only if you do so.

In the present invention, in such an information service system, when detecting a sync code for decoding a control data section transmitted in a shuffled manner, the data length following this sync code is constant; Insert a code with variable length between and the next sync code, and in the decoder example, after detecting the first sync code, the following sync code has a code length up to the sync code including the variable length code above. Detection is performed using a gate signal.

This prevents the data contents from being easily decoded by non-subscribers, and also allows the decoder to easily decode the control data portion.

C. PRIOR TECHNOLOGY As an information service system that allows specific information to be provided only to specific subscribers, systems that utilize a dedicated line have been known for some time.

Specifically, specific information transmitted from the database station using a dedicated line is received by a decoder installed on the subscriber side, and the information provided by the station side can be received. There is.

D. Problems to be Solved by the Invention By the way, the fWN service system described above has limitations because it becomes difficult to secure dedicated lines when the number of subscribers increases dramatically.

In addition, if the information provided by the station requires a large amount of money to collect the information and provide information transmission equipment, such as stock information or commodity trading information in multiple markets, non-subscribers may It is necessary to devise a system in which the information cannot be easily decoded. In conventional information service systems, information can be easily obtained by simply installing a decoder on the subscriber side, so even non-subscribers can easily obtain the information.

In such a case, it is necessary to take advanced measures to prevent wiretapping, but conventionally such concealment measures have not been adopted.

Furthermore, conventionally, once a decoder is purchased, information can be provided at all times as long as the user owns the decoder. However, as mentioned above, if the cost of collecting information and the cost of operating the station are enormous, it is preferable to provide the information for a fee.

Therefore, an information service system that targets a large number of subscribers, maintains the confidentiality of information, and charges a fee has not yet been developed.

The present invention takes these points into consideration, and provides a means for decoding the control data section on the decoder side, in particular, to address the problems encountered when configuring an information service system that can realize information confidentiality and paid information services. .

E. Means for Solving the Problems In order to solve the above-mentioned problems, the present invention employs the following means.

That is, in this invention, the service data and key code sent from the database station are received by a decoder provided on the subscriber side, and the key code sent after decoding these data matches the key code on the receiving side. Only in this case, the information service data section that is designed to receive the specific information service sent from the database station is targeted.

A key code for decoding this control data part is inserted into the control data part (which is also shuffled to maintain confidentiality), which functions as information for decoding the service data part, and this key The code is gated with a gate signal having a predetermined pulse width.

F Effect In this configuration, a gate signal having a code length up to the sync code including a variable length code is used as the zinc code detection pulse.

If such a detection pulse is used, even if the control data section is a variable length code, the detection pulse has a pulse width that includes the next sync code, so the sync code inserted in the control data section can be read. Can be detected reliably.

Since the sync code is information for decoding the control data section, the control data section can be accurately deshuffled by detecting this sync code.

As a result, for non-subscribers, the sync code cannot be detected by simple decoding because the control data section has a variable length structure. Along with this, the control data section cannot be deshuffled by simple decoding.

For this reason, the confidentiality of the transmitted data is strong, and only specific subscribers can receive specific information services transmitted from the station side, making it possible to easily achieve the above-mentioned purpose.

G. Embodiment FIG. 1 is a schematic configuration diagram showing an example of an information service system that is the premise of this invention.
The outline of the information service system according to the present invention will be explained below.

Overview of the CAT Blue News Service System 1 Party Factional This information service system receives the service data and key code sent from the database station as described above with a decoder installed on the subscriber side, and converts these data into A system in which a specific information service sent from a database station can be received only when the decoded and transmitted key code matches the receiving side's key code.

The first feature is that the transmitted data is shuffled to prevent eavesdropping.

This is to make it difficult for non-subscribers to obtain information and to provide specific information only to specified subscribers, as described above.

Second, information services are charged.

In other words, the system is such that only those who have paid the fee can receive information services.

To this end, in this system, a reception contract period, for example, a monthly reception contract period, is determined, and information can be continuously provided by updating the contract period.

In order to ensure that the payment or non-payment of the gross amount for each reception contract period is checked on the station side, and the information service is automatically stopped if the gross amount is not paid, the addressing on the decoder side, which will be described later, is set to data. It is carried out by means similar to transmission.

Therefore, after addressing, a key code is transmitted at the same time as the data transmission described above, and only when the transmitted key code matches the key code stored in the receiver's decoder (the key code stored by addressing), information is sent. You can receive the offer.

System diagram showing the basic schematic configuration of the G2 information service system Now, FIG. 1 is a configuration diagram showing an example of a new information service system 10 that is the premise of the present invention.

10A is a database station, IOB is a ground relay station, 10C
is a receiving station (subscribing station), and the transmission signal formed by the database station 10A is inserted into a predetermined horizontal line or several horizontal lines in the vertical blanking period of the broadcast signal, and the broadcast signal into which the transmission signal is inserted is (the formant is shown in FIG. 2) is transmitted toward the broadcasting satellite 22, and from the broadcasting satellite 22 this broadcasting signal is transmitted toward the terrestrial relay station 10B.

The terrestrial relay station 10B has a BS antenna 24, and the broadcast signal in the SHF band received by this antenna is supplied to the transmitter 26 via the BS converter 25, and the broadcast signal is transmitted in the UHF or VHF band for retransmission. While being converted into a broadcast signal, this is fed to the antenna 27 and transmitted to a plurality of receiving stations 1.
Transmitted towards 0c.

The broadcast signal received by the antenna 29 of the receiving station 10C is decoded by the transmission signal inserted into the broadcast signal in the receiver 30, and the service data obtained as a result of the decoding is supplied to the personal computer 31, and the necessary information is Once selected, it is fed to the monitor 32 to monitor its content.

Assuming that a maximum of 8 horizontal lines (8 channels) are used as a transmission signal to be inserted into a broadcast signal, a plurality of databases 11A to 11A to IIH are installed in the database station 10A. be able to.

Each of the databases IIA to IIH includes large host computers 12A to 12H and a pilling computer 13A corresponding to each database.
~13H will be installed. The host computer collects stock information, product transaction information, etc. for each region and provides service information data (hereinafter referred to as service data) to customers.
is formed.

The pilling computer manages the reception contract status of each subscriber subscribed to each database, and forms pilling data, ie, addressing data, corresponding to the reception contract and its cancellation for each reception contract period.

Service data and pilling data are supplied to corresponding processors (front end processors, FEPs) 14A to 14H using telephone lines or dedicated lines. One processor can process one channel of data, where one data channel corresponds to one horizontal line input into the video signal.

Each of the processors 14A to 14H has eight data input ports, and can multiplex up to eight types of service levels for one channel. Therefore,
As shown in FIG. 1, the service data transmitted from the first database IIA is transmitted to all processors 14A-1.
It is designed so that it can be entered into the 4H boat. 2nd ~
The same applies to the service data from the eighth database IIB to 111. Therefore, the eight processors 14A
- 148"i: 'Can handle up to 64 i class 5-vis data.

Each of the processors 14A to 14H is connected to a host computer 15 that generates control data, which will be described later, and a shuffled transmission signal is formed based on this data.

The transmission signal is superimposed on the video signal supplied to the terminal 18 in the data insertion circuit 17 . Which horizontal line in the vertical blanking period the transmission signal is inserted into is determined by a control signal (not shown) supplied thereto.

The broadcast signal into which the transmission signal has been inserted is sent to the transmitter 20 by S
After being converted into an HF band signal, it is transmitted to a broadcasting satellite 22 by a BS antenna 21.

Format of transmission signal inserted into G3 broadcast signal Now, Figure 2 shows an example of the format (for one horizontal line) of the transmission signal superimposed on the broadcast signal. Data section SD (21 bytes in this example) ■, Check bit section CB for this service data section SD (10 bytes) ■, ii? of service data section SD? A synchronous data section consisting of a control data section CD (1 byte) inserted in the i section, a bit sync (2 bytes) BIS and a byte sync BYS (1 byte) inserted at the front of the control data section CD. (2) The channel address field CA (1 byte) is inserted between the synchronization data field and the control data field CD.

The synchronous data section is clock data inserted to decode the transmission signal.

The channel address section CA is data indicating the type of channel used.

The control data portion CD is data indicating shuffling block data, shuffling map data, etc. for the shuffled service data portion SD, etc., and this control data portion CD is also transmitted in a shuffled state.

The service data section SD is data provided for customer services such as securities information.

G4 Format of service data section SD before shuffling FIG. 3 shows the format of service data section SD before shuffling.

In this example, the service data section SD has 62 fields (
62 lines) as one data block, and one data block further consists of eight service blocks (SB,
~5Ba).

The data inserted into one horizontal line in one data block is 31 bytes, and one service block consists of 31 bits.

The data inserted into the first field before shuffling is header data gB HD, and the second field and subsequent fields are service data SDA.

The Dadek part HD is used as decoding information (service data multiplexing information, etc.) for the service data SDA inserted below the N2 field.

FIG. 4 is a format showing the relationship between the service data section SD and the following service data SDA.

That is, in the first horizontal line corresponding to the first field, a seven-head data section HD of a formant as shown in the figure is provided for each service block. The header data section HD includes: (1) Service level section 5L (3 bits) This indicates data indicating which channel is used to insert service data.

(2) Baud rate section BR (2 bits) This is because the configuration of the service block during transmission differs depending on the baud rate. The details will be described later.

■, Sync/Async (SYNC/ASYNC) section 5
AS (1 bit) This is data indicating whether data is transmitted in synchronous mode or asynchronous mode.

■Key code section KC (4 bits) A key code inserted for each service of the month to ensure that only paying subscribers can receive the information service. It is compared with the key code sent to the decoder, and if they match, the data service is executed.

(2) Line data end portion LDE (6 bits) Since the length of the blocks constituting one service block is different for each service block, this data indicates the number of lines constituting the block.

In the case shown in FIG. 4, the service block ends at the 58th line, so in this case, data indicating that the 58th line is the last line is inserted as the line data end part LDE. .

■Bit data end part BDE (5 pinto) Data indicating the number of bits in the last line of the service block. In the example shown in FIG. 4, the 10th bit is the last bit, so this last bit is It is expressed by the data end part BDE.

is set to a formant like .

The header data portion HD of such a formant is applied to the first horizontal line of each service block even after shuffling.

G6 Description of baud rate section BR The structure of the service block during transmission differs depending on the baud rate section BR.

For example, when the transmission capacity is up to 9600 baud,
When the transmission rate is set to 9600 baud, the first to eighth service blocks SB, as shown in FIG.
Data composed of SB is only one channel data, and when composed at 4800 baud, data of two channels can be transmitted as shown in FIG. Examples of other baud rates are shown in C and D of the same figure. However, since 2400 baud and 1200 baud can be selected, it is easy to understand that combinations other than those shown in the example may also be adopted.

The header data section HD, service data SDA, and check bit section CB described above are shuffled within each line and also between 62 lines.

However, even after shuffling, the service data section SD inserted into the first horizontal line of one profile
Processing in which the above-described header data section HD is located is executed by the processors 14A to 14H.

G. Description of Control Data Section CD FIGS. 6 to 8 are used to explain the contents of the control data section CD.

The control data section CD is also shuffled except for a part of the data, and an example of the structure of the control data section CDc) corresponding to one block after deshuffling is shown in FIG.

The control data section CD has a variable length data structure, which is as follows: 1.Sync code SC (1 byte) 2.Control data CDA (fixed length of 48 bytes) 2.Dummy code DC (4 to 11 bytes) variable length code).

The sync code SC is used as data information for deshuffling the shuffled control data portion CD and as data information indicating a division of the control data portion CD. When using 64 types of sync codes as the sync code SC, control data scD
You can select from 64 different shuffling patterns.

G8 Sync Code 5Cc) Description Zinc code SC has not been subjected to shuffling processing. The sync code SC is considered to be a sync code SC only after the intervening code is inserted three times in succession.

That is, as shown in FIG. 7, this sync code SC is inserted from the first line to the third line.

The 48 bytes of data following the sync code SC becomes control data CDA.

The control data CDA includes shuffling block information of the service data section SD transmitted to the decoder 50 (see FIG. 12) and its shuffling map information.

G9 Description of Control Data CDA FIG. 8 shows an example of the formant (before shuffling) of control data CDA.

The control data CDA is composed of 4 bytes as a basic unit, and the first 2 bytes are shuffling block data S.
In B, the last two bytes are shuffling map data SM.

First, shuffling block data SB is formed of 2 bits of the first byte and 4 bits of the second byte, a total of 6 bits. Check code CC inserted into each byte
is for data checking of shuffling block data SB inserted into each byte.

Shuffling map data SM is formed by a total of 6 bits, 2 bits in the third byte and 4 bits in the fourth byte. The check code CC inserted into each byte is for checking the shuffling map data SM inserted into each byte.

The same code as this control data CDA is repeated 5 times (
A total of 20 bytes) are inserted, so the format before shuffling is as shown in Figure @6.

The reason why the same data is used five times in this way is to avoid malfunctions caused by noise mixed in during transmission. It is used as control data CDA.

The control data section CD has a fixed length of 48 bytes, and the data following the above-mentioned control data CDA is used as optional data. Therefore, data slots after 20 bytes are not used as control data.

The dummy code DC, which is placed at the rear of the control data CDA, has a variable length, so that the entire code length of the control data BCD has a variable length configuration. In this example, the control data section CD is varied over 55 to 62 fields, so the dummy code DC is 4.
The code length is between 11 and 11 fields. As a result, one block of the control data 'BCD is composed of 55 to 62 fields.

The dummy code DC uses a code pattern that is not present in the sync code SC. This is the control data part C
This is to accurately separate the sync code SC from D.

If the control data 8CD is configured to have a variable length, it becomes difficult to detect the control data section CD inserted for one block, which complicates the data deshuffling process by non-subscribers and reduces the confidentiality of information. strengthened.

In addition, the control data section CD includes a sync code SC that has not been shuffled, but even if the sync code SC is not shuffled, the code length of the control data section CD itself is variable length. , control data BCD cannot be easily decoded.

However, the decoder installed by the subscriber has a map of the deshuffling pattern that detects the sync code SC and deshuffles the control data section CD. Ring processing can be performed accurately.

In this case, since the data length (48 bytes) following the sync code SC is constant, it is relatively easy to detect the sync code SC on the decoder side.

As mentioned above, the control data section CD is shuffled according to the sync code 5Ccr) type,
By decoding the shuffling map data SM included in the shuffled control data CDA, the service data portion SD is deshuffled.

Then, the service data section SD and control data section CD shuffled in this way are arranged in units of 31 bytes in one horizontal line! In particular, the formant of the transmission signal shown in FIG. 2 is constructed. in this case,
Synchronous data for each horizontal line (see Figure 2)
is not shuffled.

Description of Gl(l Addressing) Addressing of the decoder 50 provided in the receiver 30 is performed as a preliminary step to transmitting the transmission signal shown in FIG. 2.

Addressing is also performed using broadcast signals as well as transmission signals. In this case, among the transmission signals shown in FIG. 2, one in which addressing data ADA is inserted instead of service data SDA is used as the transmission signal.

First, an overview of addressing will be explained.

The ri number of decoders provided in the plurality of receiving stations 10c are provided with non-volatile memories for storing key codes, and the key codes transmitted during addressing are stored in these memories. Consecutive addresses are attached to the decoder, and when an address that specifies the decoder (an address map may be used) is transmitted, it enters a key code waiting state, and the binary code of the address map changes to “1° The writing state of the key code is automatically controlled depending on whether the value is "0" or "0".

For example, if the binary code is "1" to enable writing, when the binary code of the address map is "1", the key code is written to the corresponding decoder. Therefore, in this case, when the binary code is "1", it means that the reception contract fee has been paid.

When the binary code is "0", the reception contract fee has not been paid, so in that case, the key code is not stored in the corresponding decoder.

Addressing is performed for each reception contract period, and the addressing period is performed using a predetermined period before the reception contract period (which may extend into the next month's reception contract period).

As shown in Figure 2, the current month's key code KC is inserted into the transmission signal, so the information service is only received when this key code KC matches the key code stored in the decoder. be able to.

Therefore, the format shown in FIG. 9 is adopted for the addressing data, D.

The formant addressing data AD of the Gl+addressing data D is also constituted of 62 fields as one block, and is subjected to shuffling processing to conceal the information.

The format shown in the ninth row is for one horizontal line before shuffling.

Addressing data AD: It is structured as follows.

■Key code KC (1 byte) Two types of key codes are sent. The key code consists of 4 bits, one is the key code for the current month, and the remaining one is the key code for the next month.

When the decoder receives the service data SDA, if either of these two key codes is stored in memory, the decoder enters the service state.

■, Address data AD, , AD2 (3 hides each)
Address data for identifying the decoder, l&
Although it differs depending on the mode code during addressing, the address data AD.

With data from AD2 to AD2, decoder addresses can be specified in units of 100 units.

However, this address data cannot specify the addresses of individual decoders.

(2) Addresses are specified for 104 decoders based on the address of address map data AM (13 Hyde) address data A D+ (A D?).

The first bit of the address map is address data AD
The address of each decoder is specified in sequence so that the address is for the same decoder as I (ADD), and the next 1 bit is the address for the next decoder.

Address data AD, AD2 and address map data AM have different addressing specifications depending on the mode code MD described below.

(2) Mode code MD (2 bits) This is a code for specifying the mode during addressing.

Since it is a 2-bit configuration, the following four types of addressing modes can be selected.

(al, Mode 0 Address data AD, This is a batch addressing mode in which data services are not provided to all decoders having addresses specified by and ADD.

In this case, all bits of the address data AM are set to "0", and the transmitted key code KC is not recorded in the memory of the decoder.

(bl, Mode 1 This is a mode in which data services are provided to the decoder specified by the address of address data AD, and the decoder specified by the address of address data AD2 (therefore, only two decoders are specified). .

(C1, Mode 2 For each of the 104 decoders with address data AD, , AC3 as the base point of the address, "1" of the address map AM following this address data AD, , AC3
”, “0” performs addressing.

In this case, address data AD, AC3 are also the same address data.

When address data AD specifies a decoder in the 100s, the first bit of address map AM is 100.
Specify the th decoder and the following bintka (101
The th decoder is defined as t.

When that bit is '1°, the above key code (2ft
IQ) is memorized.

On the other hand, when the focus is "0", no key code is stored.

[d) Mode 3 This is the opposite of mode O, and addressing is performed at once for all decoders specified by address data AD, AC3.

Therefore, key codes will be stored in those decoders. In this case, address map data AM is set to all "1"s.

(2) Service level code SL (6 bits) This is a code indicating which post computer's data was inserted into which channel for transmission. The upper 3 bits are assigned to the data channel, and the lower 3 bits are assigned to the service level.

In the above example, eight host computers and eight horizontal lines (eight channels) are used for transmission, so a total of 64 types of service levels can be specified.

01224 Reason for using the XaM key code The reason why two types of key codes KC are sent simultaneously in the above-mentioned addressing formant is based on the following reasons.

Addressing is performed in units of reception contract periods before the contract period expires. For example, if the contract period is determined on a monthly basis, next month's addressing will be executed in the current month. The key code (in the transmission signal) sent during that contract period uses a key code with a different pattern from the previous key code, so if only the next month's key code (one type) is sent during addressing,
The following inconvenient situations occur.

For example, as shown in Figure 10, the current month is January,
It is assumed that KC, is used as the key code KC for January, and KC2 is used as the key code KC for February.

In this case, addressing using the key code KC2 is executed during period T in the latter half of January. If a specific decoder has received subscription fees for both January and February, that specific decoder uses key code KC when addressing in mode 2.

will be stored in a predetermined memory.

As a result of this memory operation, the key code KC2 for January is stored in this memory instead of the key code KC.

Therefore, since the key code will be changed to KC2 from the second half of January, there will be inconveniences such as not being able to receive data service even though the receiving contract fee has been paid during the second half of the period after addressing. occurs.

On the other hand, as mentioned above, when addressing is performed by sending out the key codes KC+ and KCt for the current month and the next month at the same time, the key codes KC, and KC are both stored in memory. Even after addressing, you can receive the data service for that month, and the above-mentioned inconvenience is solved.

CI+3 Reason for setting multiple addressing modes The reason why multiple addressing modes can be selected is as follows.
Based on the following reasons.

For example, if the receiving station 10A, which has all the decoders for addresses in the 0 to 1000 range, has not yet paid the reception contract fee, mode 2 is used (rather than the case where addressing is carried out in a fixed manner), the receiving station 10A has decoders for all addresses in the 0 to 1000 range. Addressing can significantly reduce the time required for addressing.

For the same reason, when the reception contract fee for a certain receiving station 10A has been paid, if atrea and sing in mode 3 are executed, addressing will be done in this case as well, and the addressing time will be greatly reduced. This is because it can be shortened.

However, when the reception contract fee payment varies depending on the address, by selecting mode 2, large-scale addressing can be executed according to the contract status of each receiving station 10A.

In addition, when addressing a specific receiving station among the plurality of receiving stations 10A, it is necessary to perform addressing in mode 2, but if mode 1 can be selected as described above, addressing can be performed for a specific receiving station. Only receiving stations! 1], the addressing time can be reduced compared to when mode 2 is selected.

For this reason, by selecting the addressing mode according to the reception contract status, even if there are a large number of subscribers, the addressing time for all subscribers can be shortened.

FIG. 11 shows an example of a receiver 30 installed in the receiving station 10A for receiving a transmission signal having the above format and receiving a specific data service.

C+<System diagram of the receiver 30 The broadcast signal received by the antenna 29 is supplied to a chainer 40 with an all-channel configuration, where it is converted into a television signal in a predetermined frequency band, and this is supplied to a ghost canceller 41 to eliminate ghosts. Cancellation processing is performed to avoid data extraction malfunctions.

The output is supplied to a data separation circuit 42, where the transmission signal inserted into the broadcast signal is extracted and separated. The extracted transmission signal is supplied to a decoder 50 and service data S
Decoding processing such as DA is executed. The service data SDA is converted into a code format that conforms to the standards of the personal computer 31 and is then supplied to the personal computer 31 via the interface 43 .

44 is a control system, which is a controller 45,
It is comprised of a keyboard 46 for giving commands. 4
7 is a power supply device.

Circuit description of GIS decoder 50 FIG. 12 is a system diagram showing an example of the above-mentioned decoder 50, in which the transmission signal separated by the data portion GTT section 42 is subjected to byte sync BYS extraction in the byte sync section 51. .

To detect the bite sync BYS, a gate signal is generated in advance by the gate pulse generating section 52 using the horizontal and vertical synchronizing signals HD, VD and the clock signal CK, and the vicinity of the hide sync BYS section is gated with this gate signal, and then detected.

When the hide sink BYS is detected, the detection signal is input to the gate pulse generator 52, and the channel address CA is set based on the bite sink BYS.

Gate signals are generated for extracting the control data section CD, service data section CD, addressing data, etc.

The channel address data CA extracted by the channel address gate section 54 is sent to the error correction (hamming) section 5.
5, and the error is corrected.

The error-corrected 4-bit channel address data C△ is compared with the 4-bit data of the channel address setting sent from the controller 45 in the channel address comparison section 56, and if they match, the gate pulse generation section 52
sends a match signal to

The gate pulse generator 52 uses this coincidence signal as a reference to gate the insertion timing of channel address data on the same line in the next field. Similarly, gate pulses are output to the data gate 57 and control data gate 58.

The control data section CD extracted by the control data gate 58 is sent to the sync code detection section 60 to detect the sync code SC included in the control data section CD, and 64 types of sync codes SC are extracted. .

Here, when the same sync code SC is detected over three fields, the 0 judgment circuit section 59 uses this as the sync code SC and sends it as a sync detection signal to the judgment circuit section 59. A holding signal for holding the sync code SC is sent to the sync pattern holding unit 70.

Further, a gate signal for detecting the sync code of the next control data section CD is sent to the sync code detection section 59.

This allows the sync code SC to be easily detected. The details will be described later.

When the zinc code SC is detected, the width 1 disconnection circuit unit 59 causes the timing generation unit 72 to write the control data CDA itself following the sync code SC to the RAM 73, and at the same time performs deshuffling depending on the type of the sync code SC. Sends a sync detection signal to start the process.

The deshuffling pattern generating section 75 receives the pattern code (6 bits) from the sync pattern i holding section 70 and generates a deshuffling pattern that becomes the write address of the RAM 73. The start signal is output from the timing generator 72.

When the control data CDA is read from the RAM 73, it is deshuffled.

For this reading, the read counter 74 operates in response to a counter start signal from the timing generating section 72, and at the same time, the address switching section 76 is switched to the read side and a read signal is supplied to the RAM 73.

The read control data CDA is error-corrected in an error correction (hamming) section 80, and further, in response to the holding signal generated by the timing generation section 72, the data block information t[isB is deshuffled in the data block information extraction section 81. The ring↑n information extractor 82 extracts the dishulling map information SM and uses it as a key signal for reproducing the data part.

Service data SDA (
Alternatively, addressing data ADA) is stored in a data buffer 85 and sent to a deshuffling circuit 86, which is controlled by a buffer control section 87.

The buffer control section 87 receives a reference signal indicating the position (field) of the sync code in the control data CDA from the determination circuit section 60 and the data block information section 81.
, DataPro receives the deviation information and sends service data SDA (or addressing data ADA) to 1.
The data is stored in the data buffer 85 in units of blocks and then sent out.

The deshuffling circuit 86 is the deshuffling information section 8
2, the deshuffling pattern information SM is input, and the service data is deshuffled. After that, service data SDA (or addressing data A
DA) is error corrected by an error correction circuit 91.

Note that when a data transmission failure occurs, a data reset signal is sent from the gate pulse Q generation unit 52 to the buffer control unit 87, and the data in one block stored until the data transmission failure occurs is reset. Data is cleared.

Similarly, this data reset signal is also supplied to the control data processing system to clear the data.

Specifically, the above-mentioned data reset signal is supplied to each of the deshuffling pattern generation section 75, the deshuffling information extraction section 81, and the deshuffling information extraction section 82.

On the other hand, the capacity of RAM 1'0 for data storage is selected so that it can store a transmission capacity (9900 baud) larger than the normal transmission rate (9600 baud), so that it can be used in the event of a transmission failure as described above. Also, data can be sent to the subsequent interface 43 without interruption. This processing mode is a so-called catch-up mode.

Decoding process of CI6 service data DA When the addressing mode detection section 100 detects the service mode, the error-corrected service data section SD (
1 Data Pro, ri) 1st line header dark part H
Service level code detection unit 10 to read the information of D.
1. The baud rate detection section 102, the sync/async detection section xo3, the data end detection section 104, and the key code detection section 105 operate to detect each piece of information.

The detected service level code SL is compared with the service level code sent from the controller 45 in a service level comparison 11107, and if they match, a match signal is sent to the buffer control section 108 and the key code comparison section 109.

The detected key code is compared with a predetermined key code stored at the time of addressing in key code comparison section 109, and if they match, a match signal is sent to buffer control section 108.

The buffer control unit 108 performs control to buffer necessary data in the RAM 110 based on the service level control signal, key code matching signal, baud rate information, and data end information, and output it to the interface 43 at a constant rate.

A boat rate signal and a sync/async signal are also sent to the interface 43.

G1. Decoding processing in addressing mode In addressing mode, each line of a data block serves as addressing information.

Therefore, for each line, mode signal MC, service level code SL, key code KC, address data AD
, , AD2, detect address data matsub AM.

Therefore, in addition to the mode code detection section 112, a service level code detection section 121, a key code KC detection section 122, an address data AD detection section 123, an address data AD2 detection section 124, and an address data map AM A detection unit 125 is provided respectively.

Mode code M detected by mode code detection unit 112
C is sent to the address data ID comparison section 113. The address data ID comparison unit 113 compares the sent address data with the ID (address data) unique to each decoder stored in the nonvolatile memory 114. Before this comparison, the mode code is
, , AD2, address data matsu 7', A M This is a code for processing according to the format.

When a match with the output of the decoder ID holding unit 115 is detected, an ID matching signal is sent to the memory control unit 116, and the memory control unit 116 selects the key code (two types) at this time.
is stored in the nonvolatile memory 114. At this time, the address of the non-volatile memory 114 is 6 of the service level code.
This is 2-bit information (3-bit channel address, 3-bit service level).

The address selector 120 selects the service level code SL sent in the addressing mode, and selects the channel address data CA and service level setting value sent from the controller 45 in the service mode.

In the service mode, the key code stored in the set channel address and service level is read out from the non-volatile memory 114 and sent to the key code comparison unit 109.
sent to.

First explanation of Glfl sink detection section 60 and judgment circuit section 59
FIG. 3 is a system diagram showing the relationship between the sync code detection unit 60 and the judgment circuit unit 59. The sync code detection unit 60 is composed of a sync comparison unit 61 and a sync pattern comparison unit 62, and the control data gate unit 58 Each data in the gated control data section CD is transferred to the shift register 65.
After being converted into 8-bit parallel data, it is supplied to the sync comparison section 61, and the pattern of the sync code SC is
A comparison is made to see which of the four types of sync patterns it matches.

If the pattern matches any of the 64 types of patterns, the match signal from the sync comparison section 61 is supplied to the sync pattern comparison section 62. The sync code SC itself is also supplied to the sync pattern comparison unit 62, and a comparison is made to see if the same sync pattern and matching signal have been input three times in a row.

When the same sync pattern is supplied over three fields, the sync pattern comparison section 62 outputs a sync detection signal.

The sync detection signal is one! :I is supplied to the II disconnection section 59.

The determination circuit section 59 is composed of a counter timer, and a vertical synchronization pulse VD is supplied as its clock. The sync detection signal is used as a start signal for the counter timer, and the sync detection signal starts the counting operation.

When the counter timer counts 48 vertical synchronization pulses VD, an "H" gate signal is output. As a result, the final field of the control data CDA of <48 hides following the zinc code SC is detected.

For this reason, the 48-byte fixed-length control data CDA of the control data section CD is "L", and the variable-length dummy code DC and the following 3-byte sync code 300 are "L". A gate signal that becomes "H" is generated by this judgment circuit 59.

The gate signal is supplied as a masking signal to the sync pattern comparison section 62, and the pattern comparison operation is prohibited during the period when the gate signal is "L", and the pattern comparison operation is executed only during the period when the gate signal is "H".

Since the sync code SC and the coincidence signal are supplied to the sync pattern comparator 62 at any timing during the period when the gate signal is high, even if the dummy code DC has a variable length, the dummy code DC The sync code sc following can be detected.

When the sync code detection section 60 and the disconnection circuit section 59 are configured in this way, even if the control data section CD has a variable length configuration, the sync code SC inserted into the control data section CD can be reliably detected. can be detected.

Although the control data CDA may include the same pattern as the sync code SC, the dummy code DC input during the pattern comparison operation does not include any pattern between the sync code SC and the dummy code DC. In combination with the above configuration, it is possible to improve the output performance of the sync code 5cojz.

Note that the holding signal supplied to the sync pattern holding section 70, the sync detection signal supplied to the timing generation section 72, and the reference signal supplied to the bump control section 87 are all output at the same timing as the sync detection signal. be done.

As described in detail of invention H, in this invention, in a new information service system, after detecting the first sync code,
The sync code that follows is detected by a gate signal that has a code length up to the sync code, including a variable length dummy code, so the sync code S
C becomes easier to detect.

However, for non-subscribers, this cannot be easily deciphered because the control data section has a variable length structure, the control data section is shuffled, and other reasons. Therefore, a highly confidential information system can be constructed.

For this reason, as described above, the present invention is extremely suitable for use in paid information service systems that provide information only to specific subscribers.

[Brief explanation of the drawing]

FIG. 1 is a system diagram showing the schematic configuration of the information service system according to the present invention, FIG. 2 is a diagram showing the formant of the transmission signal, FIG. 3 is a diagram showing the former 7) of the service data section, and FIG. is a diagram showing the relationship between the service data section and the header data section HD, FIG. 5 is a diagram showing the relationship between the baud rate and the service block, FIG. 6 is a diagram showing an example of the formant of the control data section, and FIG. is sink code S
FIG. 8 shows the relationship between C and control data CDA.
The figure shows an example of the formant of control data CDA, Fig. 9 shows an example of the formant of addressing data, Fig. 10 is an explanatory diagram for the sync code SC, and Fig. 11 shows an example of the receiver. A system diagram of the main parts showing the
FIG. 12 is a system diagram showing an example of a decoder, and FIG. 13 is a system diagram showing a specific example of a sync code detection section and a discrimination circuit section. 10 is an information service system, IOA is a database station, IOB is a ground relay station, IOC is a receiving station, 12A to 12
15 is a host computer, 13A-138 is a pilling computer, 50 is a decoder, 59 is a judgment circuit section, 6o is a sync code detection section, and 87 is a buffer control section.

Claims (1)

[Claims] The service data and key code sent from the database station are received by a decoder provided on the subscriber side, and the key code sent after decoding the data becomes the key code on the receiving side. In an information service system in which a specific information service sent from the database station can be received only when a match is found, this control data section is added to the shuffled control data section for transmitting the decoding information of the service data section. In addition to inserting a sync code for decoding the data part, a code is inserted in which the data length following this sync code is constant, and the length between this data length and the next sync code is variable. A decoder used in an information service system, which detects a sync code and then detects a subsequent sync code using a gate signal having a code length up to the sync code including the variable length code.