JPS62272777A - Liquid crystal matrix panel driving circuit - Google Patents

Abstract

PURPOSE:To prevent the degrading of contrast ratio from occurring even in case on interlace scanning is executed while using a panel whose scanning side electrodes exceed the effective scanning lines for one-field share in number by providing two sets of scanning side and signal side drivers, respectively, and making it possible to select two scanning side electrodes of the panel during one horizontal scanning period. CONSTITUTION:A scanning signal generating circuit 112 supplies to the scanning side drivers 109 and 110 such scanning signals as to select an odd number-th scanning side electrode during an effective scanning period and an even number-th scanning side electrode during a horizontal blanking period for one field of the interlace-scanned fields, and to select inversely the above electrodes for the other field. A field decision circuit 106 supplies a first field/a second field discrimination signal to the circuit 112. A polarity inverting circuit 103 inverts the polarity of video signals at every field, and its output is supplied to the signal side drivers 107 and 108 to supply to the signal side drivers 107 and 108 that supply signals to the signal side electrode of the panel. Accordingly the scanning side electrodes are selected one piece each during the effective scanning period and the horizontal blanking period i.e. two pieces during one horizontal scanning cycle, hence, scanning side electrodes in the number corresponding to the number of effective scanning lines in one frame period are selected during one field period. As a result, respective picture elements are selected exactly one time during every field period.

Description

[Detailed Description of the Invention] 3. Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a liquid crystal matrix panel drive circuit for causing a liquid crystal matrix panel, which is an image display device, to display an image. Regarding.

[Conventional technology]

In the current NTSC standard, 2 per l field.
There are 62.5 scanning lines, of which the effective number of scanning lines is 2.
There are about 40 pieces.

Conventionally, liquid crystal matrix panels have a maximum of 2 scanning electrodes.
Approximately 20 lines were used, so when adopting the NTSC method, adjacent scanning lines of the first and second fields were superimposed on the same scanning electrode on the liquid crystal matrix panel. .

In addition, since the liquid crystal itself cannot be used with DC drive,
In the first field and the second field, the polarity of the video signal was inverted, so that the voltage written to the liquid crystal was changed to alternating current.

(Reference) “Portable LCD TV with display quality that has reached a practical level”
Nikkei Electronics 1981.2゜“Commercialized LCD Pocket Color TV” Nikkei Electronics
19B4.9.10 [Problems to be Solved by the Invention] In the prior art, display was possible with a liquid crystal matrix panel with about 240 scan-side electrodes under the panel.

However, it is not possible to display a liquid crystal matrix panel with more than 240 scanning electrodes.

If interlaced scanning were to be performed like in CRT, an arbitrary pixel would be selected once every frame, or two fields (approximately 33 ms).
Since the charge retention time of the pixel becomes longer, the effective value of the signal voltage applied to the liquid crystal decreases, resulting in a decrease in contrast ratio.

On the other hand, as liquid crystal matrix panels have become larger and higher definition is required, the number of electrodes on the scanning side has increased to NTS.
It is necessary that the number of effective horizontal scanning lines be approximately the same as that of the C method.

In addition, in a liquid crystal matrix panel of the same area,
Improvement in definition means miniaturization of pixels, so
It is difficult to expect an increase in pixel capacitance to maintain signal voltage.

In this way, with conventional interlaced scanning as it is,
Considering the signal voltage retention characteristics of the liquid crystal matrix panel, there was a problem in that the contrast ratio deteriorated significantly when the number of pixel selections was halved.

SUMMARY OF THE INVENTION The present invention is intended to solve these conventional problems, and its purpose is to realize a driving method that does not reduce the number of times an arbitrary pixel is selected per unit time even when performing interlaced scanning. Number of scanning side electrodes is 1
A liquid crystal matrix that exceeds the number of effective scanning lines for one field.
An object of the present invention is to provide a liquid crystal matrix panel drive circuit that does not deteriorate the contrast ratio even in a panel.

[Means for solving problems]

The liquid crystal matrix panel drive circuit of the present invention comprises a) a liquid crystal matrix panel drive circuit for driving a liquid crystal matrix panel of an image display device, and b) supplying a selection signal to the scanning side electrode of the liquid crystal matrix panel. and C) a scanning side driver for selecting the odd numbered scanning side electrodes during the effective scanning period and selecting the even numbered scanning side electrodes during the horizontal retrace period in one field of interlaced scanning. and a scanning signal generating circuit for supplying a scanning signal for selecting an even-numbered scanning-side electrode in the effective scanning period in the other field and selecting an odd-numbered scanning-side electrode in the horizontal retrace period; d) a field determination circuit for supplying first and second field discrimination signals to the scanning signal generation circuit; e) a polarity determination circuit for inverting the polarity of the video signal for each field; and f) the polarity inversion. It is characterized by comprising a signal side driver for supplying the output signal of the circuit to the signal side electrode of the liquid crystal matrix panel.

[Effect]

According to the above configuration of the present invention, one scanning side electrode of the liquid crystal matrix panel is selected during the effective scanning period and one during the horizontal retrace period, that is, two electrodes are selected during one horizontal scanning period. The scanning side electrodes corresponding to the number of effective scanning lines in a frame (two field) period are selected, and each pixel is selected once every field period.

〔Example〕

The present invention will be described below based on examples.

FIG. 1 is a block diagram of a liquid crystal panel driving circuit according to the present invention.

The composite video signal is input to a video signal input terminal (101), is amplified to a required voltage amplitude by a video amplification circuit, and is added with an offset that matches the characteristics of the liquid crystal matrix panel (111).

The video signal whose amplitude and offset have been adjusted is turned into an alternating signal of positive polarity and negative polarity every l field in a polarity inversion circuit (103).

Polarity and reversal! The alternating output signal from (103) is sampled and held by point sequential type signal side drivers (107) and (108) according to the control signal from the horizontal synchronization circuit (105), and then sent to the liquid crystal matrix panel (11).
1) is supplied to the signal side electrode.

A composite video signal from a video signal input terminal (101) is simultaneously input to a synchronization separation circuit (104) and separated into a horizontal synchronization signal and a vertical synchronization signal.

The horizontal synchronization signal separated by the synchronization separation circuit (104) is
A control signal that is input to the horizontal synchronization circuit (105) and synchronized with the horizontal synchronization signal is generated by the horizontal synchronization circuit (105),
Signal side driver (107) (l O8), field judgment circuit (106), and scanning signal generation circuit (112)
supplied to

The field determination circuit (106) includes a synchronization separation circuit (10
Vertical synchronization signal obtained in 4) and horizontal synchronization circuit (l O5
) is used to discriminate between the first field and the second field.

Using the field determination signal from the field determination circuit (106) and the control signal from the horizontal synchronization circuit (105),
A scanning signal generation circuit (112) forms a scanning signal to the scanning side driver (IO9) (11O).

FIG. 2 shows a circuit diagram of the polarity inversion circuit (103).

FIG. 3 shows an operating waveform diagram of the polarity inversion circuit (103).

A video signal shown in FIG. 3a is inputted from a video signal input terminal (201), and is phase-divided by a polarity inverting transistor (204).

The inverted output on the collector side and the in-phase output on the emitter side of the polarity inverted transistor (204) are connected to the inverted polarity signal input terminal (202) by a multiplexer (205).
C) The logic level is inverted every field input from the C) polarity inversion signal, and b) an alternating signal is obtained at the alternating signal output terminal (206).

Figure 4 shows a circuit diagram around the liquid crystal matrix panel.

The signal side drivers (414) and (415) are the signal side drivers (107) and (10B), respectively.
Compatible with the scanning side driver (416) / (41
7) are the scanning side drivers (109) and (
110).

Liquid crystal matrix panel (419) corresponds to liquid crystal matrix panel (111).

The shift register (412) is connected to the horizontal synchronization circuit (10
The signal side transfer signal and signal side start signal, which are control signals from 5), are respectively input to the signal side transfer signal input terminal (4).
01) ・(404) and signal side start signal input terminal (
402) - It is input from (405) and is transferred one bit at a time within the horizontal effective scanning period.

The waveform diagram of the signal side drivers (414) and (415) is shown in FIG.

A) is an input composite video signal, and b) and C) are a signal side start signal and a signal side transfer signal, respectively.

d) and e) are the first bit shift register output signals of the signal side drivers (414) and (415), respectively.

f) and g) are also the final focus shift register output signals.

The analog switches (413) are sequentially selected by the output signal (H active) of the shift register (412), and an alternating signal (video signal) is sampled and held in the capacitance of the signal side electrode.

The shift register (418) is a scanning signal generating circuit (
The scanning side transfer signal and scanning side start signal, which are control signals from 112), are sent from the scanning side transfer signal input terminals (408) and (410) and the scanning side start signal input terminals (407) and (409), respectively. The data is input and transferred one bit at a time during one horizontal scanning period.

FIG. 6 shows a waveform diagram of the scanning side drivers (416) and (417) during one frame period.

a) 4;! One frame (two fields) of an alternating signal is shown.

b) is a scanning side start signal, and C) is a scanning side transfer signal.

C) The scanning side transfer signal is inverted between the first field and the second field by the field determination signal from the field determination circuit.

d) and f) are the first bit shift register output signals of the scan side drivers (416) and (417), respectively.

e) and g) are also the last bit shift register output signals.

The scanning side electrode (423) is sequentially selected by the output signal (H active) of the scanning side driver (416)/(41?), and the pixel transistor (42) connected thereto is sequentially selected.
0) becomes conductive, and an alternating signal is written to the liquid crystal (421).

Figure 7 shows the scanning side drivers (416) and (417).
) in one horizontal period is shown.

a) is a composite video signal.

b) and C) are scanning side drivers (416) and (4
17).

For example, in the first field, the scanning driver (416
) corresponds to b), then the second field corresponds to C).

At this time, the output signal of the scanning side driver (417) is
The first and second fields correspond to C) and b), respectively.

That is, in the first field, odd-numbered scanning side electrodes (4
23) is selected during the effective scanning period, the even-numbered scanning side electrode (423) is selected during the horizontal retrace period.

In the subsequent second field, the relationship is reversed, with even-numbered scanning electrodes (423) being selected during the effective scanning period and odd-numbered scanning electrodes being selected during the horizontal retrace period.

Then, the above steps are repeated.

The alternating signal supplied to the pixel connected to the scanning electrode (423) selected during the horizontal retrace period is a signal sampled and held in the signal electrode during the immediately preceding effective scanning period.

In order to properly operate the interlaced scan employed in the NTSC system, it is sufficient to set the output signal of the scanning side driver (416) in the first field to be output during the effective scanning period.

(However, this is the case of the waveform diagram in FIG. 6.) FIG. 8 shows the arrangement of the scanning side electrodes (423) and their selection order. However, VA represents the effective scanning period, and BLK represents the horizontal retrace period.

The scanning signal generation circuit (112) is composed of a counter and a decoder in order to generate the above-mentioned control signals, and includes a horizontal period clock signal from the horizontal synchronization circuit (105) and a field determination circuit (106). It operates based on the field judgment signal from.

FIG. 9 shows a block diagram of the scanning signal generation circuit (112).

FIG. 10 shows a circuit diagram of the field determination circuit (106).

FIGS. 11 and 12 show waveform diagrams of the field determination circuit of FIG. 1θ.

A vertical synchronization signal (FIG. 10a) from the synchronization separation circuit (104) is input to the vertical synchronization signal input terminal (1001).

The horizontal clock signal input terminal (1002) receives the horizontal clock signal (Fig. 10C) from the horizontal synchronization circuit (105).
is input.

At this time, the field determination output signal is H in the first field and L in the second field.

〔Effect of the invention〕

As described above, according to the configuration of the present invention, two scanning side electrodes of the liquid crystal matrix panel can be selected in one horizontal scanning period, so that the liquid crystal matrix panel in which the number of scanning side electrodes exceeds the number of effective scanning lines for one field. Even if interlaced scanning is performed using a panel, all scanning side electrodes can be selected, and the number of pixel selections per unit time is not reduced compared to before, making it possible to prevent contrast ratio deterioration. There is an effect that it can be done.

[Brief explanation of drawings]

Fig. 1 is a block diagram of the liquid crystal panel drive circuit of the present invention, Fig. 2 is a circuit diagram of the polarity inversion circuit, Fig. 3 is an operating waveform diagram of the polarity inversion circuit, and Fig. 4 is a circuit diagram around the liquid crystal matrix panel. , Figure 5 is a waveform diagram of the signal side driver, Figure 6 is a waveform diagram of the scanning side driver in one frame, Figure 7 is a waveform diagram of the scanning side driver in one horizontal period, and Figure 8 is the arrangement of the scanning side electrodes. FIG. 9 is a block diagram of the scanning signal generation circuit, FIG. 10 is a circuit diagram of the field determination circuit, and FIGS. 11 and 12 are waveform diagrams of the field determination circuit. (102) Video amplification circuit, (103) Polarity inversion circuit, (
104) Synchronization separation circuit, (105) Horizontal synchronization circuit, (1
06) Field judgment circuit, (107)・(l O8
) Signal side driver, (109) (110) Scanning side driver, (111) Liquid crystal matrix panel, (1
12) Scanning signal generation circuit and above Applicant: Seiko Epson Co., Ltd. Agent Patent Attorney Mogami (Ih1 person Figure 7)

Claims (1)

[Claims] a) A liquid crystal matrix panel drive circuit for driving a liquid crystal matrix panel which is an image display device, b) a scanning side for supplying a selection signal to a scanning side electrode of the liquid crystal matrix panel. c) the scanning side driver, in one field of interlaced scanning, selects the odd numbered scanning side electrode in the effective scanning period, selects the even numbered scanning side electrode in the horizontal retrace period, and selects the even numbered scanning side electrode in the other field; d) a scanning signal generation circuit for supplying a scanning signal for selecting even-numbered scanning-side electrodes during the effective scanning period and selecting odd-numbered scanning-side electrodes during the horizontal retrace period; d) generating the scanning signal; a field determination circuit for supplying first and second field discrimination signals to the circuit; e) a polarity inversion circuit for inverting the polarity of the video signal for each field; A liquid crystal matrix panel drive circuit comprising a signal side driver for supplying signal side electrodes of the matrix panel.