JPS6226987U - - Google Patents

Info

Publication number
JPS6226987U
JPS6226987U JP11980085U JP11980085U JPS6226987U JP S6226987 U JPS6226987 U JP S6226987U JP 11980085 U JP11980085 U JP 11980085U JP 11980085 U JP11980085 U JP 11980085U JP S6226987 U JPS6226987 U JP S6226987U
Authority
JP
Japan
Prior art keywords
frequency
pulse
circuit
phase
flop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11980085U
Other languages
Japanese (ja)
Other versions
JPH0526865Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1985119800U priority Critical patent/JPH0526865Y2/ja
Publication of JPS6226987U publication Critical patent/JPS6226987U/ja
Application granted granted Critical
Publication of JPH0526865Y2 publication Critical patent/JPH0526865Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例の要部のブロツク図
、第２図は動作説明に供するタイムチヤートであ
る。 １……キヤプスタンモータ、４……ＦＧパルス
発生器、９……分周回路、１０……位相制御回路
、１１……出力回路。 FIG. 1 is a block diagram of a main part of an embodiment of the present invention, and FIG. 2 is a time chart for explaining the operation. 1... Capstan motor, 4... FG pulse generator, 9... Frequency dividing circuit, 10... Phase control circuit, 11... Output circuit.

Claims (1)

【実用新案登録請求の範囲】 (1) キヤプスタンモータの回転に伴なつて通常
再生時には、垂直同期周波数ｎ倍の周波数の回転
検出パルスを発生させるパルス発生器を備え、該
回転検出パルスに基づいてキヤプスタンサーボを
行なう８ミリビデオテープレコーダにおいて、 前記回転パルスを１／ｎに分周して分周パルス
を出力する分周回路と、 通常再生時に分周パルスの位相垂直同期信号の
位相と一定の関係になるように位相制御する位相
制御回路と、 キヤプスタンモータを間欠駆動させてコマ送り
あるいはスローモーシヨン再生を行なうための駆
動信号を前記分周パルスに基づいて形成出力する
出力回路とを備えることを特徴とする８ミリビデ
オテープレコーダ。 (2) 前記位相制御回路は、通常再生時にのみヘ
ツドスイツチングパルスに同期したリセツト信号
を前記分周回路に出力して分周回路をリセツトす
るものである前記実用新案登録請求の範囲第１項
記載の８ミリビデオテープレコーダ。 (3) 前記出力回路は、フリツプフロツプと、コ
マ送りあるいはスローモーシヨン再生のモードを
指定するモード指定信号に応答してフリツプフロ
ツプをセツト状態にする一定周期のトリガパルス
を発生させるトリガ回路と、分周パルスに応答し
て所定時間経過後にフリツプフロツプをリセツト
状態にする単安定マルチバイブレータとを含む前
記実用新案登録請求の範囲第１項または第２項記
載の８ミリビデオテープレコーダ。[Claims for Utility Model Registration] (1) A pulse generator that generates a rotation detection pulse with a frequency n times the vertical synchronization frequency during normal playback as the capstan motor rotates; In an 8mm video tape recorder that performs capstan servo based on the above-mentioned system, there is a frequency dividing circuit that divides the frequency of the rotational pulse to 1/n and outputs the frequency-divided pulse, and a phase vertical synchronization signal of the frequency-divided pulse during normal playback. a phase control circuit that controls the phase so that it has a constant relationship with the phase; and an output that forms and outputs a drive signal for intermittently driving the capstan motor to perform frame-by-frame forwarding or slow-motion playback based on the frequency-divided pulses. An 8 mm video tape recorder comprising a circuit. (2) The phase control circuit resets the frequency dividing circuit by outputting a reset signal synchronized with the head switching pulse to the frequency dividing circuit only during normal reproduction. 8mm video tape recorder as described. (3) The output circuit includes a flip-flop, a trigger circuit that generates a trigger pulse of a constant period to set the flip-flop in response to a mode designation signal that designates frame-by-frame forwarding or slow-motion playback mode, and a frequency-divided pulse. and a monostable multivibrator which resets the flip-flop after a predetermined period of time in response to the lapse of a predetermined period of time.
JP1985119800U 1985-08-02 1985-08-02 Expired - Lifetime JPH0526865Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985119800U JPH0526865Y2 (en) 1985-08-02 1985-08-02

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985119800U JPH0526865Y2 (en) 1985-08-02 1985-08-02

Publications (2)

Publication Number Publication Date
JPS6226987U true JPS6226987U (en) 1987-02-18
JPH0526865Y2 JPH0526865Y2 (en) 1993-07-07

Family

ID=31007513

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985119800U Expired - Lifetime JPH0526865Y2 (en) 1985-08-02 1985-08-02

Country Status (1)

Country Link
JP (1) JPH0526865Y2 (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS555659U (en) * 1978-06-27 1980-01-14
JPS5686084A (en) * 1979-11-15 1981-07-13 Rca Corp Motor speed control circuit
JPS5717285A (en) * 1980-07-04 1982-01-28 Matsushita Electric Ind Co Ltd Slow motion reproducing method
JPS57104671U (en) * 1980-12-18 1982-06-28
JPS58212647A (en) * 1982-06-04 1983-12-10 Matsushita Electric Ind Co Ltd Video tape recorder
JPS60119801A (en) * 1983-11-16 1985-06-27 スペノ・インターナシヨナル、エス・アー Re-molding apparatus of rail head part

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS555659B2 (en) * 1974-07-09 1980-02-08

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS555659U (en) * 1978-06-27 1980-01-14
JPS5686084A (en) * 1979-11-15 1981-07-13 Rca Corp Motor speed control circuit
JPS5717285A (en) * 1980-07-04 1982-01-28 Matsushita Electric Ind Co Ltd Slow motion reproducing method
JPS57104671U (en) * 1980-12-18 1982-06-28
JPS58212647A (en) * 1982-06-04 1983-12-10 Matsushita Electric Ind Co Ltd Video tape recorder
JPS60119801A (en) * 1983-11-16 1985-06-27 スペノ・インターナシヨナル、エス・アー Re-molding apparatus of rail head part

Also Published As

Publication number Publication date
JPH0526865Y2 (en) 1993-07-07

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