JPS6226927A - Error check system of analog-digital conversion circuit - Google Patents

Error check system of analog-digital conversion circuit

Info

Publication number
JPS6226927A
JPS6226927A JP16617985A JP16617985A JPS6226927A JP S6226927 A JPS6226927 A JP S6226927A JP 16617985 A JP16617985 A JP 16617985A JP 16617985 A JP16617985 A JP 16617985A JP S6226927 A JPS6226927 A JP S6226927A
Authority
JP
Japan
Prior art keywords
circuit
sensor
conversion circuit
output
analog
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16617985A
Other languages
Japanese (ja)
Inventor
Yoshitsugu Oka
岡 吉嗣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP16617985A priority Critical patent/JPS6226927A/en
Publication of JPS6226927A publication Critical patent/JPS6226927A/en
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Abstract

PURPOSE:To decide surely the normality of the titled circuit by applying a reference voltage to an A/D conversion circuit inputting an analog signal from each sensor, comparing the reference voltage with a pre-stored data so as to discriminate a fault of the circuit. CONSTITUTION:Whether or not a check circuit is connected is judged and when not connected, an input value, a minimum value and a maximum value of each sensor at normal state are set to detect the fault of a sensor, and if sensor 1 is faulty, an alarm display output informing the fault is outputted to a display device 13 from a control section 12. When the check circuit is connected, the input value, maximum value and minimum value of the reference voltage at check are set and a reference signal given from a voltage Vcc via an analog IC1A is converted by an A/D conversion circuit 11. Whether or not an output from the circuit 11 is within a permissible range stored in the control section 12 is decided and when the output is at the outside of the range, alarm display is applied, and when within the range, it is discriminated as OK and the output from the next analog IC is checked. The operation above is repeated similarly.

Description

【発明の詳細な説明】 (発明の属する技術分野〕 この発明はセンサからのアナログ値を入力するためのA
/D変換回路のエラーチェック方式に関する。
[Detailed description of the invention] (Technical field to which the invention pertains) This invention relates to an A for inputting analog values from a sensor.
This invention relates to an error checking method for a /D conversion circuit.

〔従来技術とその問題点〕[Prior art and its problems]

第8図は一般的な各センサの異常検出回路を示すもので
、1,2.〜.Nは装置の異常を検出する各センサ、1
1は各センサからアナログ信号を入力し、デジタル信号
に変換するA/D変換回路、12はマイクロコンピュー
タを使用した制御部、この制御部12にA/D変換回路
の出力が入力される。18は表示装置である。尚、14
はプリント板で、A / T)変換回路11および制御
部12が取付けられている。
FIG. 8 shows the abnormality detection circuit of each general sensor. ~. N is each sensor that detects an abnormality in the device, 1
1 is an A/D conversion circuit that inputs analog signals from each sensor and converts them into digital signals; 12 is a control section using a microcomputer; and the output of the A/D conversion circuit is input to this control section 12. 18 is a display device. In addition, 14
is a printed board on which an A/T) conversion circuit 11 and a control section 12 are attached.

この構成において、センサ1.2.〜.Nから異常出力
があるとA/D変換回路11でアナログ信号を入力し、
このアナログ信号をデジタル信号に変換して制御部12
へ出力し、この制御部12では異常内容に応じて表示装
置18へ出力する。
In this configuration, sensors 1.2. ~. When there is an abnormal output from N, an analog signal is input to the A/D conversion circuit 11,
The control unit 12 converts this analog signal into a digital signal.
The control unit 12 outputs the data to the display device 18 depending on the content of the abnormality.

しかして、前述した回路では、A/D変換回路の正常性
をチェックしなければならず、従来は、人間の手によっ
て入力電圧と出力値を比較して回路の異常チェックを行
なっていたため、作業効率が悪く、また、信頼性にも欠
けるものであった。
However, in the above-mentioned circuit, it is necessary to check the normality of the A/D conversion circuit, and conventionally, the input voltage and output value were compared manually to check for circuit abnormalities, which was difficult to do. It was inefficient and also lacked reliability.

〔発明の目的〕[Purpose of the invention]

この発明は、前述の点に鑑みてなされたものであり、各
センサからのアナログ信号を入力する回路の正常性を確
実に判定できるようにしたアナログ入力回路のチェック
方式を提供することを目的とする。
The present invention has been made in view of the above-mentioned points, and an object of the present invention is to provide a checking method for an analog input circuit that can reliably determine the normality of a circuit that inputs analog signals from each sensor. do.

〔発明の要点〕[Key points of the invention]

この発明は、各センサからのアナログ信号を人力するA
/D変換回路に基準電圧を与え、この基準m圧と予め記
憶されているデータとを比換して前記回路の異常を判定
することにより前記回路の正常性を確実に判定できるよ
うにしたものである。
This invention is an A
The normality of the circuit can be reliably determined by applying a reference voltage to the /D conversion circuit and comparing this reference m-pressure with pre-stored data to determine the abnormality of the circuit. It is.

〔発明の実施例〕[Embodiments of the invention]

第1図はこの発明の実施例を示すもので、第8図と同一
符号は同一または同様のものを示す。
FIG. 1 shows an embodiment of the present invention, and the same reference numerals as in FIG. 8 indicate the same or similar parts.

の入力端には抵抗21を介して電圧VCCが印加される
。また、出力と17で基準となる電圧がA、 / I)
変換回路に出力される。22はバッファで、このバッフ
16からの信号により制御部12では、A/D変換回路
11のチェック中か、通常運転中かを判断する。加えて
、制御部12では、基準電圧値と制御部12内に予め設
定されている電圧値を比較し、異常であればアラームを
出力スル。
A voltage VCC is applied to the input terminal of the circuit via a resistor 21. Also, the reference voltage for output and 17 is A, / I)
Output to the conversion circuit. Reference numeral 22 denotes a buffer, and based on the signal from this buffer 16, the control section 12 determines whether the A/D conversion circuit 11 is being checked or is in normal operation. In addition, the control unit 12 compares the reference voltage value with a voltage value preset in the control unit 12, and outputs an alarm if it is abnormal.

この構成において、動作説明を第2図のフローチャー1
・を参照しながら説明する。
In this configuration, the operation will be explained in flowchart 1 of FIG.
・Explain while referring to.

ステップ5iotでチェック回路が接続されているかを
判断し、接続されていなければ、ステップ8202へ進
む。ステップ5202では、通常時における各センサの
入力値、最小値、最大値を設定シ、ステップ8108へ
進む。ステップ810Bではセンサの異常を検出し、も
し、センサlに異常があればステップ8808へ進み、
このステップ5808では制御部12から異常を報知す
るアラーム表示出力を表示装置18に出力する。
In step 5iot, it is determined whether the check circuit is connected, and if it is not connected, the process advances to step 8202. In step 5202, the input value, minimum value, and maximum value of each sensor under normal conditions are set, and the process advances to step 8108. In step 810B, an abnormality in the sensor is detected, and if there is an abnormality in sensor l, the process advances to step 8808.
In this step 5808, the control unit 12 outputs an alarm display output to notify the abnormality to the display device 18.

これ以後、各センサについてもセンサ1と同様のことを
行ない、ステップIONでセンサNが終了した時点で次
のステップへill。
After this, the same process as for sensor 1 is performed for each sensor, and when sensor N is completed in step ION, ill goes to the next step.

次にステップ5101でチェック回路が接続されている
かを判断し、チェック回路が接続されていればステップ
5102へ進む。ステップ8102では、チェック時の
基準電圧の入力値、最大値、して与えられた基準値信号
をA/D変換回路で変換し、この変換回路からの出力が
制御部12に記憶されている許容範囲内であるかを判定
し、範囲外4fらば、ステップ820Bへ進み、アラー
ム表示を行ない範囲内であればOKとして次のステップ
へ進み、次のアナログICからの出力をチェックする。
Next, in step 5101, it is determined whether the check circuit is connected, and if the check circuit is connected, the process advances to step 5102. In step 8102, the reference value signal given as the input value and maximum value of the reference voltage at the time of checking is converted by the A/D conversion circuit, and the output from this conversion circuit is stored in the control unit 12. It is determined whether it is within the range, and if it is outside the range 4f, the process proceeds to step 820B, where an alarm is displayed, and if it is within the range, it is determined as OK and the process proceeds to the next step, where the output from the next analog IC is checked.

以下前述と同様の作業を繰返してA/D変換回路11の
異常をチェックするものである。
Thereafter, the same operations as described above are repeated to check for abnormalities in the A/D conversion circuit 11.

〔発明の効果〕〔Effect of the invention〕

この発明によれば、各センサからアナログ信号を入力し
てデジタル信号に変換するA/D変換回路に各センサと
は別に基準電圧を与え、前記回路からの出力と予め記憶
されているデータとを比較して、前記回路の異常を判定
できるようにしたので、正確に回路の異常を判定でき、
信頼性も高められる。
According to this invention, a reference voltage is applied separately from each sensor to an A/D conversion circuit that inputs an analog signal from each sensor and converts it into a digital signal, and the output from the circuit and pre-stored data are By comparison, it is possible to determine the abnormality of the circuit, so it is possible to accurately determine the abnormality of the circuit.
Reliability can also be improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例を示すブロック回路図、第
2図はこの発明の動作説明を行なうフローチャート、第
8図はこの発明の通常動作時を示すブロック回路図であ
る。 1.2.〜.N・・・センサ、11・・・A/D変換回
路、12・・・制御部。 第2図 =193−
FIG. 1 is a block circuit diagram showing an embodiment of the invention, FIG. 2 is a flowchart explaining the operation of the invention, and FIG. 8 is a block circuit diagram showing the normal operation of the invention. 1.2. ~. N...Sensor, 11...A/D conversion circuit, 12...Control unit. Figure 2 = 193-

Claims (1)

【特許請求の範囲】[Claims] 1)各センサの出力を入力して制御部へ信号を出力する
A/D変換回路を備えたものにおいて、前記A/D変換
回路に基準電圧を与え、このA/D変換回路からの出力
と予め記憶されているデータとを比較する手段を設け、
この比較手段の結果によりA/D変換回路の異常を判定
するA/D変換回路のエラーチェック方式。
1) In a device equipped with an A/D conversion circuit that inputs the output of each sensor and outputs a signal to the control unit, a reference voltage is applied to the A/D conversion circuit, and the output from the A/D conversion circuit is Provide a means for comparing with pre-stored data,
An error check method for an A/D converter circuit that determines an abnormality in the A/D converter circuit based on the result of the comparison means.
JP16617985A 1985-07-27 1985-07-27 Error check system of analog-digital conversion circuit Pending JPS6226927A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16617985A JPS6226927A (en) 1985-07-27 1985-07-27 Error check system of analog-digital conversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16617985A JPS6226927A (en) 1985-07-27 1985-07-27 Error check system of analog-digital conversion circuit

Publications (1)

Publication Number Publication Date
JPS6226927A true JPS6226927A (en) 1987-02-04

Family

ID=15826540

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16617985A Pending JPS6226927A (en) 1985-07-27 1985-07-27 Error check system of analog-digital conversion circuit

Country Status (1)

Country Link
JP (1) JPS6226927A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05114860A (en) * 1991-10-22 1993-05-07 Harman Co Ltd A/d converter for sensor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05114860A (en) * 1991-10-22 1993-05-07 Harman Co Ltd A/d converter for sensor

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