JPS62266990A - Inter-frame decoder - Google Patents

Inter-frame decoder

Info

Publication number
JPS62266990A
JPS62266990A JP61111422A JP11142286A JPS62266990A JP S62266990 A JPS62266990 A JP S62266990A JP 61111422 A JP61111422 A JP 61111422A JP 11142286 A JP11142286 A JP 11142286A JP S62266990 A JPS62266990 A JP S62266990A
Authority
JP
Japan
Prior art keywords
signal
circuit
interframe
decoding
interframe decoding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61111422A
Other languages
Japanese (ja)
Inventor
Mitsuo Nishiwaki
西脇 光男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP61111422A priority Critical patent/JPS62266990A/en
Publication of JPS62266990A publication Critical patent/JPS62266990A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent a random picture from being projected on a receiving picture monitor by outputting the signal of a memory circuit by a selection circuit when a decoder between frames does not receive an encoding signal between the frames. CONSTITUTION:Encoding data between the frames is inputted to an input terminal 1, decoded into a TDM signal in a decoding circuit 4 between the frames and a decoding TDM signal (c), a frame pulse (d) indicating the top of the frame and a signal (d) indicating that the decoding error is not present are outputted. The signal (c) is ordinarily outputted to an output terminal 3 through the selection circuit 7. An FF5 is ordinarily reset and when it is reset by a control signal (e) from an input terminal 2, a timing is taken by the pulse (d) in a register 6 to have the selection signal of the circuit 7 and the circuit 7 selects the signal from the memory circuit 8. At this time, in the circuit 8, since the signal of its own is fed back, the data is not updated but the decoding TDM signal before a signal (g) is changed over is repeatedly outputted and a still picture is projected on the receiving picture monitor.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、フレーム間符号化されたテレビジョン信号を
復号するフレーム間復号装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an interframe decoding device for decoding an interframe coded television signal.

〔従来の技術〕[Conventional technology]

テレビ会議のようなシステムにおいては、フレーム間符
号化技術により圧縮符号化した信号を伝送する広帯域の
PCM伝送路(PCM−次群程度)に会議中にファクシ
ミリのような信号を通し、1つの伝送路を共用し効率よ
く回線を利用したい場合がある。このような回線利用を
行った場合、フレーム間復号装置から見た場合、ファク
シミリなどの信号を伝送中数秒回線断の状態になり、符
号化信号を受信不能となり、受信画モニターにでたらめ
な画像が写し出されるという問題が生ずる。
In a system such as a video conference, a signal such as a facsimile is passed through a wideband PCM transmission line (PCM - next group level) that transmits a signal compressed and encoded using interframe coding technology, and one transmission is performed. There are cases where it is desired to share the line and use the line efficiently. If you use the line in this way, from the perspective of the interframe decoding device, the line will be disconnected for several seconds while transmitting facsimile signals, making it impossible to receive encoded signals, and causing random images to appear on the receiving monitor. The problem arises that the image is photographed.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

本発明の目的は、上記のような回線利用がなされた場合
に回線が他の信号を伝送するために占イ(され、動画を
伝送する回線が断になっている間は、回線断になる前の
復号画像を再生しつづけ、受信画モニターにでたらめな
画像が写し出されないようなフレーム間復号装置を提供
することにある。
The object of the present invention is that when the line is used as described above, the line is blocked for transmitting other signals, and while the line for transmitting video is disconnected, the line is disconnected. To provide an interframe decoding device which continues to reproduce the previous decoded image and prevents random images from being displayed on a received image monitor.

〔問題点を解決するための手段〕[Means for solving problems]

未発明のフレーム間復号装置は、復号誤りを検出1〜う
るフレーム間復号回路と、前記フレーム間復号回路の復
号TDM信号を1フレーム記憶しうる記憶回路と、前記
フレーム間復号回路がフレーム間符号化データを入力し
ていないことを示す制御信号を外部から受けると第1の
状態になり、前記フレーム間復号回路で復号誤りが検出
されなかった場合に第2の状態になるフリ・Iプフロー
lプと、前記フレーム間復号回路の復号信号と前記記憶
回路からの信号を受け、前記フリップフロップが第1の
状態のとき前記記憶回路からの信号を選択し、前記フリ
ー2ブフロツプが第2の状態のとき前記フレーム間復号
回路からの復号信号を選択し、前記記憶回路および外部
に出力する選択回路を有する。
An uninvented interframe decoding device includes an interframe decoding circuit capable of detecting decoding errors, a storage circuit capable of storing one frame of decoded TDM signals of the interframe decoding circuit, and an interframe decoding circuit capable of storing one frame of decoded TDM signals of the interframe decoding circuit. When a control signal indicating that encoded data is not input is received from the outside, the first state is entered, and when no decoding error is detected in the interframe decoding circuit, the flip-I flow enters the second state. receives a decoded signal from the interframe decoding circuit and a signal from the storage circuit, selects a signal from the storage circuit when the flip-flop is in a first state, and selects a signal from the storage circuit when the flip-flop is in a second state. The apparatus further includes a selection circuit that selects a decoded signal from the interframe decoding circuit and outputs the decoded signal to the storage circuit and the outside.

フレーム間復号装置がフレーム間符号化信号を受信して
いないとき、選択回路は記憶回路の信号を選択するので
記憶回路の信号の更新が禁止される。すなわち、回線断
になる前の復号画像が再生し続け、受信画モニターにで
たらめな画像が写し出されることがない。
When the interframe decoding device does not receive an interframe encoded signal, the selection circuit selects the signal of the storage circuit, and therefore updating of the signal of the storage circuit is prohibited. That is, the decoded image before the line was disconnected continues to be reproduced, and no random image is displayed on the received image monitor.

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明する
Next, embodiments of the present invention will be described with reference to the drawings.

第1図は本発明のフレーム間復号装置の一実施例を示す
図である。入力端子1にフレーム間符号化データが入力
し、フレーム間復号回路4においてTDM信号に復号さ
れ、復号TDM信号Cとフレーム先頭を示すフレームパ
ルスdと復号誤りがないことを示す信号すが出力される
。復号TDM信号Cは選択回路7を介して通常は、出力
端子3へ出力される。また、出力信号りは記憶回路8に
おいて1フレ一ム時間記憶され、選択回路7へ出力され
る。フリップフロップ5は、入力端子2からの制御信号
eによりセットされ、復号誤り検出結果により誤りがな
い場合にリセットされる。
FIG. 1 is a diagram showing an embodiment of an interframe decoding device of the present invention. Interframe encoded data is input to the input terminal 1, decoded into a TDM signal by the interframe decoding circuit 4, and a decoded TDM signal C, a frame pulse d indicating the beginning of the frame, and a signal indicating that there is no decoding error are output. Ru. The decoded TDM signal C is normally output to the output terminal 3 via the selection circuit 7. Further, the output signal is stored for one frame time in the storage circuit 8 and outputted to the selection circuit 7. The flip-flop 5 is set by a control signal e from the input terminal 2, and is reset if there is no error as a result of decoding error detection.

フリツプフロツプ5は通常リセットされているが、制御
信号eによりセット状態になると、レジスタ6において
フレームパルスdでタイミングをとられ、選択回路7の
選択信号gとなり、選択回路7は記憶回路8からの信号
を選択するようになる。この時、記憶回路8には自己の
信号がフィードバーツクしてくるため記憶回路8のデー
タは更新されなくなり、出力端子3には選択信号gが切
替わる前の復号TDM信号がくり返し出力されることに
なるつつまり、受信画モニターには静止画が写し出され
ることになる。フリップフロップ5は、制御信号eがオ
フになりフレーム間復号回路4で復号誤りが発生しなく
なるまでセット状態であり、 12号誤りがなくなって
はじめてリセット状態となるため、出力端子3には誤り
のない信号が出力されることになる。なお、入力端子2
の制御信号eは、伝送路がフレーム間符号化データでな
く他の信号(たとえばファクシミリのデータ)に占有さ
れ、フレーム間符号化データを入力端子1が受信してい
ない状態を示す信号である。また、フレーム間復号回路
4における復号誤りの検出は、たとえば、フレーム間符
号化回路の局部復号信号とフレーム間復号回路4の復号
信号のそれぞれのパリティを演算し、照合することによ
り行なうことができる。
The flip-flop 5 is normally reset, but when it is set to a set state by the control signal e, it is timed by the frame pulse d in the register 6 and becomes the selection signal g of the selection circuit 7, which receives the signal from the storage circuit 8. You will be able to choose. At this time, since the memory circuit 8 is fed back with its own signal, the data in the memory circuit 8 is no longer updated, and the decoded TDM signal before the selection signal g is switched is repeatedly output to the output terminal 3. In other words, a still image will be displayed on the reception image monitor. The flip-flop 5 remains in the set state until the control signal e is turned off and no decoding error occurs in the interframe decoding circuit 4, and enters the reset state only after the No. 12 error disappears. Therefore, the output terminal 3 receives no errors. A signal that does not exist will be output. In addition, input terminal 2
The control signal e is a signal indicating that the transmission path is occupied by other signals (for example, facsimile data) instead of interframe encoded data, and the input terminal 1 is not receiving interframe encoded data. Further, decoding errors in the interframe decoding circuit 4 can be detected by, for example, calculating and comparing the respective parities of the local decoded signal of the interframe decoding circuit and the decoded signal of the interframe decoding circuit 4. .

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、記憶回路と選択回路を設
け、さらにフレーム間復号装置の入力端子にフレーム間
符号化データを受信していないことを示す制御信号を入
力し、この制御信号が入力しているときは選択回路が記
憶回路の信号を出力することにより、受信画モニターに
異常な信号を出力することを禁止(異常になる前の画面
を保持)することができる効果がある。
As explained above, the present invention provides a storage circuit and a selection circuit, and further inputs a control signal indicating that interframe encoded data is not received to an input terminal of an interframe decoding device, and this control signal is input to an input terminal of an interframe decoding device. When this happens, the selection circuit outputs the signal from the storage circuit, thereby having the effect of prohibiting the output of an abnormal signal to the receiving image monitor (maintaining the screen before the abnormality).

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明のフレーム間復号装置の一実施例を示す
図である。 1.2・・・入力端子。 3・・・出力端子、 4・・・フレーム間復号回路、 5・・・フリップフロップ、 6・・・レジスタ、 7・・・選択回路、 8・・・記憶回路。 第1図
FIG. 1 is a diagram showing an embodiment of an interframe decoding device of the present invention. 1.2...Input terminal. 3... Output terminal, 4... Inter-frame decoding circuit, 5... Flip-flop, 6... Register, 7... Selection circuit, 8... Memory circuit. Figure 1

Claims (1)

【特許請求の範囲】 フレーム間符号化されたテレビジョン信号を復号するフ
レーム間復号装置であって、 復号誤りを検出しうるフレーム間復号回路と、前記フレ
ーム間復号回路の復号TDM信号を1フレーム記憶しう
る記憶回路と、 前記フレーム間復号回路がフレーム間符号化データを入
力していないことを示す制御信号を外部から受けると第
1の状態になり、前記フレーム間復号回路で復号誤りが
検出されなかった場合に第2の状態になるフリップフロ
ップと、 前記フレーム間復号回路の復号信号と前記記憶回路から
の信号を受け、前記フリップフロップが第1の状態のと
き前記記憶回路からの信号を選択し、前記フリップフロ
ップが第2の状態のとき前記フレーム間復号回路からの
復号信号を選択し、前記記憶回路および外部に出力する
選択回路を有するフレーム間復号装置。
[Claims] An interframe decoding device that decodes an interframe encoded television signal, comprising an interframe decoding circuit that can detect decoding errors, and a decoded TDM signal of the interframe decoding circuit for one frame. When the interframe decoding circuit receives a control signal from the outside indicating that interframe encoded data is not input, the interframe decoding circuit enters a first state, and the interframe decoding circuit detects a decoding error. a flip-flop that is in a second state when the interframe decoding circuit is not in the first state; an interframe decoding device comprising a selection circuit that selects a decoded signal from the interframe decoding circuit when the flip-flop is in a second state, and outputs the decoded signal to the storage circuit and the outside.
JP61111422A 1986-05-14 1986-05-14 Inter-frame decoder Pending JPS62266990A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61111422A JPS62266990A (en) 1986-05-14 1986-05-14 Inter-frame decoder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61111422A JPS62266990A (en) 1986-05-14 1986-05-14 Inter-frame decoder

Publications (1)

Publication Number Publication Date
JPS62266990A true JPS62266990A (en) 1987-11-19

Family

ID=14560774

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61111422A Pending JPS62266990A (en) 1986-05-14 1986-05-14 Inter-frame decoder

Country Status (1)

Country Link
JP (1) JPS62266990A (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53139426A (en) * 1977-05-12 1978-12-05 Nec Corp Decoding device
JPS54148316A (en) * 1978-05-12 1979-11-20 Nec Corp Decoding device for television signals
JPS574677A (en) * 1980-06-10 1982-01-11 Fujitsu Ltd Error fault recovery and control system
JPS5741069A (en) * 1980-08-25 1982-03-06 Nippon Telegr & Teleph Corp <Ntt> Inter-frame encoding system
JPS58106928A (en) * 1981-12-21 1983-06-25 Nec Corp Decoding for interframe code
JPS59154830A (en) * 1983-02-23 1984-09-03 Nec Corp Forecast decoder between frames
JPS6120478A (en) * 1984-07-09 1986-01-29 Fujitsu Ltd Picture transmission control system

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53139426A (en) * 1977-05-12 1978-12-05 Nec Corp Decoding device
JPS54148316A (en) * 1978-05-12 1979-11-20 Nec Corp Decoding device for television signals
JPS574677A (en) * 1980-06-10 1982-01-11 Fujitsu Ltd Error fault recovery and control system
JPS5741069A (en) * 1980-08-25 1982-03-06 Nippon Telegr & Teleph Corp <Ntt> Inter-frame encoding system
JPS58106928A (en) * 1981-12-21 1983-06-25 Nec Corp Decoding for interframe code
JPS59154830A (en) * 1983-02-23 1984-09-03 Nec Corp Forecast decoder between frames
JPS6120478A (en) * 1984-07-09 1986-01-29 Fujitsu Ltd Picture transmission control system

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