JPS6226224B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a character pattern generation method suitable for facsimile and the like.

For example, in a facsimile machine, a character pattern generating device as shown in FIG. 1 has conventionally been used to generate a character pattern that is not written on a document on the sending or receiving side.

That is, 1 in FIG. 1 is a character memory, in which codes of character patterns to be generated are sequentially stored at predetermined addresses. 2 is a character generator which generates a character pattern in which one character consists of pixels of 8 columns x 9 rows, as shown in FIG. 2, for example, in accordance with the code output from the character memory. A row counter 3 designates a row address of a pixel pattern generated in the character generator 2, and causes the multiplexer 4 to output eight columns of pixel information corresponding to the row address. A column counter 5 specifies the column address of the 8 columns of pixel information taken out by the multiplexer, and causes the multiplexer to output predetermined 1-bit pixel information. 6 is a character counter and column counter 5
The addresses for the character memory 1 are sequentially updated by counting the offsets. Numeral 7 is a column multi-counter that divides the frequency of the main scanning clock a to determine the magnification in the main scanning direction of the character pattern to be generated, and 8 is a row multi-counter that similarly divides the frequency of the sub-scanning clock b. For example, if you want to double the character pattern generated by the character generator 2 in the main scanning direction and the sub-scanning direction, the counters 7 and 8 should be set to 2.
Set it to perform frequency division operation. 9 is a recording device on the receiving side, and a data compression device on the transmitting side.

It is now assumed that the character pattern "A" shown in FIG. 2 is generated in the character generator 2 by the character code output from the character memory 1 in accordance with the count value of the character counter 6.
Further, it is assumed that counters 7 and 8 are set to perform a frequency dividing operation by two, and that the counter values of counters 3 and 5 are both "0".

Therefore, multiplexer 4 has row counter 3.
Eight columns of pixel data corresponding to the 0 row designated by are taken out, this is further designated by the column counter 5, and the pixel information of the 0 column is output to the recording device 9.

The values of column counter 5 and row counter 3 are updated every time two main scanning clocks a and two subscanning clocks b are generated. On the other hand, the recording device 9 feeds the recording paper in the sub-scanning direction every time the sub-scanning pulse b is generated, and records the pixel information output from the multiplexer 4 at each main-scanning position in response to the generation of the main-scanning clock a. . As a result, the character pattern generated by the character generator is enlarged twice in each of the main and sub-scanning directions, and the recorded image shown in FIG. 3 is obtained.

Conventional character pattern generators are constructed in this way and are convenient for use in facsimiles when it is desired to generate characters that are not written on a manuscript, but they require a large number of counters, character generators, multiplexers, etc. This has disadvantages in that the structure is complicated and large, and the facsimile device is expensive.

SUMMARY OF THE INVENTION An object of the present invention is to provide a character pattern generation method capable of generating a predetermined character pattern with an extremely simple configuration, while eliminating the drawbacks of the prior art described above.

In order to achieve this object, the present invention is characterized in that a predetermined character pattern is generated using a microcomputer.

Hereinafter, an embodiment of the present invention will be described with reference to FIGS. 4 to 9, taking as an example the case where the present invention is applied to a facsimile machine using a microcomputer.

FIG. 4 shows an example of the configuration of a facsimile device to which the present invention is applied, in which 11 is a microprocessor (hereinafter referred to as μ-CPU), a read-only memory (hereinafter referred to as ROMA) ), a microcomputer consisting of random access memory (hereinafter referred to as RAM), 12 a scanner, 13 a printer, 14 a modem, and each device 12-14 connects to the microcomputer via each interface 15-17. bus (hereinafter referred to as BUS).

In the case of this embodiment, the facsimile device configured in this manner is further equipped with a read-only memory (hereinafter referred to as ROMB) in which pixel data of character patterns to be generated are sequentially stored at predetermined addresses. ) connected to the BUS.
Of course, if the storage capacity of ROMA is large, ROMB
It is also possible to store pixel data there without providing it.

In the ROMB, 8 columns or 8 bits of pixel data corresponding to the 0 row or line 0 of each character pattern to be generated are stored in sequence for each address for one line. Each corresponding pixel data follows, and in the same way, each pixel data up to line 9 is sequentially stored.

Normally, the μ-CPU executes the ROMA program, and at the time of transmission, the image information read by the scanner is taken in 8 bits at a time through the scanner interface 15, stored in the RAM, and after reading one scanning line of data, data compression is performed. The signal is then modulated by the modem 14 through the modem interface 17 and sent to the line. Also, when receiving, the modem 14
The data demodulated by the modem interface 17
After the data is read into the RAM through the printer interface 16 and reproduced, it is output to the printer 13 through the printer interface 16 for recording.

If the printer 13 is an electrostatic type or a thermal type, a large number of electrodes are lined up over the width of the main scan, and one line of recording is performed in one main scan, and the recording paper is fed in the sub-scanning direction. The configuration is such that recording of the next line is performed.

Next, when recording characters that are not written on the original on the recording paper, the μ-CPU reads out pixel data sequentially from a predetermined address in the ROMB based on the program stored in the ROMA, and printer 13 through 16
Output to. As a result, the pixel data of each character to be generated is outputted to the printer 13 one line at a time, and by recording this, the characters stored in the ROMB are reproduced on the recording paper.

By the way, if the characters stored in the ROMB were recorded as they were, the recorded characters would be very small because the recording bit area is small. For example, if the dot spacing is 1/8mm, one character is 7×
When formed with 9 dots, the width of the character is 7/8 mm, and even if the space between characters is set by 1 dot, the width of the character is only 1 mm at most.

Therefore, it is necessary to enlarge the pixel data taken out from the ROMB to a predetermined magnification and record it.

According to this embodiment, this character can be easily enlarged and recorded.

Now, let's take as an example the case where the pixel data "00010100" of row b ₁ in Figure 2 is enlarged by 2 times.
This will be explained with reference to FIG.

Figure 5 shows registers A, B, and C in μ-CPU.
This shows the state of pixel data that is stored sequentially as the program progresses, and the μ-CPU is
Execute the following program steps stored in ROMA.

(1) Read pixel data "00010100" from a predetermined address in ROMB and set it in register A.

At this time, arbitrary data is stored in registers B and C.

(2) Clear register B and set it to "00000000".

(3) Shift register A one bit to the left.

(4) If there is a carry from register A, add "11" to register B. If I don't have a chance, I won't do anything.

That is, in step (3), the pixel data stored in register A is checked bit by bit to see if it is ``1'' or ``0'', and in order to double the pixel data, if the balance is ``1'', it is checked as ``11'' or ``0''. In the case of "0", "00" is set to the lower two bits of the register. Therefore, when multiplying by n, n "1"
Or set it to "0".

In this case, as shown in Figure 5, the lower 2 bits of register B are set to ``00'' because the signal is ``0''.
However, since the value of register B at this time is originally "00000000", there is no need to do anything.

(5) Shift register B 2 bits to the left.

This prepares to put the next two bits into the lower two bits, and when multiplying by n, shift n bits to the left.

(6) Repeat steps (3) to (5) above two more times.

(7) Repeat steps (3) and (4) above once.

This means that steps (3) and (4) have been repeated four times. This is because register B consists of 8 bits, and when pixel data is expanded twice,
This is because by repeating steps (3) and (4) four times, pixel data that has been expanded exactly twice is stored in register B.

That is, at the end of step (7), the upper 4 bits of pixel data "00010100" are expanded twice and stored in register B.

(8) Clear register C.

(9) Shift register A to the left by 1 bit.

(10) If there is a carry from register A, add "11" to register C. I won't do anything unless I can do something again.

(11) Shift register C 2 bits to the left.

(12) Repeat steps (9) to (10) above two more times.

(13) Repeat steps (9) and (10) above once.

The operations in steps (8) to (13) are exactly the same as the operations in steps (2) to (7), except that the register B is replaced by C. As a result, the lower four bits of the pixel data are expanded twice and stored in register C.

As a result, the pixel data for one character is enlarged twice and stored in registers B and C, so if this is output to the printer 3 through the printer interface 16, it will be enlarged twice in the main scanning direction. Characters can be recorded.

In this way, each character is enlarged twice per line and sequentially output to the printer 13 and recorded.
When the recording of one line is completed, the recording of the next line is started. During this time, it goes without saying that the recording paper is fed in the sub-scanning direction while recording one scanning line.
Incidentally, enlargement in the sub-scanning direction is easily performed by repeatedly outputting the same one line of pixel data to the printer 13.

By the way, the method of generating a character pattern of a predetermined size using a microcomputer is not limited to the above embodiment, and other methods can also be used to generate a character pattern of a predetermined size.

Next, another embodiment of the present invention for this purpose will be described with reference to FIGS. 6 and 7.

First, in order to enlarge the characters twice, the columns a ₀ to a ₇ of the character pattern shown in FIG. 2 are sequentially rearranged every other column as shown in FIG. 6 and stored in the ROMB. Next, the μ-CPU is caused to sequentially execute the following programs stored in ROMA.

(1) Read the pixel data “00010010” on line 1 (now expressed as “d ₀ d ₄ d ₁ d ₅ d ₂ d ₆ d ₃ d ₇ ”) from a predetermined address in the ROMB and set it in register A. .

(2) Perform a logical product between "10101010" and register A so that only pixel data d ₀ to d ₃ of columns a ₀ to a ₃ remain, and store the result in register A again.

(3) Store the result in register B as well.

(4) Shift register A to the right by 1 bit.

(5) Take the logical sum of registers A and B and select register A.
Store in.

(6) Store the result in register B.

(7) Take out the pixel data again from ROMB and set it in register A.

(8) Perform the logical product of "01010101" and register A and store it in register A so that only pixel data d ₄ to d ₇ for columns a ₄ to a ₇ remain.

(9) Store the result in register C.

(10) Shift register A to the left by 1 bit.

(11) OR register A with register C and store it in register A.

(12) Store the result in register C.

By executing the above program steps, the pixel data shown in FIG. 7 is sequentially stored in each register A, B, and C of the μ-CPU in accordance with the step at that time, and finally, the pixel data shown in FIG. As in the case of the embodiment described above, pixel data for one line in the character pattern of FIG. 2 is doubled in the main scanning direction and stored in B and C.

As is clear from the above explanation, when enlarging a character twice, every other bit of pixel data is taken out to a register, and the logical OR is performed between that data and data shifted one bit to the right or left. Accordingly, pixel data can be easily enlarged twice. Therefore, if you want to multiply by n, then n-
By extracting pixel data every other bit, sequentially shifting the pixel data one bit to the right or left to create data, and calculating the logical sum of these data, it is possible to easily enlarge the data by n times.

For example, to triple the number, first rearrange the columns a ₁ to _{a 7} of the character pattern shown in FIG. 2 as shown in FIG. 8 and store them in the ROMB. In other words, column _a0 is simply a column provided to take up space and is not directly related to the actual character pattern generation, so ignore it and leave only columns _a1 to _a7 spaced by 2 bits. Arrange as shown. Next, have the μ-CPU execute the following programs stored in ROMA in sequence.

(1) Read pixel data "d ₃ d ₅ d ₁ d ₄ d ₆ d ₂ d ₅ d ₇ " from a predetermined address in the ROMB and set it in register A.

(2) Perform a logical product between "00100100" and register A and store it in register _{A so that only pixel data d 1 and d 2} of columns a 1 and a 2 remain.

(3) Store the result in register B as well.

(4) Shift register A to the right by 1 bit.

(5) Take the logical sum of registers A and B and select register A.
Store in.

(6) Store the result in register B.

(7) Shift register A to the right by 1 bit.

(8) Take the logical sum of registers A and B and select register A.
Store in.

(9) Store the contents of register A to the specified address _B1 in RAM.

By executing the above program steps, as shown in FIG. 9a, the pixel data is first
d ₁ and d ₂ are expanded three times and stored at address B ₁ in RAM. Then run the following program.

(10) As in step (1), set pixel data "d ₃ d ₅ d ₁ d ₄ d ₆ d ₂ d ₅ d ₇ " in register A.

(11) Perform the AND of “10010010” and register A and store it in register A.

(12) Store the result in register B.

(13) Shift register A to the right by 1 bit.

(14) Take the logical sum of registers A and B and store it in register A.

(15) Store the result in register B.

(16) Shift register A to the right by 1 bit.

(17) Take the logical sum of registers A and B and store it in register A.

(18) Store the contents of register A to the specified address _B2 in RAM.

By executing the above program steps, pixel data d ₃ d ₄ is generated as shown in FIG. 9b.
is enlarged three times, and the pixel data _d5 and 3 bits each are stored at address _B2 of the 2-bit RAM. Finally, run the following program.

(19) Similar to step (1), set pixel data "d ₃ d ₅ d ₁ d ₄ d ₆ d ₂ d ₅ d ₇ " in register A.

(20) AND "01001001" with register A and store it in register A.

(21) Store the result in register B.

(22) Shift register A to the left by 1 bit.

(23) Take the logical sum of registers A and B and store it in register A.

(24) Store the result in register B.

(25) Shift register A to the left by 1 bit.

(26) Take the logical sum of registers A and B and store it in register A.

(27) Shift the register one bit to the left.

(28) Store the contents of register A to the specified address _B3 in RAM.

By executing the above program steps, the pixel data d ₅ 1 bit and the pixel data d ₆ , d ₇ are expanded three times and stored in 3 bits each at address B ₃ of the RAM, as shown in Figure 9c. .

Therefore, by executing the program steps (1) to (28) above, three pieces of pixel data _d1 to _d7 are stored at addresses _B1 to _B3 in the RAM, respectively, as shown in FIG. 9d.
Since these pixel data are enlarged twice and stored, if these pixel data are sequentially output one bit at a time to the printer 13 through the printer interface 16, the characters will be enlarged three times in the main scanning direction and recorded, as described above. In addition, if the above pixel data is tripled,
Since the registers A and B have a capacity of 8 bits, the program steps are somewhat longer, but it goes without saying that the program becomes simpler if registers with a larger capacity are used.

As described above, according to the present invention, a character pattern to be generated is stored in a read-only memory in advance, and is sequentially retrieved line by line by a microprocessor, enlarged to a predetermined bit size, and output. Therefore, it is possible to easily generate a predetermined character pattern without having to provide a special configuration for generating character patterns as in the conventional case.

Furthermore, when the present invention is applied to a facsimile device using a microcomputer, the microcomputer can be used to generate a predetermined character pattern without requiring any special configuration. Becomes compact.

[Brief explanation of the drawing]

FIG. 1 is a block configuration diagram of a conventional character pattern generator, FIG. 2 is a character pattern diagram showing an example of characters to be generated, and FIG. 3 is a character pattern diagram showing an example of characters to be enlarged and recorded. FIG. 4 is a block configuration diagram of a facsimile device to which the present invention is applied, FIG. 5 is a data change diagram in each register for explaining the operation of an embodiment of the present invention, and FIG. Figure 7 is a diagram of the character pattern recorded in the memory when enlarging a character twice in the embodiment of the present invention, and Fig. 7 shows each register for explaining the operation of enlarging a character twice in another embodiment of the present invention. Figure 8 is a diagram of character patterns stored in memory when characters are enlarged three times according to another embodiment of the present invention, and Figures 9 a to c are diagrams of other embodiments of the present invention. Data change diagram in each register to explain the operation of enlarging a character by three times in the example, No. 9
Figure d is a state diagram of the resulting pixel data in memory. 11...Microcomputer, μ-CPU...
...Microprocessor, ROMA...Read-only memory, RAM...Random access memory,
12...Sukiyana, 13...Printer, 14...
Modem, 15...Scanner interface, 16
... Printer interface, 17 ... Modem interface, 18 ... Read-only memory.

Claims (1)

[Claims] 1. A ROM that stores character pattern information obtained by decomposing various characters into pixels of a plurality of predetermined bits in the main scanning direction and sub-scanning direction, and this ROM.
and a CPU that reads out predetermined character pattern information from the ROM.
A character characterized in that it is enlarged by n times and output by repeating (n-1) times the operation of inserting the obtained pixel data and calculating the logical sum of the pixel data obtained by shifting this pixel data by 1 bit. Pattern generation method.