JPS6226074U - - Google Patents

Info

Publication number
JPS6226074U
JPS6226074U JP11781685U JP11781685U JPS6226074U JP S6226074 U JPS6226074 U JP S6226074U JP 11781685 U JP11781685 U JP 11781685U JP 11781685 U JP11781685 U JP 11781685U JP S6226074 U JPS6226074 U JP S6226074U
Authority
JP
Japan
Prior art keywords
adjacent
lands
wiring board
printed wiring
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11781685U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11781685U priority Critical patent/JPS6226074U/ja
Publication of JPS6226074U publication Critical patent/JPS6226074U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
JP11781685U 1985-07-31 1985-07-31 Pending JPS6226074U (nl)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11781685U JPS6226074U (nl) 1985-07-31 1985-07-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11781685U JPS6226074U (nl) 1985-07-31 1985-07-31

Publications (1)

Publication Number Publication Date
JPS6226074U true JPS6226074U (nl) 1987-02-17

Family

ID=31003685

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11781685U Pending JPS6226074U (nl) 1985-07-31 1985-07-31

Country Status (1)

Country Link
JP (1) JPS6226074U (nl)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51132466A (en) * 1975-05-13 1976-11-17 Tokyo Purinto Kougiyou Kk Method of manufacturing independent lands on printed wiring board
JPS5550684A (en) * 1978-10-06 1980-04-12 Hitachi Ltd Printed circuit board

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51132466A (en) * 1975-05-13 1976-11-17 Tokyo Purinto Kougiyou Kk Method of manufacturing independent lands on printed wiring board
JPS5550684A (en) * 1978-10-06 1980-04-12 Hitachi Ltd Printed circuit board

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