JPS62257284A - Image pickup device - Google Patents

Abstract

PURPOSE:To improve the quality of a displayed video by providing a reference zero-level correction circuit to the pre-stage of a processing circuit part and preventing the circuit from being clamped to an erroneous reference-zero-level. CONSTITUTION:A video signal AS conducted from an image pickup element 1 to the reference-zero-level correction circuit 10 flows through a switch 11 during a horizontal scanning period, and is supplied to a video amplification circuit 5. The switch 11 comes in a cut-off state during the blanking period of the video signal AS, and a signal at the reference-zero-level position during the blanking period is conducted to a correction circuit main body 12, and the DC level at a prescribed position is sampled by a switch 13. The signal is smoothed by a smoothing capacitor 15 and supplied to the video amplification circuit 15 through a switch 14, and the DC level at the reference-zero-level position of the video signal AS is substituted. Thus a video signal AS' including no level-fluctured component at the reference-zero-level position is supplied to the processing circuit part 7. As a result, a level varied due to noise, etc. is not erroneously clamped.

Description

[Detailed description of the invention] [Purpose of the invention] (Industrial application field).

The present invention relates to improvements in imaging devices used, for example, for monitoring communication facilities.

(Prior art) In recent years, this type of imaging device uses a solid-state imaging device.
There is a device in which the video signal obtained by the imaging cable is maintained in a direct current coupled state and guided to a process circuit section for predetermined signal processing.

FIG. 3 shows an example of its configuration. This device first converts the impedance of the video signal output from the imaging probe 1 in the buffer circuit 2, then removes the clock component in the low-pass filter 3, and then After the impedance is converted again in the buffer circuit 4, it is amplified in the video amplification circuit 5, and then connected to the process circuit section 7 via the clamp capacitor 6.
to be introduced. Then, the process circuit section 7 pulse-clamps the reference zero level signal during the retrace period of the video signal AS to fix the level, and in this state, predetermined signals such as gamma correction, white clipping, addition of a synchronization signal, etc. The processing is performed and a composite video signal O8 is output. This type of device generally has a simple circuit configuration and can be miniaturized, making it very suitable for A.

However, such conventional imaging devices have the following problems. In other words, if the imaging probe 1 has a defect in a part of the element or is used under high temperature conditions, the reference zero level position during the retrace period of the video signal will cause noise-like or drift-like level fluctuations due to dark current unevenness. Sometimes. Therefore, if the base zero level is clamped at the position where this level fluctuation occurs, various signal processing will be performed using this incorrect level as the base, so when this video signal is displayed on a monitor, the screen In contrast, variations in brightness called horizontal line noise occurred, causing deterioration in video quality.

(Problems to be Solved by the Invention) As described above, conventional devices have the problem that the effects of defects in the image sensor and uneven dark current appear directly in the video signal, resulting in deterioration of image quality. The present invention focuses on this point, and even if a level fluctuation occurs in the reference zero level during the retrace period of the video signal, an erroneous J! The object of the present invention is to provide an imaging device that can prevent the image from being clamped to a quasi-zero level, thereby improving the quality of displayed images.

[Structure of the Invention] (Means for Solving Problems) The present invention provides a reference zero level correction circuit on the front side of the process circuit section j, and this circuit adjusts the retrace period of the video signal output from the imaging section. The DC level at the reference zero level position is sampled and smoothed, and this smoothed DC level is replaced with the DC level at the reference zero level position of the video signal.

(Function) As a result, even if the reference zero level during the retrace period of the video signal fluctuates due to a defect in the image sensor or uneven dark current,
This variation is absorbed and the reference zero level is maintained stably, and is therefore clamped in the process circuit section 2! The quasi-zero level is stable with little variation between each scanning line, and as a result, a high-quality display image free of horizontal line noise can be obtained.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the circuit configuration of an imaging device according to an embodiment of the present invention. In this figure, the same parts as those in FIG. 3 are given the same reference numerals and detailed explanations will be omitted.

A base zero level correction circuit 10 is provided between the buffer circuit 4 and the video amplification circuit 5. This basic zero level correction circuit 10 includes a first switch 1 inserted in a video signal path.
1. and a correction circuit main body 12 connected in parallel between both ends of the first switch 11. First, the first switch 11 is made of a transistor switch, for example, and becomes non-conductive during the retrace period of the video signal AS by a blanking signal BS generated from a blanking circuit (not shown). This prevents the reference zero level signal from passing through. On the other hand, the correction circuit main body 12 includes a second switch 13, for example, a transistor switch, which is operated by a clamp pulse C8 outputted from a clamp pulse generation circuit (not shown), and a transistor switch, for example, which is operated by an inverted signal D1 of the blanking signal BS. A third switch 1 consisting of a switch
4 are connected in series, and these switches 13.14
A smoothing capacitor 15 is connected between the connection point and the ground terminal. The second switch 13 is made conductive at a predetermined position during the retrace period of the video signal AS by the clamp pulse C8, thereby sampling the DC level at the reference zero level position during the retrace period. Further, the smoothing capacitor 15 smoothes and holds the DC level at the basic zero level position sampled by the second switch 13. Furthermore, the third switch 14 is made conductive only during the retrace period of the video signal AS by the inverted signal BS of the blanking signal BS, and during this period, the DC level held in the iR sliding capacitor 15 is reduced. It is output to the video signal path as a zero level.

With such a configuration, when a video signal is output from the image sensor 1, this video signal is introduced into the reference zero level correction circuit 10 after passing through the buffer circuit 2, the low-pass filter 3, and the buffer circuit 4. Ru. In the horizontal scanning period of the video signal AS, the first switch 11
The signal passes through as it is and is supplied to the video amplification circuit 5. On the other hand, the signal at the reference zero level position during the retrace period of the video signal AS is guided to the correction circuit main body 12, and first, the second switch 13 samples the DC level at a predetermined position as shown in FIG. 2, for example. Then, this sampled DC level is charged into the smoothing capacitor 15 and smoothed at that time. Therefore, even if noise N is superimposed on the reference zero level position of the video signal AS as shown in FIG. 2 due to a defect in the image sensor 1, for example, this noise N will be smoothed and absorbed by the smoothing capacitor 15. Ru. The DC level held in this smoothing capacitor 15 is then transferred to the video signal AS via the third switch 14.
The signal is supplied to the video amplification circuit 5 during the retrace period. That is,
The DC level at the reference zero level position of the video signal AS is replaced by a DC level that has been smoothed by the reference zero level correction circuit 10 with the smoothing capacitor 15 and level fluctuations have been absorbed. Therefore, in the process circuit section 7, there is no level fluctuation at the zero level position as shown in FIG.
As a result, no matter where the reference zero level position of the video signal AS' is pulse-clamped by the clamp circuit of the process circuit section 7, noise N and dark current unevenness may cause This solves the problem of erroneously clamping a fluctuating level.

As described above, in this embodiment, the DC level at the reference zero level position during the retrace period of the video signal AS is a DC level that has been smoothed and absorbed by the reference zero level correction circuit 10 to absorb level fluctuations such as noise and drift. Since the reference zero level is replaced with the level, there is no need to worry about clamping the level that fluctuates due to noise or drift when clamping the reference zero level in the process circuit section 7, and as a result, the variation in the reference zero level between each scanning line is reduced. In this way, predetermined signal processing can be performed on each scanning line with a substantially constant number of cases.

Therefore, it is possible to almost completely eliminate horizontal line noise appearing in a displayed image, thereby improving the quality of the image. Further, this embodiment has the advantage that it can be realized with an extremely simple circuit configuration that only includes three analog switches 11, 13, and 14 and a capacitor 15.

Note that the present invention is not limited to the above embodiments. For example, a reference power supply is provided in the reference zero level correction circuit, and this power supply supplies J! to the smoothing capacitor 15 prior to imaging scanning.
The battery may be charged with a voltage corresponding to a quasi-zero level. In this way, even if noise is superimposed on the reference zero level signal of the video signal obtained immediately after the start of the imaging scan, the level of this noise will be maintained in the smoothing capacitor (!) and the problem caused by this will be avoided. As a result, a camera power supply image can be obtained.Furthermore, in the above embodiment, each switch of the reference zero level correction circuit was constructed using a transistor switch, but it may also be constructed using other semiconductors such as a CMOS analog switch or FET. Furthermore, in the above embodiment, the blanking signal BS is generated from a blanking circuit (not shown) and the crank pulse C8 is output from a clamp pulse generation circuit (not shown). These signals may be obtained.In addition, the structure of the means for sampling or smoothing the DC level at the reference zero level position of the video signal, and the structure of the DC level at the reference zero level position of the video signal may be obtained. The configuration of the circuit for replacing the level, the processing contents of the process circuit section, etc. can be modified in various ways without departing from the gist of the present invention.

[Effects of the Invention] As described in detail below, according to the present invention, the J! , * A zero level correction circuit is provided, and this circuit samples and smoothes the DC level at the reference zero level position in the 91: line period of the video signal output from the imaging unit, and this smoothed DC level signal is By replacing the above-mentioned DC level with the DC level at the reference zero level position of the video signal, even if a level fluctuation occurs in the reference zero level during the retrace period of the video signal, an incorrect reference zero level will be set in the process circuit section. 12I! is an imaging device that can prevent clamping and thereby improve the quality of displayed images. can be provided.

[Brief explanation of drawings]

FIG. 1 is a schematic configuration diagram of an imaging device according to an embodiment of the present invention, and FIG. 2 is a signal waveform diagram used to explain the operation of the device.
FIG. 3 is a schematic configuration diagram of a conventional imaging device. 1... Image sensor, 2, 4... Buffer circuit, 3...
・Low pass filter, 5...Video amplification circuit, 6...
Clamp capacitor, 7... Process circuit section, 10
... Zero level correction circuit, 11... First switch, 12... Correction circuit body, 13... Second switch, 14... Third switch, 15... Smoothing capacitor , AS...video signal, BS...blanking signal, BS...inverted signal of blanking signal, C8...
Clamp pulse, AS'...Video signal after passing through the reference zero level correction circuit. Applicant's agent Patent attorney Takehiko Suzue Figure 1

Claims (1)

[Claims] In an imaging device in which a video signal obtained by an imaging section is connected in a DC-coupled state to a process circuit section, and the process circuit section clamps the reference zero level of the video signal during the retrace period to perform predetermined signal processing. , the DC level at the reference zero level position during the retrace period of the video signal is sampled and smoothed on the front side of the process circuit section, and the smoothed DC level is used as the DC level at the reference zero level position of the video signal. 1. An imaging device comprising a reference zero level correction circuit that replaces the reference zero level correction circuit.