JPS62256065A - 要求バツフア制御方式 - Google Patents
要求バツフア制御方式Info
- Publication number
- JPS62256065A JPS62256065A JP9823486A JP9823486A JPS62256065A JP S62256065 A JPS62256065 A JP S62256065A JP 9823486 A JP9823486 A JP 9823486A JP 9823486 A JP9823486 A JP 9823486A JP S62256065 A JPS62256065 A JP S62256065A
- Authority
- JP
- Japan
- Prior art keywords
- input
- output
- request
- shared memory
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9823486A JPS62256065A (ja) | 1986-04-30 | 1986-04-30 | 要求バツフア制御方式 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9823486A JPS62256065A (ja) | 1986-04-30 | 1986-04-30 | 要求バツフア制御方式 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62256065A true JPS62256065A (ja) | 1987-11-07 |
| JPH0525133B2 JPH0525133B2 (enExample) | 1993-04-12 |
Family
ID=14214269
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9823486A Granted JPS62256065A (ja) | 1986-04-30 | 1986-04-30 | 要求バツフア制御方式 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62256065A (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5432912A (en) * | 1988-08-31 | 1995-07-11 | Kabushiki Kaisha Toshiba | Method and channel apparatus for rearranging received data in order of generation of addresses |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5789127A (en) * | 1980-11-25 | 1982-06-03 | Nec Corp | Controlling system for input-output instruction |
-
1986
- 1986-04-30 JP JP9823486A patent/JPS62256065A/ja active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5789127A (en) * | 1980-11-25 | 1982-06-03 | Nec Corp | Controlling system for input-output instruction |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5432912A (en) * | 1988-08-31 | 1995-07-11 | Kabushiki Kaisha Toshiba | Method and channel apparatus for rearranging received data in order of generation of addresses |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0525133B2 (enExample) | 1993-04-12 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |