JPS62247608A - Field effect transistor frequency multiplying circuit - Google Patents

Abstract

PURPOSE:To eliminate unstableness of a multiplying circuit and to improve possibility of oscillations by putting an attenuating circuit between a field effect transistor FET and a basic wave trap circuit. CONSTITUTION:The component of frequency 2fO delivered from a drain D of an FET2 is applied to a load at a prescribed level and with high efficiency by a matching circuit 4 and an attenuator 5. A basic wave trap circuit 3 functions as an open stub of lambdag/2 to the 2fO component and therefore the imped ance is infinite in case the open stub is viewed from a point (a). Thus the circuit 3 gives no influence. However, the 2fO component is reflected again by the drain D and then returns to the drain D after undergoing double attenuation in a reciprocating movement owing to presence of the attenuator 5. In this case, the unstableness of an FET frequency multiplying circuit is eliminated together with improvement of possibility of oscillations as long as the reflection coefficient is smaller than one when the FET2 is viewed from e gate G.

Description

[Detailed Description of the Invention] [Summary] In a field effect transistor frequency multiplier circuit, an attenuator is inserted between the output side of the field effect transistor and the fundamental wave trap circuit, and the reflection coefficient as seen from the gate side of the transistor is calculated. is made smaller than 1 so that the multiplication operation can be performed stably.

[Industrial application field]

The present invention relates to improvements in field effect transistor frequency multiplier circuits.

Generally, when a highly stable and high frequency wave is required, the output of a low frequency but highly stable oscillator is multiplied by a frequency multiplier circuit (hereinafter abbreviated as the multiplier circuit) to generate a wave of the desired frequency. I am getting .

Conventionally, microwave diodes such as variable capacitance diodes and step recovery diodes were used as multiplier circuits, but recently gallium arsenide field effect transistors (hereinafter abbreviated as PUT) have been used instead. .

The advantage of using PET is expected to be multiplication gain.

Although it has characteristics such as good input/output isolation and the possibility of wideband operation, it is necessary to operate stably as a multiplier circuit.

[Conventional technology]

FIG. 5 shows a circuit diagram of a conventional example.

The operation shown in FIG. 5 will be explained below by taking a doubling operation as an example.

In the figure, a fundamental wave of frequency fo (hereinafter abbreviated as fO) inputted from terminal IN passes through a matching circuit l composed of an open stub 11 of a microstrip line, and is applied to the gate G of FET 2 whose source S is grounded. Added. The gate bias voltage of FET 2 is pinch-off or O
Since the output wave is located near v, an output wave containing a relatively large amount of doubled (hereinafter abbreviated as 2fo) components can be taken out from the drain D, but the fundamental wave trap circuit 3 transfers the fo acid component of the output wave to the FET side. It is totally reflected and multiplied by the nonlinear characteristics between the drain and low source 3 of the FET to extract the 2fo component, and at the same time suppresses the fO acid component output to the load.

On the other hand, the 2fo component is generated by the fundamental wave trap circuit 3. The signal is efficiently extracted through a matching circuit 4 for the 2FO component configured with an open stub, etc., adjusted to a predetermined level by a resistance attenuator 5, and output to a load.

The fundamental wave trap circuit 3 is constituted by an open stub with a length of λg/4 (λg is the wavelength) so as to totally reflect the fo, and is placed before or after the matching circuit 4. or,
The resistive attenuator 5 also has the role of alleviating the influence of impedance mismatch with the circuit connected to the next stage.

[Problem that the invention seeks to solve]

As mentioned above, fo output from the drain of FET 2
Since the acid component fundamental wave is totally reflected by the trap circuit 3, when the stability coefficient K of the FET used is smaller than 1 with respect to the fo acid component, the reflection coefficient when looking from the gate electrode to the FET side becomes larger than 1. There is a problem that the multiplier circuit may become unstable or oscillate.

In addition, the stability coefficient is S listed in the FET catalog.
This can be determined from the parameters, and when K > 1, no matter what kind of impedance is connected to the input/output side of the FET, it will not oscillate and will operate stably, and when K < 1, the FET will operate stably. Indicates that it becomes unstable when a specific impedance is connected on the input/output side.

[Means for solving problems]

As shown in Figure 1, the above problem is caused by the frequency fo of the input wave.
A field effect transistor 2 that multiplies the output of the field effect transistor, a matching circuit 4 that efficiently extracts the desired wave from the output of the field effect transistor, an attenuator 5 that attenuates the output of the matching circuit to a predetermined output, and an output of the attenuator. This problem is solved by the field effect transistor frequency multiplier circuit of the present invention, which includes a fundamental wave trap circuit 3 that blocks passage of the fundamental wave component.

[Effect]

In the present invention, an attenuator 5 is inserted between the fundamental wave trap circuit 3 and the FET 2, and the f is reflected back to the drain of the FET.
o The acid component power was attenuated to prevent the multiplier circuit from becoming unstable.

That is, the fo acid component of the FET output wave is totally reflected by the fundamental wave trap circuit 3 and returns to the output side of the FET 2, but in this process it passes through the attenuator 5 twice, so the F
By determining the amount of attenuation so that the reflection coefficient viewed from the ET side is smaller than 1, the instability of the FET frequency multiplier circuit and the possibility of oscillation are improved.

As mentioned above, this attenuator also has the function of improving impedance mismatch with the circuit connected to the next stage and adjusting the output level of the desired multiplied wave, so these must also be satisfied. .

〔Example〕

FIG. 2 shows a circuit diagram of an embodiment of the present invention, and FIG. 3 shows an implementation diagram of FIG. 2. Note that the same symbols indicate the same objects throughout the drawings, and the DC supply circuit is omitted. The operation of the circuit shown in FIG. 2 will be explained below using the double multiplication operation as an example, as in the conventional example.

In the figure, 2f output from the drain of FET 2
The o component is connected to a matching circuit 4 and an attenuator (for example, a resistive attenuator) 5.
Due to the efficiency, the power is output to the load at a predetermined level.

Here, since the fundamental wave trap circuit 3 becomes an open stub of λg/2 for the 2fo component, the impedance when looking at the open stub from point a becomes infinite and is not affected by this trap circuit.

However, the fo acid component is reflected back to the drain here, but since there is an attenuator 5 in between, this amount of attenuation is doubled in the round trip.
It is attenuated twice as much and returns to the drain.

At this time, if the reflection coefficient seen from the gate to the FET side is smaller than 1, the instability and possibility of oscillation of this FET frequency multiplier circuit will be improved.

FIG. 3 shows the circuit of FIG. 2 constructed with microstrip lines on a dielectric substrate, and the numbers marked with "" correspond to the parts of FIG. 2 without the "°".

Further, 6 is a DC blocking capacitor, and 7 is a dielectric substrate.

8 is a through hole.

FIG. 4 is an implementation diagram of another embodiment of the present invention.
The center frequency of the fundamental wave trap circuit 3 part in the figure is 'lf.
o is replaced with an 8° bandpass filter. In this case as well, the fo acid component is reflected by this filter 8' and becomes PE.
Since it is returned to the drain of T, the same operation as above is performed, but harmonic components other than 2fo are removed here, so
The ratio between the 2fo component and other unnecessary components in the output of the FET frequency multiplier circuit becomes extremely good.

〔Effect of the invention〕

As described in detail above, according to the present invention, there is an effect that the instability and possibility of oscillation of the FET frequency multiplier circuit are improved.

[Brief explanation of drawings]

Fig. 1 is a principle block diagram of the present invention, Fig. 2 is a circuit diagram of an embodiment of the present invention, Fig. 3 is an implementation diagram of Fig. 2, and Fig. 4 is another embodiment of the present invention φ times F11 times. FIG. 5 shows a circuit diagram of a conventional example. In the figure, 2 is a field effect transistor, 3 is a fundamental wave trap circuit, 4 is a matching circuit, and 5 is an attenuator. Figure $3 [

Claims (1)

[Claims] A field effect transistor (
2), a matching circuit (4) that efficiently extracts the desired wave from the output of the field effect transistor, an attenuator (5) that attenuates the output of the matching circuit to a predetermined output, and a A field effect transistor frequency multiplier circuit comprising a fundamental wave trap circuit (3) that blocks passage of the fundamental wave component.