JPS62224980A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a high performance P-I-N diode with small frequency dispersion with a high yield by a method wherein one conductivity type impurity atoms are diffused into one of trenches formed in specific Si by anisotropic chemical etching and the other conductivity type impurity atoms are diffused into the other trenches. CONSTITUTION:One conductivity type impurity atoms are diffused into one of trenches 3 surrounded by (111) faces which are so formed by anisotropic chemical etching as to be parallel to each other and to make right angles with a ma.in surface of Si in the Si which has a resistivity not less than 50OMEGA-cm and (110) face as a main surface and the other conductivity type impllrity atoms are diffused into the other trench. For instance, a protective film 2 sv!ch as a silicon oxide film is formed on the Si substrate 1 and a rectangular part of the protective film 2 is removed and the exposed substrate is etched by anisotropic chemical solution of caustic alkali system or the like to form a rectangular parallelepiped trench 3 whose side walls are surrounded by (111) faces and N-type impurity is diffused into the trench. After that, etching resistant films are provided on the inner walls of the trench and another trench of the same shape is formed with its longer side being parallel to the longer side the trench 3 and with a distance corresponding to the thickness of a required high resistance wall 5 leaving between the two trenches and P-type impurity is diffused into the other trench.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a PIN junction diode with low frequency dispersion and high precision.

(Prior Art) In recent years, the applications of electromagnetic waves in the microwave region have been declining in large numbers and crowds. With the development of artificial satellites, communication, which has traditionally been an application, has come to include many areas such as communication, broadcasting, weather, exploration, and control, and with the advancement of solid-state technology, radar has also become smaller, lighter, and more sophisticated. Significant. As a result of the progress of such conventional applications, it has become noticeable that they are spreading to civilian needs, which have not been applied much in the past. For example, satellite broadcasting, security guarantees, traffic safety such as prevention of rear-end collisions, detection control of automatic doors, measurement of speed meters, etc. are increasing.

These microwave devices are composed of a combination K of a transmitting/receiving antenna, a main oscillator, a local oscillator, a modulator, a phase shifter, a switch, a variable attenuator, a mixing demodulator, a high frequency amplifier, etc. In recent years, many microwave devices have been made using compound semiconductors, and in general, the electron mobility in compound semiconductors is 5 to 6 times higher than that of St. ing. However, in compound semiconductors, the recombination lifetime of minority carriers is a tenth to a hundredth shorter than that of Si, so in devices where the long recombination lifetime of minority carriers is an important factor, St is It is used. For example, PIN diodes used as phase shifters, switches, variable attenuators, or limiters in the microwave 7-channel range are better made of St than the compound ``1''.
- Better performance than when made with conductors.

One reason for this is that the recombination lifetime of minority carriers is long, as already mentioned, but in addition to that, Si is a single element semiconductor and it is easier to make it highly pure, that is, with a low residual impurity density, compared to compound semiconductors. In a state where minority carriers are not injected, the frequency that can be considered as a dielectric material is expanded to a frequency lower than that of a compound semiconductor.

Furthermore, if the residual impurity density of the compound semiconductor is at the same level as that of Si, then the electron density f: Nr (
cm-3), the electron mobility is μ8c, and the electron charge is e, then the resistivity of the compound semiconductor is ρ. On the other hand, the dielectric dispersion frequency fdc of this compound semiconductor is the relative permittivity of the physical conductor, ε. is the dielectric constant of vacuum.

At frequencies higher than the dielectric dispersion frequency, compound semiconductors exhibit strong dielectric properties, and conversely, at frequencies lower than the dielectric dispersion frequency, their resistive properties become stronger. Compound semiconductors used in microwave devices generally have higher electron mobility than Si, so at the same residual impurity density, the resistivity ρC can be seen from equation (1).
becomes smaller. Therefore, as shown in equation (2), with the same residual impurity density, dielectric properties are first exhibited in a higher frequency range than that of Si. Furthermore, unlike St, which is a semiconductor consisting of a single element, compound semiconductors generally contain at least two or more elements, such as Si, as seen in GaAs, which is the most widely used. Dissociation pressure is high and one element is easily lost, which makes it easy to create residual defects. For this reason, the minority carrier life tends to be shortened. Furthermore, the amount of residual impurities unintentionally introduced during crystal growth is more than 1000 times greater than that of high-purity Si. As a result, in general compound semiconductors, the dielectric dispersion frequency becomes too high, making it difficult to use as a PIN diode.

On the other hand, Si is currently the material with the most advanced purification technology, and it is easy to obtain Si with a residual impurity density of 1012/CC or less. Furthermore, it is relatively easy to vary the minority carrier lifetime from several microseconds to about 1 millisecond. Therefore, it is clear that Si, rather than compound semiconductors, is the most suitable material for PIN diodes, and Si is often used in practice.

(Problems to be Solved by the Invention) Next, the features of the present invention will be explained in detail by referring to methods for manufacturing Si PIN diodes and describing their drawbacks.

First, the simplest method for manufacturing a St PIN diode is to use a single-layer Si substrate with high resistivity, i.e., low impurity density, and diffuse N-type impurities from one main surface and P-type impurities from the opposite main surface. The ideal impurity distribution is as shown in FIG. 4, where the thickness of the central layer is set to a desired value.

The drawback of this structure is that both the P-type impurity and the N-type impurity gradually decrease in the direction of one layer, as shown in the impurity distribution of the PIN diode formed by deep diffusion as shown in FIG. This is because, as already shown in equation (2), the dielectric dispersion frequency of a semiconductor is determined by the product of permittivity and resistivity, but when the impurity distribution changes gently as shown in Figure 5, that is, the resistivity changes gradually. This means that the dielectric dispersion frequency also changes depending on the location. This kind of PI
Therefore, since the capacitance and series resistance of the PIN diode vary depending on the frequency used, the N diode exhibits extremely inconvenient characteristics, especially in microwave circuits that require matching over a wide band. Therefore, a PIN diode having such a structure is generally not used for microwave applications, but is used only for high voltage rectifiers and the like.

Various manufacturing methods have been devised to overcome this drawback. For example, as shown in FIG. 6, a low impurity density region 62 is grown to a desired thickness by vapor phase epitaxial method on a high impurity density, ie, low resistivity N type St substrate 61, and a P type impurity region is grown from the growth surface side. In this method, 63 is diffused shallowly to form a PIN diode. A drawback in this case is that when a high resistivity layer is vapor-phase grown on a low resistivity substrate 61, a so-called auto-doping region 621 is inevitably generated in which impurities evaporated from the substrate are incorporated into the grown layer. For this reason, even if the P-type diffusion region 63 is formed as shallowly as possible to reduce the frequency dispersion effect of this region, auto-transmission can occur within one layer.
Frequency dispersion associated with impurity distribution caused by doping is accompanied by an unavoidable drawback. Yet another method is the seventh
As shown in the figure, a low-resistivity N-type layer 72 is deposited thickly by epitaxial growth on a high-resistivity substrate 71, the high-resistivity layer is polished to a desired thickness, and then a P-type layer is deposited as shallowly as possible. In this method, 73 is diffused to form a PIN junction. In the PIN junction formed by this method, the outward diffusion region from the low-resistivity N-type growth layer shown in [71] is smaller than in auto-doping, and the P-swelled diffusion layer is sufficiently shallow, resulting in the highest frequency dispersion in terms of performance. It becomes a small PIN diode.

However, this manufacturing method has the following drawbacks. In other words, in the vapor phase growth method, the crystal growth rate is low, so 10
It takes a long time to grow to a thickness of 0 microns or more, and the difference in lattice constant between the high resistivity layer and the vapor-grown low-resistivity layer causes voids and cranks in the vapor-grown layer. There are some easy drawbacks. Another major drawback is that the high-resistance layer must be polished to the final required thickness, and it is extremely difficult to polish the layer parallel to the substrate due to the warpage of the wafer caused by the difference in lattice constants. be.

The present invention has been made to overcome the deficiencies of the above-mentioned PIN diode manufacturing method.

(Means for solving the problem) First of all, what is important in terms of the performance of the PIN diode is the steepness of the impurity distribution, as already detailed, and the second important thing is the impurity distribution between the P-type layer and the N-type layer1. It is the thickness of the layer. The present invention makes it possible to form one layer to a desired thickness with good control using an anisotropic chemical etching method, and to form a P-type layer and an N-type layer as steep as possible. The present invention relates to the structure of a PIN junction and its manufacturing method.

(Example of the invention) FIG. 1 is an explanatory diagram showing one embodiment of the present invention.

As shown in Figure 1, a silicon oxide film, a silicon nitride film, or an equivalent function is applied to a Si substrate 1 having a resistivity of at least 50 ohm-cm or more and a (110) plane as its main surface. A protective film 2 is formed, and the protective film is removed in a rectangular direction parallel to the method in which the side walls finally form a (111) plane using a well-known photolithographic technique. If corrosion is caused by an anisotropic chemical solution such as a mixed solution of water, chemical corrosion will progress rapidly in the 11o> direction and hardly progress in the 111> direction, so as shown in Figure 1, the side wall (11
A rectangular parallelepiped groove portion 3 surrounded by 11 planes can be formed. Since Sl is exposed in this groove and the substrate surface is covered with a protective film, the N-type impurity is diffused into this groove by using this corrosion-resistant coating as a trench diffusion protective film. P
FIG. 2 is a cross-sectional view of FIG. 1 taken perpendicularly to the main surface in the direction of a-a', without interfering with the initial diffusion of the shaped impurities. In the figure, the same reference numerals as in FIG. 1 indicate the same or corresponding parts. Using the corrosion-resistant coating 2 as a diffusion protection film, N formation in the groove portion 3 performs P-type diffusion to form a diffusion region 4. At this time, the substrate 1 has a high resistance. A blood-corrosive film similar to that described above was also provided on the inner wall of the rear groove, and the photo-etching technique was again used to create a film with a length corresponding to the thickness of the high-resistance layer so that the long sides were parallel to each other. Grooves of the same shape are formed leaving a distance.

FIG. 3 shows a sectional view of a semiconductor device according to an embodiment of the present invention described above. By diffusing an impurity of a conductivity type opposite to that of the impurity diffused into the groove previously formed into the hole opened later, for example, if the region 41 diffused earlier is made into a P-type head region, the region 41 is diffused later. Region 42 is an N shadow region, and region 5 is separated by two parallel (111) planes in the middle.
is a high resistivity layer, that is, one layer. In this case (1111 plane is a Nagisa dense plane, it has the advantage that its distance can be controlled with the precision of photoetching by anisotropic etching, and parallelism is guaranteed by the anisotropy of the crystal. Also, the thickness of one layer is Even if it is made sufficiently thin, the impurity distribution can be made as steep as possible.
It can be made sufficiently thin to a thickness that is difficult to make by polishing or the like. After that, an ohmic contact is established in the groove using a technique such as sputtering, and a wiring electrode is provided on the protective film 2 to connect the PI.
High performance can be achieved while forming N diodes with high precision and high yield. The remaining high resistance region surrounding the P, IN junction serves as a protection for the PIN diode and at the same time facilitates handling as a support base for the fine PIN diode. The capacitance characteristic of the PIN diode is that as long as the one-layer region sandwiched between the P shadow region and the N shadow region is sufficiently narrow compared to the other region (■), the electric flux will be concentrated in the one-layer region of region 5. It will not affect you at all. Furthermore, it has been found that the influence of minority carriers diffused in areas where the electric field is weak can be sufficiently reduced by introducing defects into the surface of the remaining single layer by sandblasting, plasma treatment, or the like.

(Effects) As is clear from the above explanation, the semiconductor device manufacturing method using anisotropic chemical corrosion according to the present invention makes it possible to obtain high-performance PIN diodes with low frequency dispersion and high yield. Become.

[Brief explanation of drawings]

FIGS. 1 and 2 are explanatory diagrams showing one embodiment of the present invention, and are a perspective view and a sectional view. FIG. 3 is a sectional view of the semiconductor device of the present invention, FIG. 4 is an impurity distribution diagram of an ideal MN diode, and FIGS. 5 to 7 are impurity distribution diagrams of conventional PIN diodes. DESCRIPTION OF SYMBOLS 1... Substrate, 2... Protective film, 3... Groove, 4,41
．． 42...Diffusion area, 5...1 layer area. Patent applicant New Japan Radio Co., Ltd. Figure 1 Figure 3 - Distance Figure 4 63 - Distance Figure 6 - Distance Figure 5 - Distance Figure 7

Claims (1)

[Claims] (1) Formed by anisotropic chemical etching so as to be perpendicular to the main surface and parallel to each other in Si having a resistivity of at least 50 Ω-cm and a {110} plane as the main surface. A semiconductor device characterized in that impurity atoms of one conductivity type are diffused into one groove surrounded by a {111} plane, and impurity atoms of an opposite conductivity type are diffused into the other groove.