JPS62217496A - Eeprom writing system - Google Patents

Abstract

PURPOSE:To easily write data in plural EEPROMs in a short period of time by holding the write data in fast memories temporarily and then assigning successive addresses to the respective EEPROMs in order. CONSTITUTION:The write data are written temporarily in fast memories FF1, etc., corresponding to respective EEPROMs (Electrical Erasable Programmable ROM) temporarily. Successive addresses are specified for the respective EEPROMs MEM1, etc., through address buses and a control signal is supplied to a control circuit CONT. Then, the CONT supplies selection pulses to the respective EEPROMs at a time through respective chip select and write enable terminals CSWE to write the data simultaneously in a short period of time.

Description

[Detailed Description of the Invention] [Summary] In a method for writing data to EEFROM,
The data to be written to multiple EEFROMs is written and held in each high-speed memory, and then each EEFROM is
The EPROMs are writable so that data held in the corresponding high speed memory is written to each EEFROM. As a result, data is written to each EEFROM at the same time, and therefore, data is written to each EEFROM simultaneously.
Even writing to M can be done in a short time.

Furthermore, at this time, specify the address when writing data to each EEFROM for each El! This is done by sequentially allocating a continuous number of addresses to the PROM, thereby facilitating address designation during data writing and reading.

[Industrial application field]

The present invention is [EEFROM ([!1 electrical
[! rasable programmable ROM
), and particularly relates to an F,RPROM writing method that can significantly shorten the time required for writing.

REFROM is an electrically erasable and writable read-only memory (ROM) that is often used to store fixed data such as programs, but the time required to write data in El!FROM is , is desired to be as short as possible.

[Conventional technology]

Conventionally, when writing to RRPROM, first one El! to be written is written. Generally, a method is used in which writing is performed by specifying FROM, applying the necessary program voltage for the write operation, applying write data one word at a time, and applying a write pulse with a predetermined timing. It is being

[Problem that the invention seeks to solve]

However, with the conventional writing method, the writing time is EEPI? This increases with the number of OMs, and when the number of EEFROMs to which data must be written is large, the time required for writing becomes extremely long, resulting in inefficiency.

[Means for solving problems]

The present invention aims to solve the problems of the prior art, and is intended to solve the problems of the prior art. PI? OM (101)
- The system for writing data has a basic configuration as shown in FIG.

102 is a high-speed memory, which includes a plurality of EEPROMs (
101) respectively.

After the write data is temporarily stored in the high-speed memory (102), each EEPI? The OM (101) is enabled for writing, and the data held in the corresponding high-speed memories (102) is written to each EEPROM (101) all at once.

Furthermore, each 1' at this time! The write address in the EFROM (101) is specified by assigning a consecutive number of addresses.

[For production]

Multiple [! The data to be written to the EPROM (101) is written and held in each high-speed memory (102), and then each EEFROM (101) is made writable and the data held in the corresponding high-speed memory (102) is written. Since data is written to each ERPROM (101), data is written to each EEPROM (101) at the same time.
Even writing to is done in a short time. Furthermore, each EIl at this time! Since the write address in the PROM (101) is specified by assigning a consecutive number of addresses, address assignment during writing and reading becomes easy.

〔Example〕

Figure 2 shows the EF! of the present invention! This shows the configuration of an embodiment of the PROF writing method, in which MEM 1, ME
M2.

-, MBM16 are the write target P R'O respectively.
It is M. FFI, FF2. -, FF16 is a bidirectional latch and forms a high-speed memory. Further, C0NT is a control circuit that controls writing.

In FIG. 2, at the time of energized reading or writing, high-speed memory PF1. FF2. -, while latching data to FF16, outputting PROM MBM1,
For any one of MBM2,-, MPM16, control surface T71I! A selection pulse is sent from IC0NT to its chip select and write enable terminal C5WE.
give to

As a result, reading or writing to one target EEFROM is performed.

[! When trying to write a large amount of data to EFROM at the same time, first write the high-speed memory FP'l, FF
2°-, respectively for FF16 [! EPROM M
Write data corresponding to EM1, liver M2゜-., and MBM16 are written, and the respective BEPROMs MEM1 and MBM2 are written via the address bus.
, -, MP specifies the address to be written to the old 6, and sends the control signal con to the control circuit C0NT.
When t is given, each EEPROM is
M+! For M 1 , M 2 , -, and ME old 6, selection pulses are simultaneously applied to their respective chip select and write enable terminals C5WH, thereby 164 BEPROM livers M 1 , MII2, -.

Data is written to l16 all at once.

In this case, the addresses are specified so that the upper three bits of the four-bit address in each EEFROM are commonly specified, and the lower one bit is a continuous number.

For example, when giving address 0000 to MEM 1, M
The address 0001 is given to EM2, and the address is increased sequentially thereafter, and 0OOF is given to l16. Next.

Therefore, the lower 1 bit of the address in each EEFROM is set to 1! I! By determining the number corresponding to the PROM number and giving the lower 3 bits AO to 83 of the 16-bit address signal on the address bus to the control circuit C0NT, the chip select and write enable signals are sent to the EEFROM of each number. Let it be given to you. High-speed memory FF1. FF2. -, FF1
The write signals for each of 6 are also for each anal PI with the same number? A control circuit (:ONT) corresponds to the OM, and data is written as described above.

By assigning addresses in this way, for example, when performing initial program loading, each E
Data at consecutive addresses can be written to EPROM in one write, and when reading data, a series of data can be read out continuously using consecutive addresses. This has the advantage of making it easier to generate addresses.

〔Effect of the invention〕

As explained above, l! of the present invention! I! Pl? According to the OM writing method, multiple El'! Since the write data for FROM is temporarily held in each high-speed memory and written to multiple ERFROMs at the same time, E[! Even if the number of FROMs is large,
The time required for writing is significantly reduced compared to the conventional case of writing one by one. Furthermore, since writing is performed at a continuous number of addresses for a plurality of EFPRO'Hs, writing and reading addresses can be easily generated.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the basic configuration of the present invention, and FIG. 2 is a diagram showing an embodiment of the present invention. MEM 1, MUM 2, -, ? IEM16:
El! PROMFFI, FF2. -, ppie:
High-speed memory C0NT F control circuit

Claims (2)

[Claims] (1) In the method of writing data to EEPROMs (101), high-speed memories (102) are provided for each of the multiple EEPROMs (101), and after the written data is temporarily held in the high-speed memory (102), each An EEPROM writing method characterized by making an EEPROM (101) writable and writing data held in each corresponding high-speed memory (102) to each EEPROM (101) all at once. (2) The EEPROM writing method according to claim 1, wherein the designation of an address when writing data to each EEPROM is performed by sequentially allocating a consecutive number of addresses to each EEPROM.