JPS62216341A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To all fill to flatten isolation grooves irrespective of wide or narrow width by forming a mask layer on part of a filler layer deposited in the wider groove, then etching the entire surface of the filler layer, and further covering a recess remaining in the wide groove with the filler layer to flatten it. CONSTITUTION:Grooves 2, 3 are opened according to an isolation region pattern on a silicon substrate 1. Then, an insulator 4 like CVD SiO2 is deposited on the entire surface, and a resist pattern 5 for an etching mask is formed on the insulator 4 in the wide groove 3. A resist pattern may have relatively rough accuracy for covering the center except the edge of the groove 3. Then, when the SiO2 film 4 is etched by RIE to remove a resist, the narrow groove 2 is substantially flatly buried, and the recess remains in the groove 3. Thereafter, a coating insulator 6 is spin coated, baked, and etched to completely removed the insulator 6 on the flat surface. Then, the isolation groove is filled substantially completely to be flattened by the insulator.

Description

[Detailed Description of the Invention] [Summary] The present invention relates to the so-called trench isolation technology that uses grooves in the insulating portion #, and in the case of relatively wide isolation side waves, the grooves are not formed in the same process as narrow grooves. In order to solve the problem of flattening with a deposited filling, the present invention is applied to a filling layer in a wide trench. Concerning the improvement of the structure.

Integrated circuits require an isolation structure to separate elements, but in order to promote higher integration density, narrow etching grooves (trenches) are dug into the substrate and insulators and polysilicon are etched. So-called trench isolation technology, which performs insulation isolation by deposition and filling, is being put into practical use.

The feature of trench isolation is that the isolation width can be narrowed.

[Conventional technology]

In trench isolation technology, the trench is filled with a deposited filler such as a sufficiently thick polysilicon layer or silicon dioxide layer, and then the deposited layer is removed from the flat surface area by etching the entire surface, and the filler is placed only inside the trench. The surface is flattened. In this method, the filling material remains in the narrow trench, but the filling material is removed in the central part of the wide trench during the etching of the entire surface, resulting in a problem that no isolation insulating layer is formed.

[Problem that the invention seeks to solve]

The present invention aims to solve the above-mentioned problems in the conventional technology, namely, that in trench isolation technology, it is not possible to leave an isolation insulator with a flat surface in a relatively wide isolation region. shall be.

[Means for solving problems]

In the present invention, after forming a mask layer on a part of the filling layer deposited in the wider groove, etching the entire surface of the filling layer, and then removing the filling layer from the recesses remaining in the wider groove. It is deposited and flattened.

[For production]

According to the present invention, the filling layer can be left over a wide area in the wide groove by using a mask with rough precision, and the narrow recesses remaining in the gap can be filled by adding a filling and flattening process. Since the surface can be almost completely flattened, isolation regions of various widths can be completely filled with fillers.

〔Example〕

FIG. 1 is a diagram showing the manufacturing process of an embodiment of the present invention. First, as shown in (a), grooves 2.3 having a depth of 0.5 μm are formed in the silicon substrate according to the isolation pattern. The well-known RIE may be used to form the grooves.

Next, as shown in (b), an insulator 4 such as CVD 5LOZ is deposited to a thickness of 0.5 Am on the entire surface, and a resin wafer for an etching mask is deposited on the insulator 4 in the wide groove 3.
-y 5 Fully formed. The resist pattern may be of relatively rough precision and cover the central portion of the wide groove 3 except for the edge portion.

Next, 5iOt4 is etched by RIE to a thickness of 0.5 μm and the resist is removed, resulting in the structure shown in (e). The narrow groove 2 is filled almost flat, and a recess remains in the wide groove 3.

Next, a coated insulator (spin-on coating) 6 is applied to form the structure shown in (d). Furthermore, after baking, etching is performed to completely remove the coated insulator 6 on a flat surface (
In the structure e), the isolation groove is almost completely filled with an insulator and is flattened.

After this, a functional element forming process such as a gate oxidation process is carried out to complete the semiconductor device, which may be carried out according to a conventional method.

In the above embodiments, an insulating material was used as the filling material, but according to the present invention, after the groove surface is coated with a thin insulating film, all the isolation grooves are filled and flattened regardless of their width. can.

[Brief explanation of drawings]

Figures 1(a) to (sl are diagrams showing the culm of Example 1 of the present invention. 1...Substrate 2.3...Groove 4...Filling layer book) Figure 1

Claims (1)

[Claims] Multiple grooves (2), (3) with different widths in a semiconductor substrate (1)
and depositing a filling layer (4) filling the grooves, said filling layer (4) in the wider groove (3).
After forming a mask layer (5) on a part of the wide groove (3), etching the filler layer until it is almost completely removed except in the groove, and then forming the filler layer in the wide groove (3). layer(
4) A method for manufacturing a semiconductor device, characterized in that the recessed portion caused by the absence of the material is further flattened by depositing a filling layer (6).