JPS62213325A - Radio communication equipment - Google Patents
Radio communication equipmentInfo
- Publication number
- JPS62213325A JPS62213325A JP61056005A JP5600586A JPS62213325A JP S62213325 A JPS62213325 A JP S62213325A JP 61056005 A JP61056005 A JP 61056005A JP 5600586 A JP5600586 A JP 5600586A JP S62213325 A JPS62213325 A JP S62213325A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- vco
- signal
- frequency
- band
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 claims abstract description 15
- 230000005540 biological transmission Effects 0.000 abstract description 10
- 241000208140 Acer Species 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000013256 coordination polymer Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Transceivers (AREA)
- Superheterodyne Receivers (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は無線通消機係わシ、特に無線通信機の送受信電
波を選択する無線通信機に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a radio canceler, and particularly to a radio communication device that selects radio waves to be transmitted and received by the radio communication device.
無線通信機の局部発振回路は送受信電波を選択する混合
器へ発振信号を出力する。自動車電話パーソナル無線等
では８００ ＭＨｚ ＠ ｆ：使用する。送信波、受信
波のチャネルがこのバンド帯に決められ、多段変換の位
相同期ループで１ ｋＨｚ ＋ １０ ｋＨｚ ｇｌ
００ ｋＥｚ 、 Ｉ ＭＨｚ単位の設定値で１０，０
００チヤネルが得られるものもある。設定値はチャネル
番号の指定または、自動的に選択された空チヤネル番号
で定める。複数のバンド、例えば１４４〜１４６ＭＨｚ
（以下第０バンドという）、４３０〜４４０ＭＨｚ
（以下第１バンドとい５）、および１２９０〜１３２０
ＭＨｚ （以下第２バンドという）で運用する無線通
信機では第Ｏ９第１．第２バンドに対応して第０．第１
．第２のＰＬＬ回路を設ける。このため、第０．第１．
第２のｖＣＯをそれぞれのＰＬＬ回路に設けなければな
らない。また、ＰＬＬ回路に複数のｖＣＯを設はバンド
切換スイッチで切換える等の構成をとることもある。い
ずれの場合も複数のｖＣＯｔ−設けなければならないの
で、回路構成が複雑にな少部品点数が増加する等の欠点
を持っている。A local oscillation circuit of a wireless communication device outputs an oscillation signal to a mixer that selects transmitting and receiving radio waves. 800 MHz @ f: is used for car telephones and personal radios. The channels of the transmitted wave and the received wave are determined in this band, and the frequency is 1 kHz + 10 kHz gl using a multi-stage conversion phase-locked loop.
00 kEz, I 10,0 in MHz unit setting value
In some cases, 00 channels can be obtained. The setting value is determined by specifying a channel number or by an automatically selected empty channel number. Multiple bands, e.g. 144-146MHz
(hereinafter referred to as 0th band), 430-440MHz
(hereinafter referred to as the first band 5), and 1290 to 1320
MHz (hereinafter referred to as the 2nd band) for wireless communication equipment operating in the O9 1st band. 0. Corresponding to the second band. 1st
．． A second PLL circuit is provided. For this reason, the 0. 1st.
A second vCO must be provided for each PLL circuit. In addition, a plurality of vCOs may be provided in the PLL circuit and switched by a band changeover switch. In either case, since a plurality of vCOts must be provided, there are disadvantages such as a complicated circuit configuration and an increase in the number of small parts.
本発明の目的は上述した点に鑑みなされたもので、多バ
ンドで運用できる構成の無線通信機を提供することを目
的とする。The object of the present invention was made in view of the above-mentioned points, and it is an object of the present invention to provide a wireless communication device having a configuration that can be operated in multiple bands.
本発明には周波数情報によシ、分局比が決定されるプロ
グラマブルカウンタがＰＬＬ回路に設けである。このＰ
ＬＬ回路のループ内に設けられたｖＣＯで生成する発振
周波数（以下、基本周波数という。）と、基本周波数を
整数倍した周波数により制御されるよう構成しである。In the present invention, a PLL circuit is provided with a programmable counter whose division ratio is determined based on frequency information. This P
It is configured to be controlled by an oscillation frequency (hereinafter referred to as fundamental frequency) generated by a vCO provided in the loop of the LL circuit and a frequency obtained by multiplying the fundamental frequency by an integer.
以下、本発明による無線通信機の一実施例を図にしたが
って詳述する。DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a wireless communication device according to the present invention will be described in detail below with reference to the drawings.
図において１，２．３はバンドユニットである。In the figure, 1, 2.3 are band units.
バンドユニットＩＵ１４４〜１４６ ＭＨｚ 、バンド
ユニット２は４３０〜４４０ ＭＨｚ 、バンドユニッ
ト３は１２９０〜１３２０ ＭＨｚに適用する。（以下
、Ｏバンド、１バンド、 ２ ハ／ト、！−称ｆ ）
バンドユニット１はアンテナ３６で受信した信号を端子
１ｅに入力され、ＲＦ’ユニット２８、混合器２９を介
して端子ＩＣから切換器５０子接点ＩＣに出力する。ま
た、送信系回路の送信信号は切換器４の子接点１ａから
バンドユニット１の端子１ｍ、混合器２６、ファイナル
モジュール２７、端子１ｅを介してアンテナ３６から放
射される。Band unit IU applies to 144-146 MHz, band unit 2 applies to 430-440 MHz, and band unit 3 applies to 1290-1320 MHz. (hereinafter referred to as O band, 1 band, 2 ha/g, !-f)
In the band unit 1, the signal received by the antenna 36 is input to the terminal 1e, and is outputted from the terminal IC to the switch 50 child contact IC via the RF' unit 28 and the mixer 29. Further, the transmission signal of the transmission system circuit is radiated from the antenna 36 from the slave contact 1a of the switch 4 via the terminal 1m of the band unit 1, the mixer 26, the final module 27, and the terminal 1e.
混合器２６．２９への発振信号は端子１ｂ、ｌｄから供
給される。バンドユニット２、バンドユニット３は端子
２１〜２・、端子３ａ〜３ｅを有し内部回路はバンドユ
ニット１と同じで（図示されてない）ある。また端子２
ａ〜２ｅ、３ａ〜３゜の機能は端子１１〜１＠の機能と
同じである。Oscillation signals to mixers 26 and 29 are supplied from terminals 1b and ld. Band unit 2 and band unit 3 have terminals 21 to 2. and terminals 3a to 3e, and have the same internal circuit as band unit 1 (not shown). Also terminal 2
The functions of a to 2e and 3a to 3° are the same as those of the terminals 11 to 1@.
ＰＬＬ回路９は基準信号発生器１０位相比較器１１、ｖ
−ｆフィルタ１２、ＶＣＯ１３、プログラマブルカウン
タ１４で構成される。送受信周波数設定回路１８で設定
された周波数情報はＣＰＵ ２０で処理されディスプレ
イ１９で表示されると共にバンド情報としてコントロー
ル回路２１へ出力される。また、バンド内の送受信局波
数に係わる周波数情報はグログ２マプルカウンタ１４へ
出力される。設定された周波数情報にもとづきＶＣＯ１
３で生成された基本周波数の信号は端子９＆を介して切
換器８の子接点Ｐａへ送出される。また、ＰＬＬ回路９
から出力された基本周波数の信号を入力された第１の周
波数逓倍器１６は基本周波数の信号を逓倍して第１の発
振信号を生成し切換器８０子接点ｐ１へ送出する。また
、第２の周波数逓倍器１５は第１の発振信号を逓倍して
第２の発振信号を生成し、切換器８０子接点Ｐ２へ送出
する。The PLL circuit 9 includes a reference signal generator 10 a phase comparator 11, v
-f filter 12, VCO 13, and programmable counter 14. The frequency information set by the transmitting/receiving frequency setting circuit 18 is processed by the CPU 20 and displayed on the display 19, and is output to the control circuit 21 as band information. Further, frequency information related to the number of transmitting/receiving station waves within the band is output to the log 2 maple counter 14. VCO1 based on the set frequency information
The fundamental frequency signal generated at 3 is sent to the child contact Pa of the switch 8 via the terminal 9&. In addition, the PLL circuit 9
The first frequency multiplier 16 receives the fundamental frequency signal outputted from the fundamental frequency signal, multiplies the fundamental frequency signal, generates a first oscillation signal, and sends it to the switch 80 child contact p1. Further, the second frequency multiplier 15 multiplies the first oscillation signal to generate a second oscillation signal, and sends it to the switch 80 child contact P2.
切換器８の親接点８ａは切換器６および７の親接点６ｍ
、７ａと接続される。切換器６および７０子接点１ｂ、
ｌｄはバンドユニット１の同名の端子１ｂと１ｄに接続
しである。また、切換器４〜７の子接点１ａ〜３ａｔｌ
ｂ〜３ｂ＋１ｃ〜３ｃ＊１ｄ〜３ｄはパンドユニツ）１
，２．３の同名の端子１ ａ〜１ ｄ 、 ２ ａ〜２
ｄ 、 ３ ａ 〜３ ｄと接続する。なお、送信周
波数と受信周波数が異なるときは基準信号発生器１０で
生成した発振信号を端子・９ ｂ ＨＸ ＋ Ｘ ｌ結
線、逓倍器３５ｔ−介して混合器３４へ加えて、送信用
ローカルを生成する。上記第１．第２６周波数逓倍器１
６．１５はそれぞれ３逓倍となっている。The master contact 8a of the switch 8 is the master contact 6m of the switch 6 and 7.
, 7a. Switch 6 and 70 child contacts 1b,
ld is connected to terminals 1b and 1d of the same name of the band unit 1. In addition, the child contacts 1a to 3atl of the switches 4 to 7
b~3b+1c~3c*1d~3d are pando units) 1
, 2.3 terminals with the same names 1 a to 1 d, 2 a to 2
Connect with d, 3a to 3d. In addition, when the transmission frequency and the reception frequency are different, the oscillation signal generated by the reference signal generator 10 is applied to the mixer 34 through the terminal 9bHX+XI connection and the multiplier 35t- to generate the local signal for transmission. do. Above 1st. 26th frequency multiplier 1
6.15 are each multiplied by 3.
ここで、第０バンド（１４４〜１４６ＭＨｚ ）のとき
は切換器４〜８の親接点４ａ〜８ａは子接点１ａ〜１ｄ
とＰｏの接続しであるのでバンドユニット１の混合器２
６．２９は基本周波数の信号を供給される。バンド内で
のチャネル選択または可変ステップ中は電波型式等によ
り定まるほか微調整も行える。第１バンド（４３０〜４
４０ ＭＥｆｚ ）のときは第１の発振信号が切換器８
０子接点Ｐ １ 、親接点８１を介して切換器４〜７の
親接点４ａ〜７ａへ送出される。切換器４〜７の親接点
４ａ〜７ａは子接点２ｍ 、２ｂ 、２ｃ 、２ｄと切
換えて閉成されるからバンドユニット２の端子２１〜２
ｄは能動となる。送受信周波数設定回路１８による周波
数情報はプログラマブルカウンタ１４に対して基本周波
数の信号相当に変換して送られる。切換器８の端子Ｐ１
には端子Ｐｏの３逓倍の発振信号が送出される。したが
って、基本周波数の信号の最小周波数変化ステップｔ”
Ｏ，ｌ Ｈｚとすると第１の発振信号では０．３ Ｈ
ｚ 、第２の発振信号では０．９Ｈｚとなる。図中符号
２２，２３，２４，２５は送信系回路で、３０，３１，
３２．３３は受信系回路であシ、２２はマイク、２３は
マイクアング、２４．３１は中間周波回路、２５．３０
はフィルタ、３２はＡＦアング、３３はスピーカである
。Here, in the case of the 0th band (144 to 146 MHz), the master contacts 4a to 8a of the switchers 4 to 8 are the slave contacts 1a to 1d.
and Po are connected, so mixer 2 of band unit 1
6.29 is supplied with a fundamental frequency signal. Channel selection within a band or during variable steps is determined by the radio wave type, etc., and fine adjustments can also be made. 1st band (430~4
40 MEfz), the first oscillation signal is
It is sent out to the parent contacts 4a to 7a of the switching devices 4 to 7 via the zero child contact P1 and the parent contact 81. Since the master contacts 4a to 7a of the switching devices 4 to 7 are closed by switching to the child contacts 2m, 2b, 2c, and 2d, the terminals 21 to 2 of the band unit 2 are closed.
d becomes active. The frequency information from the transmission/reception frequency setting circuit 18 is converted into a signal equivalent to a fundamental frequency and sent to the programmable counter 14. Terminal P1 of switch 8
An oscillation signal three times that of the terminal Po is sent to the terminal Po. Therefore, the minimum frequency change step t'' of the signal at the fundamental frequency
O,l Hz, the first oscillation signal is 0.3 H
z, the second oscillation signal is 0.9Hz. In the figure, symbols 22, 23, 24, 25 are transmission system circuits, 30, 31,
32.33 is a receiving circuit, 22 is a microphone, 23 is a microphone angle, 24.31 is an intermediate frequency circuit, 25.30
is a filter, 32 is an AF angle, and 33 is a speaker.
上記実施例では基本周波数の信号に係わるバンドと逓倍
した逓倍信号に係わるバンドを切換エテ制御するように
なっているが、これに限定されない。また基本周波数の
信号と逓倍信号で同時に送受信制御するよう構成しても
よい。In the embodiment described above, switching control is performed between the band related to the fundamental frequency signal and the band related to the multiplied signal, but the present invention is not limited to this. Further, it may be configured to simultaneously control transmission and reception using the fundamental frequency signal and the multiplied signal.
逓倍は３逓倍に限定されず、２逓倍・・・等としてもよ
い。The multiplication is not limited to 3 times, but may be 2 times, etc.
本発明による無線通信機はＰＬＬ回路を構成するＶＣＯ
の出力である基本周波数の信号と、基本周波数の信号を
逓倍した逓倍信号とによシ制御するよう構成しであるか
ら単一のＶＣＯで無線通信機の送受信を制御できるとこ
ろに特長を有している。このため、回路構成が間単にな
シ、部品点数を減少できる効果がある。また、ＩＣ化さ
れた逓倍回路および分周回路を適宜組合せて所望の発振
信号が得られるので、装置の小形化を期待できる。The wireless communication device according to the present invention includes a VCO that constitutes a PLL circuit.
Since it is configured to control both the fundamental frequency signal that is the output of the VCO and the multiplied signal obtained by multiplying the fundamental frequency signal, it has the feature that the transmission and reception of the wireless communication device can be controlled with a single VCO. ing. Therefore, the circuit configuration is simple and the number of parts can be reduced. Further, since a desired oscillation signal can be obtained by appropriately combining IC multiplier circuits and frequency divider circuits, the device can be expected to be made more compact.
図は本発明になる無線通信機の一実施例を示すブロック
図である。図中符号、１，２，３はバンドユニット、４
，５．６，７．８は切換器、９はＰＬＬ回路、１０は基
準信号発生器、１１は位相比較器、１２はループフィル
タ、１３はＶＣＯ１１４はプログラマ７’／Ｉ／カクン
タ、１５，１６は逓倍器、１７はｆ−タパス、１８は送
受信周波数設定回路、１９はディスグレイ、２０はＣＰ
Ｕ、２１はコントロール回路、２２はマイク、２３はマ
イクアンプ。
２４．３１は中間周波回路、２５．３０はフィルタ、２
６，２９．３４は混合器、２７はファイナルモジエール
、２８はＲＦユニット、３２はＡＰアンプ、３６はアン
テナである。The figure is a block diagram showing an embodiment of a wireless communication device according to the present invention. Codes in the figure: 1, 2, 3 are band units, 4
, 5.6, 7.8 are switchers, 9 is a PLL circuit, 10 is a reference signal generator, 11 is a phase comparator, 12 is a loop filter, 13 is a VCO 114 is a programmer 7'/I/kakunta, 15, 16 is a multiplier, 17 is an f-tapass, 18 is a transmitting/receiving frequency setting circuit, 19 is a disgray, and 20 is a CP.
U, 21 is a control circuit, 22 is a microphone, and 23 is a microphone amplifier. 24.31 is an intermediate frequency circuit, 25.30 is a filter, 2
6, 29, and 34 are mixers, 27 is a final module, 28 is an RF unit, 32 is an AP amplifier, and 36 is an antenna.
Claims (1)
比較器と、ループフィルタと、ＶＣＯと、を具備したＰ
ＬＬ回路において、前記ＶＣＯに係わる発振周波数範囲
の基本周波数と、基本周波数を整数倍した周波数により
制御される無線通信機。(1) P equipped with a reference oscillator, a programmable counter, a phase comparator, a loop filter, and a VCO
In the LL circuit, a wireless communication device controlled by a fundamental frequency in an oscillation frequency range related to the VCO and a frequency obtained by multiplying the fundamental frequency by an integer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61056005A JPS62213325A (en) | 1986-03-13 | 1986-03-13 | Radio communication equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61056005A JPS62213325A (en) | 1986-03-13 | 1986-03-13 | Radio communication equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62213325A true JPS62213325A (en) | 1987-09-19 |
Family
ID=13014940
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61056005A Pending JPS62213325A (en) | 1986-03-13 | 1986-03-13 | Radio communication equipment |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62213325A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05252070A (en) * | 1991-05-13 | 1993-09-28 | Hitachi Ltd | Receiver |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56136041A (en) * | 1980-03-26 | 1981-10-23 | Sanyo Electric Co Ltd | Frequency synthesizer system receiver |
| JPS59150814A (en) * | 1983-02-15 | 1984-08-29 | Otokichi Ishizuka | Power generation by combined use of estuary dam and high-tide water pumping type power plant |
-
1986
- 1986-03-13 JP JP61056005A patent/JPS62213325A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56136041A (en) * | 1980-03-26 | 1981-10-23 | Sanyo Electric Co Ltd | Frequency synthesizer system receiver |
| JPS59150814A (en) * | 1983-02-15 | 1984-08-29 | Otokichi Ishizuka | Power generation by combined use of estuary dam and high-tide water pumping type power plant |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05252070A (en) * | 1991-05-13 | 1993-09-28 | Hitachi Ltd | Receiver |
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