JPS6221297B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a portable receiver that uses a battery as its main power source.

It is desired that a portable radio receiving device be small and lightweight, and for this reason, efforts are being made to miniaturize circuit components and power supplies. Dry batteries are generally used as a compact power source, but when using a single cell of a dry battery, it is said that a standard battery voltage of about 1.5V is appropriate based on the battery capacity. However, it is not always easy to perform stable circuit operation with a power supply voltage of 1.0V.For example, if the digital signal detection section is configured with a CMOS LSI and a crystal resonator is used as the clock oscillation source, the LSI will not work properly. Due to variations in the threshold voltage of each transistor, it may take a few seconds to reach stable oscillation after power-on.
It may take 10 seconds, or it may not oscillate at all. To avoid such inconvenience, LSI
Sorting leads to a decrease in yield and, in turn, to an increase in costs, which is not desirable for the low cost production of mass-produced products such as so-called "pagers."

The present invention has been made focusing on the above circumstances,
The purpose is to provide a receiving device that can maintain stable circuit operation even at low power supply voltages without using specially selected circuit elements, prevent malfunctions, and reduce power consumption. It's about doing.

In order to achieve the above object, the present invention provides a receiving device including a wireless receiving section, a signal detecting section incorporating an oscillating section, and an output section that outputs the signal detection result. The power supply output is supplied to the section via the power switch, and the power output is directly supplied to the signal detection section without passing through the power switch, so that the signal detection section can be operated regardless of whether the power switch is turned on or not. The power is always supplied, and when the power switch is turned off, the gate of the signal detection section is set to the gate-off state to prevent unnecessary signals from being output. During the turn-on period, the main body of the detecting section except for the oscillating section in the signal detecting section is set to a reset state so that no current is consumed in the main body of the detecting section when the power switch is not turned on.

An embodiment of the present invention applied to a selective call receiving device will be described below with reference to the drawings. FIG. 1 is a block diagram showing the entire receiving device, where 1 is an antenna, 2
3 is an oscillation source provided externally to the signal detecting unit 4, such as a crystal oscillator, and 5 is a signal detecting unit 4. is an output unit that generates a ring tone when the device detects a selective call signal to its own device. Also, 6 is the main power source, which uses dry batteries. Then, from this main power supply 6, the wireless receiving section 2,
Power is supplied to the output section 5 via a power switch 7, while power is supplied directly to the signal detection section 4. The resistor 8 and the capacitor 9 constitute an initial state setting circuit for the signal detection section 4.

FIG. 2 is a block diagram showing the signal detection section 4 in detail. In the figure, 10 is a data input terminal from the radio receiver 2, and 11 is a signal output terminal to the output section 5. A read-only memory (ROM) 12 stores an individual number unique to the selective call receiver. 13 is an initial state setting terminal. The oscillation source 3 is a crystal oscillator, and the oscillation output of the oscillation section 14 connected thereto is counted by a counter 15 and converted into a required timing pulse by a control pulse generation section 16. On the other hand, input data from the terminal 10 is guided to a synchronization control section 17 and a comparison section 18, and the synchronization control section 17 monitors bit synchronization, frame synchronization, etc., so that the timing of transmission and reception coincides. The comparison section 18 compares the input data with the individual number stored in the ROM 12, and if they match, it sends a specific frequency signal to the output terminal 11 and causes the output section 5 to generate a sound.

The initial state setting circuit generates a predetermined signal from the output voltage of the battery 6 supplied via the power switch 7, and sends this signal to the counter 15, the control pulse generator 16, and the synchronous controller 17, which constitute the main body of the detector. ,
It is supplied to the comparator 18 and the reset circuit or gate control terminal of each gate 19, 20. here,
The reset circuit provided in each of the circuit sections is for resetting the operating state of each circuit section and setting the circuit to a substantially non-operating state. When the initial state setting circuit generates a reset signal when the power switch 7 is turned on, the counter 15, the control pulse generator 16, the synchronous controller 17 and the comparator 1
8 are each reset and set to the initial state. Further, when the power switch 7 is turned off, each of the gates 19 and 20 is turned off by the "L" signal generated from the initial state setting circuit. unnecessary signals will no longer be output.

In addition to the above functions, the initial state setting circuit has the following functions. That is, the potential change of the initial state setting terminal 13 is as shown in FIG.
The rise time from when the power switch 7 is turned on and the fall time from when the power switch 7 is opened are set. FIG _{. 3b} is a modified waveform of FIG _.
is at "H" level. During period _t2 , the signal detection section 4 operates, and during periods _t1 and _t3, the counter 15, control pulse generation section 16, synchronization control section 17, and comparison section 18 are reset and do not operate, and the gate of the output stage 19 and The output of the gate 20 for the ROM 12 is also fixed at the "L" level. Therefore, the period t ₁ during which the power switch 7 is open is transmitted to the signal detection unit 4.
Power output is also supplied to t3 and _t3 regardless of the state of this switch 7, but only the oscillation part 14 is actually operating, and the reset terminals of the other parts are used as reset potentials. It is fixed at a predetermined logic level, and as a result, each section except the oscillating section 14 becomes substantially inactive.

By the way, in the case of the selective call receiving device configured as described above, since a battery is used as a power source, it is best to form the signal detecting section 4 with a one-chip CMOS LSI in order to reduce the current consumption of the signal detecting section 4. It is said that However, when configured with CMOS, there is a drawback that the oscillation starting voltage in the oscillation section 14 is higher than that of bipolar or the like. However, once it oscillates, it has the characteristic of continuing to oscillate even if the power supply voltage drops below the oscillation starting voltage. By supplying power from the power supply 6, even if the voltage of the main power supply 6 drops to the final discharge voltage,
The signal detection section 4 having a CMOS configuration can be kept operating normally.

Moreover, the internal logic of CMOS changes from “L” to “H”
Or, since the current flows only when changing from "H" to "L", the logic of each part except the oscillation part 14 is fixed to "H" or "L" by the potential of the initial state setting terminal 13 when the power switch 7 is turned off. By doing so, the actual current consumption can be kept to an extremely small value consumed by the oscillation section 14.

As described in detail above, according to the present invention, power is supplied to the wireless receiving section and the output section via the power switch only when the power switch is not turned on, and the signal detecting section including the oscillation section is supplied with power via the power switch. Since power is constantly supplied without going through a period of time, even when the power supply voltage is low, it will not take a long time to transition to stable oscillation after power-on, or it will not oscillate at all. It is possible to perform various circuit operations. In addition, the accuracy of the CI value of the crystal oscillator used as the oscillation source and the accuracy of the threshold voltage of each transistor making up the signal detection section are not required so much, which improves the manufacturing yield as a mass-produced product and reduces the cost. It can be done. Furthermore, in the present invention, when the power switch is turned off, the initial state setting circuit issues a signal to set the gate in the signal detection section to the gate-off state, so even if the circuit operation is unstable immediately after the power switch is turned off, the Even if an erroneous signal is generated, this signal can be prevented from being output to the output section, thereby preventing malfunction of the output section.

Furthermore, in the present invention, a reset signal is supplied from the initial state setting circuit to the main body of the signal detecting section except for the oscillating section when the power switch is not turned on.
As a result, the main body of the detection unit is set to a substantially non-operating state even though the power is being supplied.
When the power switch is not turned on, that is, when not in use, the current consumption of the signal detection section can be reduced to an extremely small amount of current that flows through the oscillation section.As a result, power consumption can be reduced and battery life can be extended. can. In addition, although the main body of the signal detector is set to the reset state, power is constantly supplied to the signal detector, so when the power switch is turned on, the signal detector operates at a higher speed than when no power is supplied at all. It can be started up quickly and stably.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a receiving device according to an embodiment of the present invention, FIG. 2 is a block diagram showing the circuit configuration of a signal detection section of the same device, and FIG. 3 a and b are voltage waveforms of initial state setting terminals. FIG. 3 is a diagram showing a voltage waveform obtained by shaping the voltage waveform. 3...Oscillation source, 4...Signal detection section, 6...Main power supply, 7
...Power switch, 8...Resistor, 9...Capacitor, 1
0...Data input terminal, 11...Signal output terminal, 13
...Initial state setting terminal, 14...Oscillating section, 15...Counter, 16...Control pulse generating section, 17...Synchronization control section, 18...Comparing section, 19, 20...Gate.

Claims (1)

[Claims] 1. A radio reception section, an oscillation section that drives an oscillation source to obtain a predetermined oscillation output, a timing signal is created from the oscillation output of this oscillation section, and the signal received by the radio reception section is synchronized with this timing signal. A signal detection section that has a built-in detection section body that performs detection and a gate that gate-controls and outputs the detection output of this detection section body, and whose oscillation section, detection section body, and gate are operated by a common power input system; an output section that outputs the detection output of the signal detection section in a predetermined format, and an output section that supplies power output to the wireless reception section and the output section via a power switch, and supplies power to the signal detection section without going through the power switch. a power supply circuit that constantly supplies a power output to the circuit; and a power supply circuit that sets the gate to a gate-off state when the power switch is turned off, and sends a reset signal only to the detection unit main body of the signal detection unit during the period when the power switch is not turned on. 1. A receiving device comprising means for fixedly setting said detecting section main body in a reset state by supplying said detecting section main body to a reset state.