JPS6221283A - Superconductive integrated circuit - Google Patents
Superconductive integrated circuitInfo
- Publication number
- JPS6221283A JPS6221283A JP60159932A JP15993285A JPS6221283A JP S6221283 A JPS6221283 A JP S6221283A JP 60159932 A JP60159932 A JP 60159932A JP 15993285 A JP15993285 A JP 15993285A JP S6221283 A JPS6221283 A JP S6221283A
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- superconductor
- etching
- superconductors
- contact
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H01L39/223—
Landscapes
- Superconductor Devices And Manufacturing Methods Thereof (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、ジョセフソン素子全応用し念超伝導集積回路
に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a superconducting integrated circuit fully utilizing Josephson elements.
従来技術を第2図を用いて説明する。/は基板、λは第
1の超伝導体、3は第2の超伝導体、≠は抵抗体、よけ
コンタクト部を除いて第1と第2の超伝導を絶縁する絶
縁層、6は抵抗を保護する絶縁層である。The prior art will be explained using FIG. 2. / is the substrate, λ is the first superconductor, 3 is the second superconductor, ≠ is the resistor, an insulating layer that insulates the first and second superconductors except for the shield contact part, 6 is the This is an insulating layer that protects the resistor.
従来は、抵抗体≠としてモリブデン、第2の超伝導体と
してニオブを用い、第2の超伝導体は、OF、 、 O
B、F、などのガスを用い之反応性イオンエツチングに
よって形成していた。保護用絶縁膜乙が存在しない場合
は、第2の超伝導体の加工時に、エツチングが過剰に進
行すると抵抗体≠が。Conventionally, molybdenum is used as the resistor, niobium is used as the second superconductor, and the second superconductor is OF, , O
It was formed by reactive ion etching using gases such as B and F. If the protective insulating film B does not exist, if etching progresses excessively during the processing of the second superconductor, the resistor ≠.
直接エツチングされるが、モリブデンはニオブと同程度
エツチングされるため、第2の超伝導層のエツチングを
正確に制御し、丁度、抵抗体≠の表も
面までエツチングされ念時にエツチング各終了する必要
がある。ところで、一般にエツチングはウェーハの内で
不均一に進行するし、終点を厳密に検出することは困難
である。そこで、従来は保護膜絶縁層2を抵抗体μ上に
かぶせざるを得なかった。その念め、抵抗の最さを規定
するのは、第2の超伝導体3の端部ではなく、絶縁膜乙
の開孔部ジ
の縁であり、余分の長さくし≠ストレージョンスペース
)を必要とし念。ま九、第2の超伝導体3は、第1の超
伝導体λと抵抗体≠と同時にコンタクトをとるa要があ
り5双方に対してニオブの蒸着直前に行うアルゴンによ
るスパッタクリーニングが行なわれる。この時、ニオブ
表面の汚染、或いは酸化膜を除去するのに必要なパワー
と、抵抗体り表面をクリーニングするに必要、十分なパ
ワーは同じでなくてはならず、例えば、ニオブに比べて
軟かい材料で、容易にアルゴンスパッタクリーニングに
よって、膜厚が減少してしまうような抵抗材料は、用い
ることができなかった。Although it is directly etched, molybdenum is etched to the same extent as niobium, so the etching of the second superconducting layer must be precisely controlled so that the surface of the resistor is etched right up to the surface, so it is necessary to finish each etching just in case. There is. By the way, etching generally progresses non-uniformly within the wafer, and it is difficult to accurately detect the end point. Therefore, in the past, it was necessary to cover the resistor μ with the protective film insulating layer 2. In order to keep this in mind, the maximum resistance is determined not by the edge of the second superconductor 3, but by the edge of the opening in the insulating film (excess length ≠ storage space). I feel it's necessary. 9. The second superconductor 3 needs to be in contact with the first superconductor λ and the resistor at the same time, and both are sputter-cleaned with argon immediately before the niobium evaporation. . At this time, the power required to remove contamination or oxide film on the niobium surface must be the same as the power necessary and sufficient to clean the resistor surface. It has not been possible to use a resistive material whose film thickness is easily reduced by argon sputter cleaning.
以上に述べたように、従来は保護用絶縁層に必要とする
ため余分のプロセスが必要であり、また、レジストレー
ションスペース分タケ、 集積化<不利であったうさら
に、コンタクトと抵抗とのアルゴンクリーニング条件の
制約から、抵抗材料の選択の制限があった。As mentioned above, in the past, an extra process was required due to the need for a protective insulating layer, and the registration space required, which was disadvantageous for integration. There were restrictions on the selection of resistive materials due to constraints on cleaning conditions.
本発明の目的は、工程が簡単で、集積密度の高い超伝導
回路全提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a superconducting circuit with simple steps and high integration density.
本願発明においては、抵抗体保護用絶縁aを用いないこ
と、コンタクト部分に抵抗体と同一材料から成るコンタ
クト層を設ける点が従来技術とは異なる本発明の特徴で
ある。The present invention differs from the prior art in that the resistor protection insulation a is not used and a contact layer made of the same material as the resistor is provided in the contact portion.
このようにすることによシ、従来必要であっ念抵抗体保
護用絶縁換を不要とし、プロセスを簡略化し、集積密度
を向上させ、かつ、抵抗体と他の超伝導体とのコンタク
トを同一のクリーニング条件で行なうことができるので
抵抗体材料の選択の曜ヲ広げることができる。By doing this, it is possible to eliminate the need for insulation replacement to protect the resistor, which is conventionally required, simplify the process, improve integration density, and make the contact between the resistor and other superconductors the same. Since the cleaning can be carried out under the following cleaning conditions, the selection of resistor materials can be expanded.
以下、図面を用いて本発明について更に詳しく説明する
。Hereinafter, the present invention will be explained in more detail using the drawings.
第1図は、本発明の詳細な説明する図であって、/は基
板、コは第1の超伝導体であるニオブ、3は第2の超伝
導体であるニオブ、グは抵抗体、夕は2g/と第2の超
伝導体を絶縁する絶縁膜、7は第1と第2の超伝導体を
接続するためのコンタクト層である。抵抗体としては、
1100n以下の厚さの金、パラジウム、アルミニウム
、及びアルミを成分とするアルミ合金を用いる。金、パ
ラジウム、白金、アルミ、アルミ合金は、ニオブに比べ
ると、OF、や0BrF、ガスを用い之反応性イオンエ
ツチング時のエツチング速度が、格段に遅く2g2の超
伝導体のエツチング終了後も引き続き余計にエツチング
されても膜厚の減少はわずかであるので、保護膜が不要
である。従って、抵抗体≠の長さを規定するのは、第2
の超伝導体3の端部であり、従来のようなレジストレー
ションスペースが不要で集積密度を向上できる。FIG. 1 is a detailed diagram of the present invention, where / is a substrate, C is a first superconductor, niobium, 3 is a second superconductor, niobium, G is a resistor, 7 is an insulating film for insulating the second superconductor, and 7 is a contact layer for connecting the first and second superconductors. As a resistor,
Gold, palladium, aluminum, and an aluminum alloy containing aluminum with a thickness of 1100 nm or less are used. Compared to niobium, the etching speed of gold, palladium, platinum, aluminum, and aluminum alloys during reactive ion etching using OF, 0BrF, and gas is much slower, and the etching rate continues even after etching of a 2g2 superconductor is completed. Even with extra etching, the film thickness decreases only slightly, so a protective film is not necessary. Therefore, the length of the resistor ≠ is determined by the second
This is the end of the superconductor 3, and unlike conventional registration spaces, it is not necessary and the integration density can be improved.
コンタクト層7は5抵抗体≠と同一の材料を使用する。The contact layer 7 uses the same material as the 5 resistors≠.
従って、抵抗体≠と、コンタクト層7は、同じ工程で同
時に形成できる。コンタクト層及び抵抗体の厚さは/
00 nm以下で用いるので、第1と第2の超伝導体コ
、及び3の間の電気抵抗は、はとんど無視できる位小さ
いか、又は近接効果てよシ超伝導状態で結合される。こ
の層7を蒸着する時には、第2の超伝導体コであるニオ
ブの表面をスパッタクリーニングして充分な電気的接触
を確保する必要がある。Therefore, the resistor ≠ and the contact layer 7 can be formed simultaneously in the same process. The thickness of the contact layer and resistor is /
00 nm or less, the electrical resistance between the first and second superconductors and 3 is negligibly small, or they are coupled in a superconducting state due to the proximity effect. . When depositing this layer 7, it is necessary to sputter clean the surface of the second superconductor, niobium, to ensure good electrical contact.
第2の超伝導体!?i、コンタクト層7と、抵抗体≠に
接続される必要があるが、本発明では、この両方が同一
物質であるので、従来技術で保護膜がない場合のように
、スパッタクリーニング時に抵抗体≠の膜厚が減少しc
b、或いは、第1の超伝導体への電気的接続が不十分に
なっebすることがない。従って、ニオブの反応性エツ
チング時のエッチ速度が遅いものの、アルゴンガスによ
るスパッタクリーニング時のスパッタエッチ速度がニオ
ブよりも速い材料、例えば、金、パラジウムなどの材料
を用いることができる。The second superconductor! ? i. It is necessary to connect the contact layer 7 and the resistor ≠, but in the present invention, since both are made of the same material, the resistor ≠ is connected to the contact layer 7 during sputter cleaning, as in the case where there is no protective film in the prior art. The film thickness of c
b, or the electrical connection to the first superconductor will not become insufficient. Therefore, it is possible to use a material such as gold or palladium, which has a slow etch rate during reactive etching of niobium but a faster sputter etch rate during sputter cleaning with argon gas than niobium.
以上、説明したように、保護膜を使用しないので、プロ
セスが簡単になるとともに、レジストレージ曹ンスベー
スなしで、抵抗と超伝導体を接続できるので、集積密度
を向上できる利点がある。As explained above, since no protective film is used, the process is simplified, and since the resistor and superconductor can be connected without a resistor storage base, there is an advantage that the integration density can be improved.
第1図は、本発明の実施例の断面図、第1図は従来の超
伝導回路の断面図である。
/・・・基板、コ・・・第1の超伝導体、3・・・第2
の超伝導体、≠・・・抵抗体、!・・・絶縁族、乙・・
・抵抗保護用絶縁膜、7・・・コンタクト層。FIG. 1 is a sectional view of an embodiment of the present invention, and FIG. 1 is a sectional view of a conventional superconducting circuit. /...substrate, co...first superconductor, 3...second
Superconductor, ≠...resistance,! ...Insulation tribe, B...
- Insulating film for resistance protection, 7... contact layer.
Claims (1)
導体を互いに電気的に接続するコンタクト部分と、上記
第2の超伝導体と電気的に接続された抵抗体とを含む超
伝導集積回路において、第1と第2の超伝導体の間に介
在し、第1と第2の超伝導体と相接するコンタクト層と
、上記抵抗体とがそれぞれ厚さ100nm以下で、かつ
上記第2の超伝導体に対するエッチング選択比が5以上
の同一金属材料からなる金属層であることを特徴とする
超伝導集積回路。 2、第2の超伝導体がニオブであり、コンタクト層及び
抵抗層を形成する金属層が、パラジウム、金、白金、ア
ルミニウム、アルミニウムを含む合金であることを特徴
とする特許請求の範囲第1項記載の超伝導集積回路。[Claims] 1. A first and a second superconductor, a contact portion that electrically connects the first and second superconductors to each other, and a contact portion that electrically connects the second superconductor and the second superconductor. a resistor connected to the superconducting integrated circuit, a contact layer interposed between the first and second superconductors and in contact with the first and second superconductors; and are metal layers made of the same metal material, each having a thickness of 100 nm or less and having an etching selectivity of 5 or more with respect to the second superconductor. 2. Claim 1, wherein the second superconductor is niobium, and the metal layer forming the contact layer and the resistance layer is an alloy containing palladium, gold, platinum, aluminum, or aluminum. Superconducting integrated circuit as described in section.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60159932A JPS6221283A (en) | 1985-07-19 | 1985-07-19 | Superconductive integrated circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60159932A JPS6221283A (en) | 1985-07-19 | 1985-07-19 | Superconductive integrated circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6221283A true JPS6221283A (en) | 1987-01-29 |
Family
ID=15704299
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60159932A Pending JPS6221283A (en) | 1985-07-19 | 1985-07-19 | Superconductive integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6221283A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6411375A (en) * | 1987-07-06 | 1989-01-13 | Hitachi Ltd | Superconducting oxide integrated circuit |
JPH01156482A (en) * | 1987-12-11 | 1989-06-20 | Mitsubishi Cable Ind Ltd | Method for etching superconductor |
JPH02322A (en) * | 1987-11-16 | 1990-01-05 | Semiconductor Energy Lab Co Ltd | Manufacture of superconducting device |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58125881A (en) * | 1982-01-22 | 1983-07-27 | Hitachi Ltd | Constitution of vertical type resistance circuit |
JPS58148476A (en) * | 1982-02-27 | 1983-09-03 | Fujitsu Ltd | Resistor film for josephson integrated circuit |
-
1985
- 1985-07-19 JP JP60159932A patent/JPS6221283A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58125881A (en) * | 1982-01-22 | 1983-07-27 | Hitachi Ltd | Constitution of vertical type resistance circuit |
JPS58148476A (en) * | 1982-02-27 | 1983-09-03 | Fujitsu Ltd | Resistor film for josephson integrated circuit |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6411375A (en) * | 1987-07-06 | 1989-01-13 | Hitachi Ltd | Superconducting oxide integrated circuit |
JPH02322A (en) * | 1987-11-16 | 1990-01-05 | Semiconductor Energy Lab Co Ltd | Manufacture of superconducting device |
JPH01156482A (en) * | 1987-12-11 | 1989-06-20 | Mitsubishi Cable Ind Ltd | Method for etching superconductor |
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