JPS62211505A - Displacement detecting circuit for encoder - Google Patents

Abstract

PURPOSE:To stabilize output data at any time by adding a delay flip-flop DFF to a circuit composed of a function generating ROM, a counter, and a comparator. CONSTITUTION:The DFF 40 is supplied with data phi and the U/D signal S of the comparator 23 and the data phi at an input terminal right before the signal S rises is latched and outputted as data phia. When the signal S is '1' in a specific period, a counter 24 counts up, the data phi increases, and the last value of the data phia. An object of detection is reduced greatly in speed and the signal S becomes '0'; and the counter 24 counts down a clock CK by one to decrease the value of the data phi by one or increase it by one if the object of detection has almost no movement. Consequently, the signal S becomes '0' and the counter 40 begins to count up. Subsequently, this operation is repeated up to the time when the object of inspection begins to move at a relatively high speed and the data phi oscillates within a specific range. Consequently, even if the counted value of the counter 24 oscillates within one count, the oscillation is absorbed by the DFF 40, whose output does not oscillate.

Description

DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to a displacement detection circuit for an encoder suitable for use in detecting displacement.

"Prior Art" Various circuits have been developed and put into practical use for detecting displacement by demodulating the output signal of an encoder for displacement detection. FIG. 3 is a circuit diagram showing an example of this type of displacement detection circuit for an encoder, and the circuit shown in this figure will be explained below.

In FIG. 1, 15 is a scale, which is constructed by magnetizing a predetermined orbit with a sine wave of a constant period. Scale in this case! 5 is constructed by setting a fixation 6 on the surface of a disc-shaped magnetic material and magnetizing this circular orbit. Further, the wavelength λ of the sine wave used for magnetization is set to about several tens to several hundreds of μm. Magnetic sensors 16 and 17 output level signals corresponding to the strength of magnetization on the scale 15. That is, as the magnetic sensors I6, 17, those whose output signals do not include a carrier wave are used, for example, sensors using semiconductor elements are used. Further, the magnetic sensor 17 is set to be offset by 1/4λ (90°) with respect to the magnetic sensor 16. Therefore, the interval between the magnetic sensors 16 and 17 is (
m+1/4)λ (where m is a positive integer). The magnetic sensor 16, 17 and the scale 15 are relatively movable, so that if one of them is fixed, the other will rotate.

As can be seen from the above, the magnetic sensor I6
If the signal output by the magnetic sensor 17 is a sine wave, the signal output by the magnetic sensor 17 is a cosine wave. Therefore, the interval of one period of the magnetization sine wave (from pole to pole of scale 15) is θ
=0 to 2π, each output signal of the magnetic sensor I6.17 becomes sin θ and cos θ, respectively.

Next, 18 and 19 shown in FIG. 1 are respectively magnetic sensors I
It is an A/D converter that converts the output signal of 6.17 into a digital signal, and the digitized sinθ and cO8θ
is supplied to one input terminal of the digital multiplier 20.21. The output signals of the multipliers 20 and 21 are respectively supplied to one and the other input terminals of the digital subtracter 22.
The output signal of is supplied to a digital comparator 23. This digital comparator 23 sends the U/D signal, which becomes "1" if the subtraction result of the subtracter 22 exceeds 0, and "0" if it does not exceed 0, to the up/down switching terminal U/D of the counter 24. Supply to D. The counter 24 receives the clock signal CK
is used to count up/down switching terminal U.
When the “l” signal is supplied to /D, it counts up and “0”
"When the signal is supplied, it counts down. Next, 2
Reference numeral 5 denotes a function generation ROM, which outputs sine and cosine data corresponding to the count value Φ of the counter 24. That is, sinΦ is stored in the function generation ROM 25 in advance.
and cos Φ are stored, and the stored data are sequentially read out according to the count value Φ. The data COSΦ is then supplied to the other input terminal of the digital multiplier 20, and the digital sinΦ
is supplied to the other input terminal of the digital multiplier 21. According to the above configuration, the output of the subtracter 22 is 5 inches (θ−Φ
). Therefore, the comparator 23 is 5 inches (θ-Φ)
If the value of is positive, the U/I) signal is “l”, if it is negative,
The /D signal is set to "0", and as a result, the count value Φ of the counter 24 increases or decreases according to the sign of 5in (θ-Φ).

Next, 30 and 31 shown in FIG.
．． This is a waveform shaping circuit that converts the +7 output signal into a binary signal of "1" level and "0" level by determining it with a predetermined threshold value. In this case, the waveform shaping circuit 30.
31 output signal P1. Pt is configured to be a rectangular wave whose phase is shifted by π/2, and the magnetic sensor 1
If the movement of 6 and 17 is in the positive direction, the pulse P advances,
When the movement is in the negative direction, the pulse P advances. Reference numeral 33 denotes a direction discrimination circuit that discriminates the moving direction of the magnetic sensors 16 and 17. For example, the direction is discriminated depending on whether the level of the pulse P at the rising edge of the pulse P1 is "l" or "0". . The output signal Sw of the direction determining circuit 33 is supplied to the up/down switching terminal of the counter 34 and is also output to the outside. The counter 34 is configured to count the pulses PI while switching between up and down depending on the signal Sw. In this embodiment, magnetic sensor 1
When the 6°17 is moving in the positive direction, an up count is performed, and when it is moving in the negative direction, a down count is performed. Also, magnetic sensor I 6.17
Every time the scale 15 rotates once, the 0 fish signal Sz output at the reference position becomes a 0 point pulse Pz after passing through the waveform shaping circuit 32, and this 0 point pulse Pz is sent to the reset terminal R of the counter 34. As a result, the counter 34 is supplied with the magnetic sensor 16,1.
7 is reset each time it reaches the reference position. Therefore, the count value of the counter 34 is equal to the value of the magnetic sensor 16°17
Between the current position and the reference position, the magnetic sensor 16
．． The value corresponds to the number of magnetic sections (the number of magnetic poles) on the scale 15 that 17 has passed through.

Then, the output signal N of the counter 34 is the displacement data Dou.
The count value Φ of the counter 24 constitutes the data of the lower bits of the displacement data Dout.

According to the configuration described above, the magnetic sensor I6. When +7 moves in the positive direction, the counter 34 is activated by the magnetic sensor 16.1.
7 passes through the magnetic section (magnetization pitch), it is counted up, and this count value is the data D out
is output to the upper bits of .

Therefore, if we look at the upper bits of the data Dout,
How many magnetized sections have the magnetic sensors 16 and 17 passed?
In other words, it can be determined at what pitch from the reference position the magnetic sensor 16, 17 is located at the current time.

In addition, the signal sin output from the magnetic sensor 16.17
θ and cos θ are each converted into digital signals by A/D converters 18 and 19, and then multiplied by the signals cos Φ and sin Φ output by the function generator 110M25, and the results of these multiplications are supplied to the subtracter 22 to generate a 5in. (O−Φ) is detected. Then, the count value Φ of the counter 24 increases or decreases depending on the positive or negative value of this 5 inch (θ-Φ), and the outputs sinΦ, cos of the function generation ROM according to the count value Φ
Φ increases or decreases. As a result, the circuit shown in FIG.
A phase-locked loop is created in which the value of θ−Φ) is 0, that is, θ=Φ. therefore,
The count value Φ of the counter 24 becomes data indicating where the magnetic sensor 16 is located within the magnetization section. In this case, if the number of bits of the counter 24 is 8 to IO bits, the detection position resolution based on the count value Φ will be approximately 1/256 to 1/2048 of one magnetization section.

"Problems to be Solved by the Invention" By the way, in the above-mentioned circuit, if the speed of the detection target is extremely slow and the frequency of the input signal supplied to the A/D converter 18j9 is extremely low, the phase-locked loop cannot be solved. is in an equilibrium state, so 5in(θ-Φ) repeats positive/negative inversion near 0. As a result, the U/I of the comparator 23
) signal repeats the inversion of "l"/"0", and the output data Φ repeats small increases and decreases, resulting in a state similar to chattering. That is, the conventional encoder displacement detection circuit described above has a drawback that the output data Φ slightly oscillates when the speed of the detection target is extremely slow.

The present invention was made in view of the above-mentioned circumstances, and an object of the present invention is to provide a displacement detection circuit for an encoder that can always stabilize output data even when the speed of the detection target is extremely slow.

"Means for Solving Problems" The present invention has been made in view of the above-mentioned circumstances, and is based on the output signal of an encoder that outputs an analog sine signal and an analog cosine signal corresponding to the displacement of the detection target. A displacement detection circuit for an encoder that detects displacement of an object includes first and second A/D converters that convert the sine signal and cosine signal into digital signals, and a cosine signal that corresponds to a data value supplied to an input terminal. and a sine value, and a multiplication value of the generated cosine value and the output signal of the first A/D converter, and a multiplication value of the generated sine value and the second A/D converter.
a function generating multiplier that outputs the multiplication value of the output signal of the /D converter, a counting means for counting a predetermined clock signal and supplying the count result to the function generating multiplier; subtractive comparison means that detects a difference between each output signal, and instructs the counting means to count up if the difference exceeds O, and instructs the counting means to count down if the difference exceeds 0;
A delay flip-flop is provided for launching and outputting the count value of the counting means immediately before the timing of either the up or down count instruction of the subtraction comparison means.

Even if the count value of the counting means oscillates within one force count, this oscillation is absorbed by the delay flip-flop, and the output data of the delay flip-flop does not oscillate.

"Embodiments" Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In the figure, parts corresponding to those shown in FIG. 3 are given the same reference numerals, and the explanation thereof will be omitted.

The circuit of this embodiment differs from the circuit shown in FIG. 3 described above only in that a delay flip-flop 40 is added, and the other parts are constructed in the same manner as the circuit shown in FIG. The delay flip-flop 40 is configured such that the data Φ is supplied to the input terminal and the U/D signal of the comparator 23 is supplied to the clock terminal CLK.
The data Φ at the input terminal immediately before the rising edge of the signal 11 is distorted and output as data Φa.

Next, the operation of this embodiment with the above configuration will be explained.

FIG. 2 is a waveform diagram showing an example of changing states of the U/D signal. As shown in this figure, the U/D signal is at time t. Assuming that it is "bi" from 1 to time t1, the counter 24 performs up-counting during this period, so the data Φ increases.In addition, the output data Φa of the delay flip-flop 40 is determined by the rising edge of the U/D signal. Since there is no update, the previous value is maintained.

Then, when the speed of the detection target decreases significantly (or almost stops) during the period t1 to L8, for example, when the time elapses,
When the phase-locked loop is balanced, θ=Φ, and as a result, the U/[) signal of the comparator 23 becomes 0. When this U/I) signal becomes 0, the counter 24
counts down the clock signal CK by 1, and the value of data Φ decreases by 1 (the value of Φ at this time is assumed to be k). Then, when the data Φ decreases by 1, if the detection target has hardly moved, the value of 5 inches (θ-Φ) becomes positive again, and as a result, the U/D signal becomes "1" at time t. U
When the /D signal becomes "l", the counter 24 increments the clock signal CK by 1, thereby increasing the value of data Φ by 1 to (k+1). The value of data Φ is (k
+1), the time is reached and the U/[) signal becomes 0”
Then, the counter 24 switches to up-counting. That is, from then on, the above-mentioned operation is repeated until the detection target starts moving at a relatively high speed, and the data Φ
The value of oscillates in the range of k and (k+1).

Next, the value of data Φa during the above-mentioned period t1 to L8 will be explained. First, at time t2 when the U/I) signal rises for the first time, the value of Φ immediately before that is launched, so the value of data Φa is updated to k. Then, at both times t4 and t6 when the U/I) signal rises next, the value of Φ immediately before that is k, and as a result, the value of data Φa does not change between times Ll and tll. First, the value k is maintained stably. The above value does not change until the U/I) signal rises again after time L8. Further, the above-described operation is exactly the same when the detection target moves in the opposite direction.

In addition, although the above embodiment is an example in which a magnetic type encoder is used as the displacement detection encoder, an optical type or an electromagnetic type may be used as the encoder.

"Effects of the Invention" As explained above, according to the present invention, an encoder for detecting a displacement of a detection target from an output signal of an encoder outputting an analog sine signal and an analog cosine signal corresponding to the displacement of the detection target. The displacement detection circuit includes first and second A/D converters that convert the sine signal and cosine signal into digital signals, and generates a cosine value and a sine value corresponding to the data value supplied to the input terminal. ,
Function generation multiplication that outputs the multiplication value of the generated cosine value and the output signal of the first A/D converter, and the multiplication value of the generated sine value and the output horn signal of the second A/D converter, respectively. Detects the difference between each output signal of the function generation multiplication section, a counting means for counting a predetermined clock signal, and supplying the count result to the function generation multiplication section, and detects the difference between the output signals of the function generation multiplication section.
subtractive comparison means that instructs the counting means to count up if the difference exceeds 0, and instructs the counting means to count down if the difference exceeds 0; Since it is equipped with a delay flip-flop that latches and outputs the count value of the counting means immediately before one of the timings, it has the advantage that the output data can always be stabilized even when the speed of the detection target is extremely slow. can get.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, FIG. 2 is a waveform diagram showing an example of change in the U/I) signal in the same embodiment, and FIG. 3 is the configuration of a conventional change detection circuit for an encoder. FIG. 18.19...A/D converter (11th 2nd A
/D converter), 20.21...Function generation ROM
(function generation multiplication unit), 22... subtractor (subtraction comparison means), 23... comparator (subtraction comparison means),
24... Counter (counting means), 25...
...Function generation ROM (function generation multiplication section), 40...
...Delay flip-flop.

Claims (1)

[Scope of Claims] A displacement detection circuit for an encoder that detects a displacement of the detection target from an output signal of an encoder that outputs an analog sine signal and an analog cosine signal corresponding to the displacement of the detection target, comprising: first and second A/D converters that convert the data value into a digital signal, and generate a cosine value and a sine value corresponding to the data value supplied to the input terminal, and a function generation multiplication unit that outputs a multiplication value of the output signal of the A/D converter and a multiplication value of the generated sine value and the output signal of the second A/D converter; A counting means for supplying the count result to the function generation multiplication section and a difference between each output signal of the function generation multiplication section is detected, and if this difference exceeds 0, an instruction is given to the counting means to count up, and the difference is subtraction comparison means for instructing the counting means to down-count if 1. A displacement detection circuit for an encoder, comprising a delay flip-flop that outputs an output.