JPS62209891A - Manufacture of printed circuit board - Google Patents
Manufacture of printed circuit boardInfo
- Publication number
- JPS62209891A JPS62209891A JP61050601A JP5060186A JPS62209891A JP S62209891 A JPS62209891 A JP S62209891A JP 61050601 A JP61050601 A JP 61050601A JP 5060186 A JP5060186 A JP 5060186A JP S62209891 A JPS62209891 A JP S62209891A
- Authority
- JP
- Japan
- Prior art keywords
- land
- printed circuit
- hole
- circuit board
- punching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 238000004080 punching Methods 0.000 claims description 20
- 238000000034 method Methods 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 7
- 229910052751 metal Inorganic materials 0.000 claims description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 6
- 238000005530 etching Methods 0.000 description 6
- 238000005476 soldering Methods 0.000 description 6
- 239000004744 fabric Substances 0.000 description 5
- 239000011888 foil Substances 0.000 description 5
- 239000011889 copper foil Substances 0.000 description 4
- 230000007547 defect Effects 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- 239000011347 resin Substances 0.000 description 4
- 239000004745 nonwoven fabric Substances 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- 229920000742 Cotton Polymers 0.000 description 2
- 239000010425 asbestos Substances 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 229910052895 riebeckite Inorganic materials 0.000 description 2
- 239000012209 synthetic fiber Substances 0.000 description 2
- 229920002994 synthetic fiber Polymers 0.000 description 2
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 description 1
- 239000004641 Diallyl-phthalate Substances 0.000 description 1
- 239000004640 Melamine resin Substances 0.000 description 1
- 229920000877 Melamine resin Polymers 0.000 description 1
- 239000005062 Polybutadiene Substances 0.000 description 1
- 229920001807 Urea-formaldehyde Polymers 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- QUDWYFHPNIMBFC-UHFFFAOYSA-N bis(prop-2-enyl) benzene-1,2-dicarboxylate Chemical compound C=CCOC(=O)C1=CC=CC=C1C(=O)OCC=C QUDWYFHPNIMBFC-UHFFFAOYSA-N 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- DZCLVBQEPZQZNN-UHFFFAOYSA-N copper;phenol Chemical compound [Cu].OC1=CC=CC=C1 DZCLVBQEPZQZNN-UHFFFAOYSA-N 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920002857 polybutadiene Polymers 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 229920006337 unsaturated polyester resin Polymers 0.000 description 1
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、印刷回路板のランド部のハンダ付は性を改良
した印刷回路板の製造方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to a method of manufacturing a printed circuit board in which the soldering properties of the land portions of the printed circuit board are improved.
印刷回路板は、銅張り積層板をエツチングして回路を作
り、その上にソルダーレジストを印刷した後、打抜プレ
スで打抜かれて作られている。Printed circuit boards are made by etching a copper-clad laminate to form a circuit, printing a solder resist on top of the circuit, and then punching it out using a punching press.
従来、打抜前の印刷回路板において、打抜ピンで打抜か
れる回路のランド部は、直径０．５鶴以下の丸いランド
穴がおいているか、又は、穴なしの状態で打抜ブレスで
打抜かれていた。この現行のランド形状では、ランド部
のハンダ付は性が弱い欠点を持っている。パターンの細
線化にともない、最近ピン径が小さくなり、ピン間が狭
くなってきたため、打抜き時基板と銅箔の剥離が起きや
すくなり、部品を印刷回路板に載せハンダ付けした後、
わずかな衝撃で、ランドのハンダ付は部が剥がれ、部品
が脱落してしまうという不良が問題となってきた。Conventionally, in a printed circuit board before punching, the land part of the circuit punched out with a punching pin has a round land hole with a diameter of 0.5 mm or less, or has no hole and is punched with a punching press. It had been punched out. This current land shape has the disadvantage that soldering of the land portion is weak. As patterns have become thinner, the pin diameter has recently become smaller and the distance between the pins has become narrower, making it easier for the copper foil to peel off from the board during punching.
A problem has been that even the slightest impact can cause parts of the soldered land to peel off and parts to fall off.
本発明者らは、このような印刷回路板から部品が脱落す
るという不良を起こさない印刷回路板の製造方法を得ん
として検討したきた結果、ランド穴を大きくすることに
よってランド部のハンダ付は性を高めることが出来ると
の知見を得、更にこの知見に基づき種々研究を進めて本
発明を完成するに至ったものである。The inventors of the present invention have studied to find a method for manufacturing printed circuit boards that does not cause defects such as parts falling off from the printed circuit board, and as a result, they found that by enlarging the land holes, soldering at the land portions can be prevented. Based on this knowledge, we conducted various studies and completed the present invention.
本発明は、片面又は両面金属箔張り積層板を用いて、印
刷回路板を製造するにあたり、打抜前の回路のランド部
に打抜ピンの外径と同じないし、それより０．２鰭まで
小さい半径の円形のランド穴を形成し、しかる後、ラン
ド部を打抜くことを特徴とする印刷回路板の製造方法で
ある。In manufacturing a printed circuit board using a single-sided or double-sided metal foil-covered laminate, the present invention provides a land portion of the circuit before punching that has an outer diameter that is equal to or 0.2 fins larger than the outer diameter of the punching pin. This method of manufacturing a printed circuit board is characterized in that a circular land hole with a small radius is formed, and then a land portion is punched out.
ランドの穴の大きさは、打抜ピンの外径と同じないし、
それより０．１龍小さい半径の円形が好ましい。The size of the hole in the land is not the same as the outer diameter of the punching pin,
A circle with a radius 0.1 dragon smaller than that is preferable.
本発明に用いられる金属箔張り積層板の金属箔は銅を中
心とした金属箔全般である。又、積層板用樹脂は、フェ
ノール樹脂、メラミン樹脂、ユリア樹脂、エポキシ樹脂
、ジアリルフタレート樹脂、不飽和ポリエステル樹脂、
ポリイミド樹脂、ポリブタジェン樹脂等の熱硬化性樹脂
全般である。The metal foil of the metal foil-clad laminate used in the present invention is any metal foil mainly made of copper. In addition, resins for laminates include phenolic resin, melamine resin, urea resin, epoxy resin, diallyl phthalate resin, unsaturated polyester resin,
Thermosetting resins in general, such as polyimide resins and polybutadiene resins.
積層板用基材は、繊維素紙、木綿布、木綿不織布、合成
繊維布、合成繊維不織布、アスベスト布、アスベスト布
、ガラス布、ガラス繊維不織布などである。The base material for the laminate includes fiber paper, cotton cloth, cotton nonwoven fabric, synthetic fiber cloth, synthetic fiber nonwoven fabric, asbestos cloth, asbestos cloth, glass cloth, glass fiber nonwoven fabric, and the like.
エツチング前のエツチングレジストの回路印刷方法とし
ては、スクリーン法、写真法等、特に限定されない。The circuit printing method of the etching resist before etching is not particularly limited, and may be a screen method, a photographic method, or the like.
回路形成時、ランドの穴は、第１図に示すように印刷さ
れる。（第１図の外円形は、打抜ピンで打抜かれる部分
を示し、斜線は、エツチングされる部分を示す、）その
後、エツチングにより回路が形成され、同時に上記のラ
ンド穴が形成される。During circuit formation, the land holes are printed as shown in FIG. (The outer circle in FIG. 1 indicates the part to be punched out with a punching pin, and the diagonal line indicates the part to be etched.) Thereafter, a circuit is formed by etching, and at the same time, the above-mentioned land holes are formed.
又、エツチング以外の方法として、エツチングの前又は
後において、積層板の金属箔の打抜かれる所にあらかじ
め前記形状のランド穴を切削機等で切っておいたり、打
抜ピンの先端に、上記の形の刃をつけて打抜寸前に金属
箔のランド上に切り込みを入れランド穴を作ってもよい
。In addition, as a method other than etching, before or after etching, a land hole of the shape described above is cut in advance with a cutting machine or the like at the location where the metal foil of the laminate is to be punched, or a land hole of the shape described above is cut at the tip of a punching pin. You may also attach a blade in the shape of and make a notch on the land of the metal foil just before punching to create a land hole.
印刷回路板を製造するにあたって、打抜ピンで打抜かれ
る直前までに前記の如き形状のランド穴を作る方法は、
どのような方法を使ってもよいが、ランド穴は現行の大
きさよりかなり大きいことを必要とする。In manufacturing printed circuit boards, the method of making land holes in the shape described above just before punching with a punching pin is as follows:
Whatever method is used, the land holes will need to be significantly larger than the current size.
上記のようなランド形状がよい理由は、従来のランド穴
（第２図）では、第４図に示された部品搭載後の回路板
の断面図のように、銅箔（２）の切断面は、穴の内側ま
で銅箔が入り込まないが、それに比べて、本発明のラン
ド穴（第３図）では、第５図のように、銅箔（２）の切
断面が、穴の内側まで入り込んでいる。このようにして
、従来のランド穴に比べて、本発明のランド穴の方はハ
ンダの載る面積が広（なるためハンダ付は性が改良され
る。The reason why the above-mentioned land shape is good is that the conventional land hole (Fig. 2) does not allow the cut surface of the copper foil (2) to In contrast, in the land hole of the present invention (Fig. 3), the cut surface of the copper foil (2) does not penetrate to the inside of the hole, as shown in Fig. 5. I'm getting into it. In this way, compared to the conventional land hole, the land hole of the present invention has a larger surface area for solder (thereby improving soldering properties).
本発明方法に従うと、ハンダ付は性が改良され、印刷回
路板に部品搭載後、部品が脱落するという不良を減少さ
せることができる。その上、印刷回路板製造における打
抜工程時による打抜箔穴詰まりの不良を減少させること
が出来る。以上のように本発明の方法は、不良が少なく
なるすぐれた製造方法である。According to the method of the present invention, soldering properties are improved and defects such as parts falling off after being mounted on a printed circuit board can be reduced. Moreover, defects such as punched foil hole clogging during the punching process in printed circuit board manufacturing can be reduced. As described above, the method of the present invention is an excellent manufacturing method with fewer defects.
実施例として、第３図（ａ）に示すランド穴形状の回路
板を使用した。積層板は、厚さ１．５ ｍｍＯ祇フエフ
エノール銅張積層板いた。打抜ピンの径は１．０ ａｍ
とし、５０枚の積層板をテストした。As an example, a circuit board having a land hole shape shown in FIG. 3(a) was used. The laminate was a 1.5 mm thick phenol copper clad laminate. The diameter of the punching pin is 1.0 am
50 laminates were tested.
各積層板よりｎ＝５でランドプルテストを行い、それを
平均してランド部の引っ張り強さを求めた。A land pull test was performed on each laminate with n=5, and the results were averaged to determine the tensile strength of the land portion.
比較例として、第３図（ｂ）に示す従来のランド穴を使
用し、実施例のランド穴の場合と同様にテストを行った
。結果は、表−１の通りである。As a comparative example, a conventional land hole shown in FIG. 3(b) was used and tested in the same manner as in the case of the land hole of the embodiment. The results are shown in Table-1.
表−１ランドプルテスト
表−１かられかるようにランド穴の大きさを従来のもの
より大きく、打抜ピンの外径と同じないし、それより０
．２鰭まで小さい半径とすることによって、ハンダ付は
性を改良することができた。Table 1 Land pull test As shown in Table 1, the size of the land hole is larger than the conventional one, and it is not the same as the outer diameter of the punching pin, and is less than 0.
．． By reducing the radius to two fins, the soldering properties could be improved.
第１図は、本発明のランド穴の形状であり、第２図は、
従来のランド穴の形状の例である。第３図（ａ）及び（
ｂ）は、それぞれ本発明の実施例及び比較例のランド穴
の形状である。外円形は打抜かれる部分を示し、斜線部
分は、工・ノチングされたランド穴を示す。
第４図は、従来の場合における部品搭載後の打抜穴の断
面図であり、第５図は、本発明の場合における部品搭載
後の打抜穴の断面図である。
（１）はハンダ、（２）は銅箔、（３）は基板、（４）
は部品のリード線を示す。
特許出願人 住友ヘークライト株式会社第１図 第２
図
第４図 第５図Fig. 1 shows the shape of the land hole of the present invention, and Fig. 2 shows the shape of the land hole of the present invention.
This is an example of the shape of a conventional land hole. Figure 3(a) and (
b) is the shape of the land hole of the example of the present invention and the comparative example, respectively. The outer circle indicates the part to be punched, and the shaded area indicates the drilled/notched land hole. FIG. 4 is a cross-sectional view of the punched hole after parts are mounted in the conventional case, and FIG. 5 is a cross-sectional view of the punched hole after parts are mounted in the case of the present invention. (1) is solder, (2) is copper foil, (3) is board, (4)
indicates the lead wire of the component. Patent applicant: Sumitomo Heckleite Co., Ltd. Figure 1 Figure 2
Figure 4 Figure 5
Claims (1)
を製造するにあたり、打抜前の回路のランド部に打抜ピ
ンの外径と同じないし、それより０．２ｍｍまで小さい
半径の円形のランド穴を形成し、しかる後、ランド部を
打抜くことを特徴とする印刷回路板の製造方法。When manufacturing printed circuit boards using single-sided or double-sided metal foil-covered laminates, a circular shape with a radius equal to or 0.2 mm smaller than the outer diameter of the punching pin is placed on the land of the circuit before punching. A method for manufacturing a printed circuit board, comprising forming land holes and then punching out the land portions.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61050601A JPS62209891A (en) | 1986-03-10 | 1986-03-10 | Manufacture of printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61050601A JPS62209891A (en) | 1986-03-10 | 1986-03-10 | Manufacture of printed circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62209891A true JPS62209891A (en) | 1987-09-16 |
Family
ID=12863484
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61050601A Pending JPS62209891A (en) | 1986-03-10 | 1986-03-10 | Manufacture of printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62209891A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0670779U (en) * | 1993-02-01 | 1994-10-04 | 有限会社山下製作所 | Terminal pin mounting structure on circuit board of pachinko machine |
-
1986
- 1986-03-10 JP JP61050601A patent/JPS62209891A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0670779U (en) * | 1993-02-01 | 1994-10-04 | 有限会社山下製作所 | Terminal pin mounting structure on circuit board of pachinko machine |
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