JPS62203522U - - Google Patents

Info

Publication number
JPS62203522U
JPS62203522U JP9054686U JP9054686U JPS62203522U JP S62203522 U JPS62203522 U JP S62203522U JP 9054686 U JP9054686 U JP 9054686U JP 9054686 U JP9054686 U JP 9054686U JP S62203522 U JPS62203522 U JP S62203522U
Authority
JP
Japan
Prior art keywords
level
processing circuit
rectangular wave
respond
outputting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9054686U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9054686U priority Critical patent/JPS62203522U/ja
Publication of JPS62203522U publication Critical patent/JPS62203522U/ja
Pending legal-status Critical Current

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  • Manipulation Of Pulses (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例としての信号処理回
路を示す回路図、第2図および第3図はそれぞれ
テープを巻き始めた時点、巻き終える直前の時点
における増幅信号VAと矩形波出力信号VOUT
の波形図、である。 A……信号処理回路、OP―1,OP―2……
オペアンプ半分体、VCC……電源、VIN……
入力信号、VA……増幅信号、VOUT……矩形
波出力信号。
Fig. 1 is a circuit diagram showing a signal processing circuit as an embodiment of the present invention, and Figs. 2 and 3 show an amplified signal VA and a rectangular wave output signal at the time when the tape starts to be wound and just before it ends, respectively. VOUT
This is a waveform diagram of A... Signal processing circuit, OP-1, OP-2...
Op-amp half, VCC... power supply, VIN...
Input signal, VA...amplified signal, VOUT...square wave output signal.

Claims (1)

【実用新案登録請求の範囲】 ノイズを含む微小レベルの信号を増幅する第1
の素子と、 該第1の素子から出力された増幅信号を、該ノ
イズのレベルに応答しないように設定された所定
のレベルと比較し、該比較に基づいて論理レベル
の矩形波信号を出力する第2の素子とを備え、 単一の電源により作動する1個の演算増幅器を
該第1の素子および第2の素子として用いたこと
を特徴とする信号処理回路。
[Claims for Utility Model Registration]
and comparing the amplified signal output from the first element with a predetermined level set not to respond to the noise level, and outputting a logic-level rectangular wave signal based on the comparison. A signal processing circuit comprising: a second element, wherein one operational amplifier operated by a single power source is used as the first element and the second element.
JP9054686U 1986-06-16 1986-06-16 Pending JPS62203522U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9054686U JPS62203522U (en) 1986-06-16 1986-06-16

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9054686U JPS62203522U (en) 1986-06-16 1986-06-16

Publications (1)

Publication Number Publication Date
JPS62203522U true JPS62203522U (en) 1987-12-25

Family

ID=30950511

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9054686U Pending JPS62203522U (en) 1986-06-16 1986-06-16

Country Status (1)

Country Link
JP (1) JPS62203522U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5193656A (en) * 1975-02-14 1976-08-17

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5193656A (en) * 1975-02-14 1976-08-17

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