JPS6220093A - Inspecting device for printed character or the like - Google Patents

Inspecting device for printed character or the like

Info

Publication number
JPS6220093A
JPS6220093A JP60159535A JP15953585A JPS6220093A JP S6220093 A JPS6220093 A JP S6220093A JP 60159535 A JP60159535 A JP 60159535A JP 15953585 A JP15953585 A JP 15953585A JP S6220093 A JPS6220093 A JP S6220093A
Authority
JP
Japan
Prior art keywords
circuit
digital
value
signal
gradation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60159535A
Other languages
Japanese (ja)
Inventor
Toshiaki Sasano
笹野 利明
Hitoshi Ishii
均 石井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanki Denshi Kogyo KK
Original Assignee
Sanki Denshi Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanki Denshi Kogyo KK filed Critical Sanki Denshi Kogyo KK
Priority to JP60159535A priority Critical patent/JPS6220093A/en
Publication of JPS6220093A publication Critical patent/JPS6220093A/en
Pending legal-status Critical Current

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  • Image Processing (AREA)
  • Image Analysis (AREA)

Abstract

PURPOSE:To generate no fatigue of an eye without dropping the inspection accuracy, by combining a visual inspection and an optical inspection. CONSTITUTION:When executing the learning, at the time of an inspection for correcting a total value of addition of an adding circuit 12 by collating with the naked eye an image of a printed character part drawn on a video surface of a monitor 19 and an image of a printed character part in a standard pattern, a data signal corresponding to a pattern to be inspected is binary-coded, based as a reference on a set digital value in a digital value setting circuit 16 in case when an added value of an adding circuit 13 has coincided with the total value of addition of the adding circuit 12, an equivalent area is corrected automatically in accordance with variable density of the printed character. Further, binary-coding signals which have been read in a memory 18 and 20 are compared successively, by which the pattern to be inspected is inspected by position information. In this way, a result of inspection being extremely similar to an inspection by the naked eye can be obtained.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、例えば、各種電子部品、各種電子機器、又は
、その他の各種製品に直接或いはこれらに取付ける銘板
に押捺又は印刷された品名、製造会社名等を表わす文字
或いは商標等(以下、印刷文字と略記する)が鮮明に押
捺又は印刷されているか否か、誤字又は脱字等の有無等
を検査する印刷文字等の検査装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is applicable to, for example, various electronic parts, various electronic devices, or other various products, or product names and manufacturing company names stamped or printed on name plates attached to these products. This invention relates to an inspection device for printed characters, etc., which inspects whether or not characters or trademarks (hereinafter abbreviated as printed characters) representing the above are clearly stamped or printed, and whether there are typos or omissions.

従来の技術 従来、このような検査は、肉眼を以て行うか、テレビジ
ョンにおける撮像カメラのような光電変換センサを用い
、その光電変換出力信号を2値化して印刷文字の周辺一
定範囲における地膚部分に対応する信号と印刷文字部分
に対応する信号に分離し、標準パターンにおける印刷文
字部分に対応する信号の総量と、被検査パターンにおけ
る印刷文字部分に対応する信号の総量とを比較し、両者
の比から印刷文字の良否を判定する装置を用いて検査を
行っている。
Conventionally, such inspections have been carried out with the naked eye or by using a photoelectric conversion sensor such as an imaging camera in a television, and binarizing the photoelectric conversion output signal to detect the skin area in a certain area around the printed characters. The total amount of signals corresponding to the printed character portion in the standard pattern is compared with the total amount of signals corresponding to the printed character portion in the pattern to be inspected. Inspection is performed using a device that determines the quality of printed characters based on the ratio.

発明が解決しようとする問題点 肉眼による検査の場合は、疲労のために多数の検査を連
続して行うことは不可能であり、前記のような検査装置
においては、次のような欠点を免れることが出来ない。
Problems to be Solved by the Invention In the case of visual inspection, it is impossible to perform a large number of inspections in succession due to fatigue, and the above-mentioned inspection device avoids the following drawbacks. I can't do that.

即ち、印刷機又は押捺機等を用いて文字等の印刷又は押
捺を連続して行う場合、インクの補充直後においては必
要以上に濃く印刷又は押捺が行われ、インクの量が減少
するにしたがって漸次淡くなるのが=・般である。
In other words, when printing or stamping characters etc. continuously using a printing machine or stamping machine, etc., the printing or stamping will be done darker than necessary immediately after replenishing the ink, and as the amount of ink decreases, the printing or stamping will gradually become darker. It is normal for it to become pale.

第3図における(イ)図は遣い印刷文字の一例を示し、
(ロ)図は淡い印刷文字の一例を示すもので、(ハ)図
は、(イ)図の細い横線で示した走査部分に対応する光
電変換センサの検出出力信号の反転波形を示し、(ニ)
図は、(ロ)図の細い横線で示した走査部分に対応する
光電変換センサの検出出力信号の反転波形で、(ハ)図
及び(ニ)図の各横軸は検出位置P、各縦軸は階調値T
であるが、両図から明らかなように、印刷文字の濃淡に
応じて検出信号の大きさが異なるのは当然であるが、地
膚と印刷文字の境界に対応する信号の立上り及び立下り
部分に傾斜を有し、印刷文字が淡い程、立上り及び立下
り部分の傾斜が緩やかとなる傾向を有する。これは光電
変換センサの検出特性に因るもので、現在一般に入手し
得る光電変換センサに共通の現象である。
Figure (a) in Figure 3 shows an example of printed characters,
(B) Figure shows an example of pale printed characters, (C) Figure shows (B) the inverted waveform of the detection output signal of the photoelectric conversion sensor corresponding to the scanning part indicated by the thin horizontal line in the figure, and ( D)
The figure shows the inverted waveform of the detection output signal of the photoelectric conversion sensor corresponding to the scanning part indicated by the thin horizontal line in (B), and the horizontal axes in (C) and (D) indicate the detection position P and each vertical axis. The axis is the gradation value T
However, as is clear from both figures, it is natural that the magnitude of the detection signal differs depending on the density of the printed character, but the rising and falling portions of the signal corresponding to the boundary between the background and the printed character There is a tendency that the lighter the printed character, the gentler the slope of the rising and falling portions. This is due to the detection characteristics of the photoelectric conversion sensor, and is a common phenomenon among currently available photoelectric conversion sensors.

したがって、()つ図及び(ニ)図に示した信号を同一
基準レベルを用いて2値化し、この基準レベル以上の信
号に対応するディジタル信号′“1°゛を印刷文字部分
に対応する信号とし、基準レベル以下の信号に対応する
ディジタル信号゛0°゛を地層部分に対応する信号とし
て印刷文字の周辺における一定範囲内のディジタル信号
“1°゛の総数を求めた場合、印刷文字が淡い程ディジ
タル信号”1 IIの総数が小となるから、標準パター
ンよりも淡い印刷文字及び濃い印刷文字はすべて不良品
となり、肉眼による検査結果とは著しく異なったものと
なる。
Therefore, the signals shown in Figures () and (D) are binarized using the same reference level, and the digital signal '1°' corresponding to the signal above this reference level is converted into a signal corresponding to the printed character part. If we calculate the total number of digital signals "1°" within a certain range around the printed characters by using the digital signal "0°" corresponding to the signal below the reference level as the signal corresponding to the stratum, we can find that the printed characters are pale. Since the total number of digital signals "1 II" becomes smaller, all printed characters that are lighter or darker than the standard pattern are considered defective products, and the results are significantly different from the inspection results with the naked eye.

被検査パターンにおける印刷文字の濃淡に応じて2値化
のための基準レベルを上下に変動せしめることにより、
良品の範囲を拡大せしめることは可能であるが、印刷文
字の濃淡と基準レベルの変動幅の関係を把握する手段を
欠くため、基準レベルの変動幅の設定は全く適当に行う
他はなく、変動幅を拡大し過ぎるときは不良品をも良品
とみなすおそれがあり、肉眼による検査と同等の結果を
得ることは側底不可能である。
By varying the reference level for binarization up and down according to the shading of printed characters in the pattern to be inspected,
Although it is possible to expand the range of non-defective products, there is no way to grasp the relationship between the shading of printed characters and the fluctuation range of the standard level, so there is no choice but to set the fluctuation range of the standard level completely appropriately. When the width is expanded too much, there is a risk that defective products may be considered good products, and it is impossible to obtain results equivalent to inspection with the naked eye.

更に、印刷機又は押捺機を用い、或は手動て文字等を印
刷又は押捺するに当って、地膚に凹凸がある場合、地膚
に凹凸が無くとも活字面が地膚に均一に圧着されないよ
うな場合、又は地膚と活字面との間に塵埃等が混入介在
したような場合等には、印刷文字の一部に欠落部を生ず
ることとなるが、このような場合には印刷文字部分の面
積に対応する信号の総数を求めるのみでは、印刷文字が
淡い場合と印刷文字の一部に欠落部がある場合との識別
が不可能で、不良品を良品と、逆に良品を不良品と誤っ
て判断するおそれがある。
Furthermore, when printing or stamping characters, etc. using a printing machine, stamping machine, or manually, if the background is uneven, the type surface will not be pressed uniformly to the background even if there is no unevenness on the background. In such cases, or in cases where dust or the like is present between the background and the typeface, a portion of the printed characters may be missing. By simply calculating the total number of signals corresponding to the area of a part, it is impossible to distinguish between cases where the printed characters are pale and cases where there is a missing part of the printed characters, and it is impossible to distinguish between a case where the printed characters are pale or a part of the printed characters is missing. There is a risk of incorrectly determining that the product is good.

問題点を解決するための手段、実施例 第1図は、本発明の一実施例を示すブロック線図で、1
は光源、2は光電変換センサで、例えば、テレビジョン
における撮像カメラのように、結像面を走査して像の濃
淡に応じた大きさの電気信号を順次送出するように構成
した光電変換センサより成る。又、このようなセンサと
同等の作用効果を呈し得るセンサ、例えば、光学レンズ
の光軸によって被写体28を走査し、入射光量に応じた
大きさの電気信号を送出するセンサを用いるか、被写体
全域からの光を受光し得るように光学レンズ系を固定し
て設けると共に、光源lの発する光を則いビーム状に形
成し、このビーム光線によって被写体28を走査し、入
射光量に応じた大きさの電気信号を送出するように構成
したセンサを用いてもよい。尚、図には、被写体28か
らの反射光を光電変換センサ2に入射せしめるように構
成した場合を例示したが、被写体28の材質によっては
透過光を入射せしめるように構成しても本発明を実施す
ることが出来る。3はアナログ・ディジタル変換回路、
4は階調付画像メモリで、アナログ・ディジタル変換回
路3の出力ディジタル信号を読込み、前記被写体の画素
分布パターンに対応した番地に記憶する。5はゲート回
路、6は階調値分布計算回路で、例えば、複数個のデト
ジタル形比較回路71乃至7゜(nは任意の正の整数)
、各比較回路毎に設けたパルスカウンタ81乃至8n及
び陰極線オシロスコープ9より成る。尚、アナログ・デ
ィジタル変換回路3の出力ディジタル信号のビット数に
応じて表わし得る階調値の数と比較回路71乃至7nの
個数を一致せしめると共に、各比較回路の比較基準ディ
ジタル値を互に異ならしめである。(例えば、ディジタ
ル出力信号を8ビツト構成とした場合には、比較回路7
1乃至7nの数を256個に選ぶ。)10は走査形量閉
回路で、開閉制御パルス信号が加えられる毎にパルスカ
ウンタ81乃至8nの各出力回路を、順次選択的に閉成
する。 ”は切換スイッチ、12及び13は加算回路、
■4はディジタル形比較回路、15はz値化回路、16
はディジタル値設定回路で、2値化回路15は、例えば
、ディジタル形比較回路より成り、ディジタル値設定回
路16は、例えば、パルスカウンタより成ると共に、2
値化回路15において階調付画像メモリ4から読出され
たデータ信号をディジタル値設定回路16の設定ディジ
タル値と比較し、データ信号が設定ディジタル値より大
か一致する場合にディジタル信号“t”を送出し、デー
タ信号が設定ディジタル値より小なる場合にディジタル
信号“°O゛′を送出する。17は切換スイッチ、1日
はメモリ、18はモニタで、テレビジョン受像機より成
り、そのlフレームの走査周期と同期してメモリ18か
ら読出されたディジタル信号“1′及びディジタル信号
“0パが導入される。20はメモリ、21は排他的論理
和回路、22はプリセットカウンタ、23は警報回路、
24は被写体検出センサで、例えば、被写体からの反射
又は透過光を受けて電気信号を送出する光電変換形セン
サ、或いは被写体を順次送るベルトコンベア等に、被写
体に対応する間隔毎に設けた磁性体片の近接に応じて閉
成するリードスイッチ等より成る。25は制御信号発生
回路で、例えば、クロックパルス発振回路、その発振出
力の分周回路、この分周回路における出力回路の開閉素
子等より成る。26は分周回路における出力回路の開閉
素子の手動操作つまみ、27はリセッ]・信号送出回路
の開閉素子の手動操作つまみである。
Means for Solving Problems, Embodiment FIG. 1 is a block diagram showing an embodiment of the present invention.
2 is a light source, and 2 is a photoelectric conversion sensor configured to scan an imaging plane and sequentially send out electrical signals of a size corresponding to the darkness of the image, for example, like an imaging camera in a television. Consists of. In addition, a sensor that can exhibit the same effect as such a sensor, for example, a sensor that scans the subject 28 with the optical axis of an optical lens and sends out an electrical signal of a size according to the amount of incident light, or a sensor that scans the subject 28 with the optical axis of an optical lens, or An optical lens system is fixedly provided so as to be able to receive light from the light source 1, and the light emitted by the light source 1 is formed into a beam shape, and the object 28 is scanned by this beam ray, and the size is adjusted according to the amount of incident light. A sensor configured to send out an electrical signal may also be used. Note that although the figure shows an example of a configuration in which the reflected light from the subject 28 is made to enter the photoelectric conversion sensor 2, the present invention may also be implemented in a configuration in which transmitted light is made to enter the photoelectric conversion sensor 2 depending on the material of the subject 28. It can be implemented. 3 is an analog-to-digital conversion circuit;
Reference numeral 4 denotes a gradation image memory which reads the output digital signal of the analog-to-digital conversion circuit 3 and stores it at an address corresponding to the pixel distribution pattern of the subject. 5 is a gate circuit; 6 is a gradation value distribution calculation circuit; for example, a plurality of digital comparison circuits 71 to 7° (n is any positive integer);
, pulse counters 81 to 8n provided for each comparison circuit, and a cathode ray oscilloscope 9. It should be noted that the number of gradation values that can be expressed according to the number of bits of the output digital signal of the analog-to-digital conversion circuit 3 is made to match the number of comparison circuits 71 to 7n, and the comparison reference digital values of each comparison circuit are made to be different from each other. It is closed. (For example, when the digital output signal has an 8-bit configuration, the comparator circuit 7
Select 256 numbers from 1 to 7n. ) 10 is a scanning type closed circuit which sequentially selectively closes each output circuit of the pulse counters 81 to 8n every time an opening/closing control pulse signal is applied. ” is a changeover switch, 12 and 13 are addition circuits,
■4 is a digital comparison circuit, 15 is a z value conversion circuit, 16
is a digital value setting circuit, the binarization circuit 15 is made up of, for example, a digital type comparison circuit, and the digital value setting circuit 16 is made up of, for example, a pulse counter;
The value conversion circuit 15 compares the data signal read from the gradation image memory 4 with the set digital value of the digital value setting circuit 16, and when the data signal is greater than or equal to the set digital value, the digital signal "t" is set. When the data signal is smaller than the set digital value, a digital signal "°O゛' is sent out. 17 is a changeover switch, 1st is a memory, 18 is a monitor, which consists of a television receiver, and its l frame. A digital signal "1'" and a digital signal "0" read from the memory 18 are introduced in synchronization with the scanning period of . 20 is a memory, 21 is an exclusive OR circuit, 22 is a preset counter, and 23 is an alarm circuit. ,
Reference numeral 24 denotes an object detection sensor, for example, a photoelectric conversion type sensor that receives reflected or transmitted light from the object and sends out an electrical signal, or a magnetic body installed at intervals corresponding to the objects on a belt conveyor that sequentially conveys the objects. It consists of a reed switch, etc. that closes when a piece approaches. Reference numeral 25 denotes a control signal generation circuit, which includes, for example, a clock pulse oscillation circuit, a frequency division circuit for its oscillation output, a switching element for an output circuit in this frequency division circuit, and the like. 26 is a manual operation knob for the switching element of the output circuit in the frequency dividing circuit, and 27 is a manual operation knob for the switching element of the reset/signal sending circuit.

尚、制御信号発生回路25から走査形量閉回路゛10及
びディジタル値設定回路16への制御信号発生回路並に
被写体検出センサ24から制御信号発生回路25への検
出信号送出回路を除いて光電変換センサ2以下の所要各
回路への制御信号送出回路は、これを図示するのを省略
しである。
Note that, except for the control signal generation circuit from the control signal generation circuit 25 to the scanning closed quantity circuit 10 and the digital value setting circuit 16, and the detection signal transmission circuit from the subject detection sensor 24 to the control signal generation circuit 25, photoelectric conversion is performed. The illustration of the control signal sending circuit to each necessary circuit after the sensor 2 is omitted.

切換スイッチ”及び17を接点S側に切換え、被写体2
8として標準パターンを選択して光電変換センサ2の前
面に位置せしめると、被写体検出センサ24からの検出
信号が制御信号発生回路25に加えられて、これを始動
せしめ、制御信号発生回路25から光電変換センサ2以
下の所要回路に対して所要のタイミングを以て所要の制
御信号が順次送出される。
Switch "changeover switch" and 17 to the contact S side, and select subject 2.
When the standard pattern 8 is selected and placed in front of the photoelectric conversion sensor 2, a detection signal from the object detection sensor 24 is applied to the control signal generation circuit 25 to start it, and the control signal generation circuit 25 outputs a photoelectric conversion sensor. Required control signals are sequentially sent out at required timings to required circuits below the conversion sensor 2.

光電変換センサ2としてテレビジョンにおける撮像カメ
ラと同様のカメラを用いた場合には、光電変換センサ2
に加える水平及び垂直同期信号、アナログ・ディジタル
変換回路3に加える変換制御信号及び階調付画像メモリ
4に加える読込信号として互いに同期した信号を加える
と、光電変換センサ2の結像面を走査して取出された出
力信号はアナログ・ディジタル変換回路3によりディジ
タル信号に変換され、階調付画像メモリ4に読込まれ、
被写体28の画素分布パターンに対応して記憶される。
When a camera similar to an imaging camera in a television is used as the photoelectric conversion sensor 2, the photoelectric conversion sensor 2
When signals synchronized with each other are added as horizontal and vertical synchronization signals to be applied to the analog-to-digital conversion circuit 3, conversion control signals to be applied to the analog-to-digital conversion circuit 3, and read signals to be applied to the gradation image memory 4, the imaging plane of the photoelectric conversion sensor 2 is scanned. The output signal taken out is converted into a digital signal by the analog-to-digital conversion circuit 3, and read into the gradation image memory 4,
The data is stored in correspondence with the pixel distribution pattern of the subject 28.

次いで、階調付画像メモリ4に読出開始信号が送られる
と同時にゲート開閉制御信号がゲート回路5に送られる
と、ゲート回路5が導通し、読出開始信号に続く読出信
号により、階調付画像メモリ4の記憶データ信号が順次
読出され、ゲート回路5を介して階調値分布計算回路6
におけるディジタル形比較回路71乃至7nに並列に加
えられ、比較基準ディジタル値と一致する比較回路から
一致(j号が送出される。この一致信号はパルスカウン
タ81乃至8nの中、一致信号を送出した比較回路に対
応するパルスカウンタに導入計数される。
Next, when a readout start signal is sent to the gradation image memory 4 and at the same time a gate opening/closing control signal is sent to the gate circuit 5, the gate circuit 5 becomes conductive and the gradation image memory 4 is sent to the gradation image memory 4. The data signals stored in the memory 4 are sequentially read out and sent to the gradation value distribution calculation circuit 6 via the gate circuit 5.
A coincidence signal (j) is applied in parallel to the digital comparison circuits 71 to 7n in the pulse counters 81 to 8n, and a coincidence signal (j) is sent from the comparison circuit that matches the comparison reference digital value. The pulses are introduced into a pulse counter corresponding to the comparison circuit and counted.

比較回路71乃至7nの各比較基準ディジタル値を、例
えば、71から70に到るにしたがって人となるように
選定しておけば、パルスカウンタ81乃至8nの最終計
数値を陰極線オシロスコープ9に導入すると、その映像
面には、例えば、第2図に示すようなヒストグラムが描
かれる。
If the comparison reference digital values of the comparator circuits 71 to 7n are selected to be equal to each other from 71 to 70, for example, then when the final count values of the pulse counters 81 to 8n are introduced into the cathode ray oscilloscope 9, For example, a histogram as shown in FIG. 2 is drawn on the image plane.

第2図において、横軸は階調値T、縦軸はパルスカウン
タ8I乃至8nの計数値Cで、第2図は、黒色の地層に
白色の文字等を印刷した場合の標準パターンのヒストグ
ラムの一例で、図面に向って右側の山形分布は印刷文字
部分に対応し、左側の山形分布は地層部分に対応する。
In Figure 2, the horizontal axis is the gradation value T, and the vertical axis is the count value C of pulse counters 8I to 8n. In one example, the chevron distribution on the right side of the drawing corresponds to a printed character portion, and the chevron distribution on the left side corresponds to a stratum portion.

階調付画像メモリ4からのデータ信号の読出し送出が一
巡すると、制御信号発生回路25から反復読出信号が階
調付画像メモリ4に送られると同時にゲート開閉制御信
号がゲート回路5に送られ、ゲート回路5をg断する。
When the reading and sending of data signals from the gradation image memory 4 has completed one cycle, the control signal generation circuit 25 sends a repeated readout signal to the gradation image memory 4, and at the same time, a gate opening/closing control signal is sent to the gate circuit 5. The gate circuit 5 is disconnected.

即ち、階調値分布計算回路6には階調付画像メモリ4の
零番地乃至最終番地の記憶データ信号が1回のみ導入さ
れるが、2値化回路15には階調付画像メモリ4の零番
地乃至最終番地の記憶データ信号が反復加えられる。
That is, the storage data signals of the zero address to the final address of the image memory with gradation 4 are introduced into the gradation value distribution calculation circuit 6 only once, but the data signals of the image memory with gradation 4 are introduced into the binarization circuit 15. Storage data signals from the zero address to the final address are repeatedly applied.

次に、制御信号発生回路25における開閉素子の手動開
閉操作つまみ26の抑圧復旧を繰返して走査形量閉回路
10に開閉制御パルス信号を送出すると、パルスカウン
タ81乃至8nの出力回路が、例えば、8o側から順次
選択的に閉成され、各計数信号が走査形量閉回路lO及
び切換スイッチ”の接点S側を介して順次加算回路12
に加えられる。
Next, when the control signal generation circuit 25 repeats the suppression recovery of the manual opening/closing operation knob 26 of the opening/closing element and sends the opening/closing control pulse signal to the scanning type quantity closing circuit 10, the output circuits of the pulse counters 81 to 8n, for example, 8o side is selectively closed sequentially, and each counting signal is sequentially connected to the adding circuit 12 via the scanning type closed circuit lO and the contact S side of the changeover switch.
added to.

制御信号発生回路25からの開閉制御パルス信号は走査
形量閉回路】0へ送られると共に、ディジタル値設定回
路ISを構成するパルスカウンタへ導入計数されるから
、その計数値は計数開始から逐次増加し、常に加算回路
12の加算回数に一致したものとなる。
The opening/closing control pulse signal from the control signal generation circuit 25 is sent to the scanning type closed circuit 0, and is also introduced into the pulse counter that constitutes the digital value setting circuit IS and is counted, so the counted value increases sequentially from the start of counting. However, the number of additions always matches the number of additions by the adding circuit 12.

一方、階調付画像メモリ4から順次繰返し読出されたデ
ータ信号は、2値化回路15において、ディジタルイ(
v設定回路16の設定ディジタル値と比較され、データ
信号がiiQ定ディジタル値より大なるか、又は〜・致
する場合にディジタル信号“I ”が送出され、データ
信号が設定ディジタル値より小なる場合にはディジタル
信号“0パが送出される。
On the other hand, the data signals sequentially and repeatedly read out from the gradation image memory 4 are converted into digital signals (
It is compared with the set digital value of the v setting circuit 16, and if the data signal is greater than or equal to the iiQ constant digital value, a digital signal "I" is sent out, and if the data signal is smaller than the set digital value. A digital signal "0pa" is sent to the signal.

z値化回路15からのディジタル信号“1”及びディジ
タル信号゛O“は、切換スイッチ17の接点S側を介し
てメモ1月8に読込まれると共に、モニタ19における
1フレームの走査周期に同期してメモリ18の記憶信号
が読出され、モニタ19に導入される。
The digital signal “1” and the digital signal “O” from the z-value conversion circuit 15 are read into the memo 8 via the contact S side of the changeover switch 17, and are synchronized with the scanning cycle of one frame on the monitor 19. Then, the stored signal in the memory 18 is read out and introduced into the monitor 19.

メモリ18に読込まれるディジタル信号は、ディジタル
値設定回路1Bの設定ディジタル値の変化に応じて、デ
ィジタル信号“1パの一部がディジタル信号” Q ”
に変化し、この変化に応じてモニタ18の映像面に描か
れる画像も°また変化して、漸次標準パターンに近付く
こととなる。
The digital signal read into the memory 18 is converted into a digital signal "Part of 1 is a digital signal" Q " according to changes in the set digital value of the digital value setting circuit 1B.
In response to this change, the image drawn on the screen of the monitor 18 also changes, gradually approaching the standard pattern.

モニタ19の映像面における画像を標準パターンと照合
して、両者が一致又はほぼ一致したことを確かめた際に
制御信号発生回路25におけるつまみ2Bの抑圧を停止
して、走査形量閉回路10及びディジタル値設定回路1
6へのパルス信号の送出を断つと、以後、メモリ18に
読込まれるディジタル信号が更新されることなく、メモ
リ18に記憶されるディジタル信号“1”は、標準パタ
ーンおける印刷文字部分の分布パターンに一致又はほぼ
一致したものとなる。
The image on the screen of the monitor 19 is compared with the standard pattern, and when it is confirmed that they match or almost match, the suppression of the knob 2B in the control signal generation circuit 25 is stopped, and the scanning type quantity closed circuit 10 and Digital value setting circuit 1
6, the digital signal read into the memory 18 will not be updated, and the digital signal "1" stored in the memory 18 will be the same as the distribution pattern of the printed character part in the standard pattern. It will match or almost match.

ここで標準パターンを除き、切換スイッチ”及び17を
接点T側へ切換え、被検査パターンを、ベルトコンベア
等によって間欠的に光?E変換センサ2の前面に送ると
、被検査パターンが光電変換センサ2の前面に静止する
毎に、被写体検出センサ24の検出信号が制御信号発生
回路25に送られて、これを始動せしめ、制御信号発生
回路25から送出されるリセット信号により、階調値分
布計算回路6におけるパルスカウンタ8I乃至8o、走
査形量閉回路10、加算回路13、ディジタル値設定回
路16及びプリセットカウンタ22がリセットせしめら
れ、次いで、前記学習時と全く同様にして階調付画像メ
モリ4に被検査パターンに対応するディジタル信号が読
込まれ、その記憶内容が被検査パターンの画素分布パタ
ーンに対応したものに置換えられる。
At this point, except for the standard pattern, change the changeover switch `` and 17 to the contact T side, and send the pattern to be inspected intermittently to the front of the optical/E conversion sensor 2 using a belt conveyor, etc., and the pattern to be inspected will be transferred to the photoelectric conversion sensor. Each time the object comes to rest in front of the subject, a detection signal from the object detection sensor 24 is sent to the control signal generation circuit 25 to start it, and a reset signal sent from the control signal generation circuit 25 calculates the gradation value distribution. The pulse counters 8I to 8o, the scanning closed circuit 10, the addition circuit 13, the digital value setting circuit 16, and the preset counter 22 in the circuit 6 are reset, and then the gradation image memory 4 is reset in exactly the same manner as in the learning process. A digital signal corresponding to the pattern to be inspected is read in, and the stored contents are replaced with those corresponding to the pixel distribution pattern of the pattern to be inspected.

階調付画像メモリ4かも読出されたデータ信号は、学習
時と全く同様にして階調値分布計算回路6において各階
調の頻度が求められ、制御信号発生回路25からの自動
開閉制御パルス信号により走査形量閉回路10が開閉さ
れると、パルスカウンタ8I乃至8nの各計数信号が8
0側から順次走査形量閉回路10及び切換スイッチ”の
接点T側を介して加算回路I3に導入加算され、この加
算計数値はディジタル形比較回路I4において加算回路
12に記憶されている学習時の最終計数値と逐次比較さ
れ、百計数値が一致するに到ると比較回路14から一致
信号が制御信号発生回路25に送出され、以後、走査形
量閉回路10への自動開閉制御パルス信号の送出が停止
されると共に、ディジタル値設定回路1Bを構成するパ
ルスカウンタへのパルス送出も停止される。
The data signal read out from the image memory with gradation 4 is used to calculate the frequency of each gradation in the gradation value distribution calculation circuit 6 in exactly the same manner as during learning, and then the frequency of each gradation is determined by the automatic opening/closing control pulse signal from the control signal generation circuit 25. When the scanning closed circuit 10 is opened or closed, each count signal of the pulse counters 8I to 8n becomes 8.
From the 0 side, it is sequentially introduced into the adding circuit I3 through the scanning type closed circuit 10 and the contact T side of the changeover switch, and this added count value is stored in the adding circuit 12 in the digital comparing circuit I4. is successively compared with the final counted value of 100, and when the 100 counted values match, a matching signal is sent from the comparison circuit 14 to the control signal generation circuit 25, and from then on, an automatic opening/closing control pulse signal is sent to the scanning type quantity closing circuit 10. At the same time, the transmission of pulses to the pulse counter constituting the digital value setting circuit 1B is also stopped.

一方、階調付画像メモリ4から繰返し読出されたデータ
信号が2値化回路15に導入され、ディジタル値設定回
路16の設定ディジタル値との比較が行われ、データ信
号が設定ディジタル値より大又は一致した場合にディジ
タル信号°“1″が、データ信号が設定ディジタル値よ
り小なる場合にはディジタル信号パ0”が、それぞれ送
出され、切換スイッチ17の接点T側を介してメモリ2
0に読込まれる。
On the other hand, the data signal repeatedly read out from the gradation image memory 4 is introduced into the binarization circuit 15, where it is compared with the set digital value of the digital value setting circuit 16, and whether the data signal is larger than the set digital value or If they match, the digital signal ``1'' is sent out, and if the data signal is smaller than the set digital value, the digital signal ``0'' is sent out, and is sent to the memory 2 via the contact T side of the changeover switch 17.
Read to 0.

この場合にも学習時と同様、ディジタル値設定回路16
における設定ディジタル値の変化に応じて、メモリ20
の記憶内容が逐次更新されるが、前記のようにディジタ
ル形比較回路14の一致信号の送出に応じてディジタル
値設定回路18へのパルス送出が停止され、設定ディジ
タル値が一定に保持されるに到ると、メモリ20の記憶
内容も更新されることなく、安定することとなる。
In this case as well, the digital value setting circuit 16
The memory 20
The memory contents of are updated sequentially, but as mentioned above, in response to the sending of the match signal from the digital comparison circuit 14, the sending of pulses to the digital value setting circuit 18 is stopped and the setting digital value is held constant. When this happens, the contents of the memory 20 will not be updated and will become stable.

メモリ20の記憶内容の安定後、制御信号発生回路25
から送られる読出し信号によりメモリ18及び20の各
対応する番地から記憶情報が順次同期して読出され、排
他的論理和回路21において比較され、両信号が一致し
ない場合に回路21から送出される不一致信号がプリセ
ットカウンタ22に導入され、その計数値がプリセット
値に達した際に送出される桁上信号により警報回路23
が動作して被検査パターンが不良品であることを報知し
、更に、必要に応じて不良被検査パターンの除去指令信
号を送出する。尚、プリセットカウンタ22のプリセー
、1・値は所要の検査精度に応じて適当1こ設定し、特
別に高い検査精度を要求される場合には、プリセット値
を零に設定して排他的論理和回路21からの最初の不一
致信号により直ちに警報回路23を動作せしめるように
構成すればよい。
After the storage contents of the memory 20 are stabilized, the control signal generation circuit 25
The stored information is sequentially and synchronously read out from the corresponding addresses of the memories 18 and 20 by the read signal sent from the memory 18 and 20, and compared in the exclusive OR circuit 21. If the two signals do not match, a mismatch signal is sent from the circuit 21. A signal is introduced into the preset counter 22, and the alarm circuit 23 is activated by the carry signal sent out when the counted value reaches the preset value.
operates to notify that the pattern to be inspected is a defective product, and further sends out a removal command signal for the defective pattern to be inspected as required. In addition, the preset value of the preset counter 22 is set to 1 appropriately depending on the required inspection accuracy. If particularly high inspection accuracy is required, the preset value is set to zero and exclusive OR is performed. The alarm circuit 23 may be configured to be activated immediately by the first discrepancy signal from the circuit 21.

上記の繰返しによって所要数の被検査パターンの検査を
終り、別の標準パターンについて学習を行う場合には、
まず、手動操作つまみ27を押圧して加算回路12にリ
セット信号を加えてこれをリセットせしめ、以後、前記
学習時と同様の動作を行わせる。
After completing the inspection of the required number of test patterns by repeating the above steps, when learning another standard pattern,
First, the manual operation knob 27 is pressed to apply a reset signal to the adder circuit 12 to reset it, and thereafter perform the same operation as in the learning time.

以上は、加算回路12及び13、メモリ18及び20に
、それぞれ印刷文字部分に対応するディジタル信号を導
入した場合を例示したが、パルスカウンタ81乃至8n
の中、階調値の低い側(暗い側)のパルスカウンタ(前
記の例においては8+)からの計数出力信号を順次送出
せしめ、又、2値化回路15における比較結果が、ディ
ジタル値設定回路18の設定ディジタル値より階調付画
像メモリ4からのデータ信号が小なる場合、又は、両者
が一致する場合にディジタル信号”1 IIを送出し、
設定ディジタル値よりデータ信号が大なる場合にディジ
タル信号+40”を送出せしめるように構成し、加算回
路12及び13、メモリ18及び20にそれぞれ地層部
分に対応する信号を導入するようにしても本発明を実施
することが出来る。
In the above example, the digital signals corresponding to the printed character portions are introduced into the adder circuits 12 and 13 and the memories 18 and 20, respectively, but the pulse counters 81 to 8n
The count output signals from the pulse counter (8+ in the above example) on the lower side (dark side) of the gradation value are sequentially sent out, and the comparison result in the binarization circuit 15 is sent to the digital value setting circuit. When the data signal from the gradation image memory 4 is smaller than the set digital value of 18, or when the two match, the digital signal "1 II is sent out,
The present invention may also be applied to a configuration in which the digital signal +40'' is sent out when the data signal is larger than the set digital value, and signals corresponding to the stratum portion are introduced into the adder circuits 12 and 13 and the memories 18 and 20, respectively. can be carried out.

又、オシロスコープ9の代りに、例えば、XY記録計を
用いてヒストグラムを描かせてもよく、これらを省いて
も本発明を実施し得る。
Further, instead of the oscilloscope 9, for example, an XY recorder may be used to draw a histogram, and the present invention can be practiced even if these are omitted.

更に、以上は、階調値分布計算回路6を複数個のディジ
タル形比較回路71乃至7n、 A)レスカウンタ81
乃至8n及び陰極線オシロスコープ9を以て構成し、2
値化回路15をディジタル形比較回路を以て構成すると
共に、ディジタル値設定回路16をパルスカウンタを以
て構成した場合を例示したが、何れもこれらと同等の作
用を呈し、本発明の目的を達し得るものであれば、従来
公知の他の適当な回路を以て構成しても差支えなく、更
に、加算回路12.13、メモ1月8.20、ディジタ
ル形比較回路14、排他的論理和回路21、プリセット
カウンタ22及び制御信号発生回路25等の作動をコン
ビ、lZ−タに行わせるようにしても本発明を実施する
ことが出来る。
Further, in the above, the gradation value distribution calculation circuit 6 is replaced by a plurality of digital comparison circuits 71 to 7n, A) a response counter 81
8n to 8n and a cathode ray oscilloscope 9,
Although the case where the value converting circuit 15 is configured with a digital comparison circuit and the digital value setting circuit 16 is configured with a pulse counter has been illustrated, both of them exhibit the same effect and can achieve the object of the present invention. If necessary, it may be configured with other suitable circuits known in the art, and in addition, an adder circuit 12.13, a memo 8.20, a digital comparison circuit 14, an exclusive OR circuit 21, and a preset counter 22. The present invention can also be carried out by having a combination or lZ-tor operate the control signal generating circuit 25 and the like.

発明の効果 本発明においては、学習に際して、モニタ19の映像面
に描かれた印刷文字部分(又は地膚部分)の像と標準パ
ターンにおける印刷文字部分(又は地膚部分)の像を肉
眼で照合して加算回路12の加算合計値を補正し、検査
時には加算回路13の加算値が加算回路12の加算合計
値と一致した際のディジタル値設定回路16における設
定ディジタル値を基準として被検査パターンに対応する
データ信号を2値化するように構成しであるので、被検
査パターンにおける印刷文字のe淡に応じて印刷文字の
等価面積を自動的に補正し、以て印刷文字の太さを、常
に標準パターンにおける印刷文字の太さと等価的にほぼ
一致せしめ、更に、メモリ18及び20に読込ませたz
値化信号を順次比較することにより、位置情報を以て被
検査パターンの検査を行い得るから、印刷文字の濃さ又
は淡さの異常、欠落部の有無、誤字又は脱字等の判定を
適確に行って、肉眼による検査に極めて近い検査結果を
得ることが出来、i1!!膚と印刷文字との色彩の組合
せも白黒のみならず任意の色の組合せより成るパターン
の自動的検査がjif能である。
Effects of the Invention In the present invention, during learning, the image of the printed character portion (or background portion) drawn on the image screen of the monitor 19 is compared with the image of the printed character portion (or background portion) in the standard pattern with the naked eye. to correct the added total value of the adding circuit 12, and at the time of inspection, the pattern to be inspected is set based on the set digital value in the digital value setting circuit 16 when the added value of the adding circuit 13 matches the added total value of the adding circuit 12. Since it is configured to binarize the corresponding data signal, the equivalent area of the printed characters is automatically corrected according to the e-lightness of the printed characters in the pattern to be inspected, and the thickness of the printed characters can be adjusted accordingly. z, which is always made to almost equivalently match the thickness of printed characters in the standard pattern, and is further read into the memories 18 and 20.
By sequentially comparing the digitized signals, the pattern to be inspected can be inspected using positional information, so abnormalities in the darkness or lightness of printed characters, the presence or absence of missing parts, typographical errors, or omissions can be accurately determined. With this, it is possible to obtain test results that are extremely close to those obtained with the naked eye, and i1! ! JIF is capable of automatically inspecting patterns consisting of any combination of colors, not just black and white, as well as combinations of colors between skin and printed characters.

又、被写体の走査を密ならしめると共に、アナログ・デ
ィジタル変換回路3の出力ディジタル信号のビット数を
増し、各ディジタル回路の構成をこのビット数に対応せ
しめることによって検査精度を任意に高めることが出来
る等の特長を有するもので実用上の効果甚だ大である。
In addition, inspection accuracy can be increased arbitrarily by scanning the object more closely, increasing the number of bits of the output digital signal of the analog-to-digital conversion circuit 3, and adapting the configuration of each digital circuit to this number of bits. It has the following features and has great practical effects.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明の一実施例を示すブロック線図、第2
図は、その作動説明のための波形図、第3図は、従来装
芒の作動説明のための波形図で、1:光源、2:光電変
換センサ、3:アナログ・ディジタル変換回路、4:”
)3’調付画像メモリ、5:ゲート回路、6:階調値分
布計算回路、71乃至7n及び14:ディジタル形比較
回路、81乃至ト1:パルスカウンタ、9:陰極線オシ
ロスコープ、10:走査形量閉回路、”及び17:切換
スイッチ、12及び13:加算回路、15:2値化回路
、18:ディジタル値設定回路、18及び20:メモリ
、19:モニタ、21:排他的論理和回路、22ニブリ
セツトカウンタ、23:警報回路、24:被写体検出セ
ンサ、25:制御信号発生回路、26及び27:開閉素
子の手動開閉操作つまみ、28:被写体である。
FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG.
The figure is a waveform diagram for explaining its operation, and FIG. 3 is a waveform diagram for explaining the operation of the conventional device. 1: Light source, 2: Photoelectric conversion sensor, 3: Analog-to-digital conversion circuit, 4: ”
)3' Adjustment image memory, 5: Gate circuit, 6: Gradation value distribution calculation circuit, 71 to 7n and 14: Digital comparison circuit, 81 to 1: Pulse counter, 9: Cathode ray oscilloscope, 10: Scanning type 17: changeover switch, 12 and 13: addition circuit, 15: binarization circuit, 18: digital value setting circuit, 18 and 20: memory, 19: monitor, 21: exclusive OR circuit, 22: nib reset counter; 23: alarm circuit; 24: subject detection sensor; 25: control signal generation circuit; 26 and 27: manual opening/closing operation knobs for opening/closing elements; 28: subject.

Claims (4)

【特許請求の範囲】[Claims] (1)被写体の一定範囲を走査して、その階調に応じた
電気信号を送出する光電変換センサと、この光電変換セ
ンサの出力アナログ信号をディジタル信号に変換するア
ナログ・ディジタル変換回路と、このアナログ・ディジ
タル変換回路の出力信号を前記被写体の画素分布パター
ンに対応して記憶する階調付画像メモリと、この階調付
画像メモリから読出されたデータ信号の階調値別頻度を
計算する階調値分布計算回路と、前記被写体が標準パタ
ーンの場合、前記階調値分布計算回路において求められ
た階調値別頻度の中、最高階調値から適宜階調値迄の範
囲における各階調値の頻度を加算記憶する第1の加算回
路と、前記被写体が被検査パターンの場合、前記階調値
分布計算回路において求められた階調値別頻度の中、最
高階調値の頻度から加算を開始して加算値が前記第1の
加算回路の加算値に達する迄加算を行う第2の加算回路
と、前記被写体が標準パターンの場合、前記第1の加算
回路の加算回数に応じたディジタル値を設定し、前記被
写体が被検査パターンの場合、前記第2の加算回路の加
算回数に応じたディジタル値を設定するディジタル値設
定回路と、前記階調付画像メモリから読出されるデータ
信号を前記ディジタル値設定回路の設定ディジタル値と
比較し、前記データ信号が前記設定ディジタル値より大
又は一致する場合にディジタル信号“1”を送出し、前
記データ信号が前記設定ディジタル値より小なる場合に
ディジタル信号“0”を送出する2値化回路と、前記被
写体が標準パターンの場合における前記2値化回路の出
力ディジタル信号を読込む第1のメモリと、この第1の
メモリから読出されたディジタル信号の導入されるテレ
ビジョン受像機より成るモニタと、前記被写体が被検査
パターンの場合における前記2値化回路の出力ディジタ
ル信号を読込む第2のメモリと、前記第1及び第2のメ
モリから各読出されたディジタル信号が導入される排他
的論理和回路と、この排他的論理和回路の送出する不一
致信号によって被検査パターンの良否を判定する回路と
より成ることを特徴とする印刷文字等の検査装置。
(1) A photoelectric conversion sensor that scans a certain range of a subject and sends out an electrical signal according to its gradation; an analog-to-digital conversion circuit that converts the output analog signal of this photoelectric conversion sensor into a digital signal; an image memory with gradation for storing the output signal of the analog-to-digital conversion circuit in correspondence with the pixel distribution pattern of the object; and a gradation for calculating the frequency of each gradation value of the data signal read from the image memory with gradation. a tone value distribution calculation circuit, and when the subject is a standard pattern, each tone value in the range from the highest tone value to an appropriate tone value among the frequencies for each tone value determined by the tone value distribution calculation circuit; a first addition circuit that adds and stores the frequencies of a second addition circuit that starts and performs addition until the addition value reaches the addition value of the first addition circuit; and when the subject is a standard pattern, a digital value corresponding to the number of additions of the first addition circuit; and when the object is a pattern to be inspected, a digital value setting circuit that sets a digital value according to the number of additions of the second addition circuit; It compares with the set digital value of the digital value setting circuit, and when the data signal is larger than or coincides with the set digital value, a digital signal "1" is sent out, and when the data signal is smaller than the set digital value, the digital signal is sent out. a binarization circuit that sends out a signal "0"; a first memory that reads an output digital signal of the binarization circuit when the subject is a standard pattern; and a digital signal read out from the first memory. a monitor consisting of a television receiver, a second memory for reading the output digital signal of the binarization circuit when the object is a pattern to be inspected, and a second memory for reading the output digital signal from the first and second memory; Inspection of printed characters, etc., characterized by comprising an exclusive OR circuit into which the read digital signal is introduced, and a circuit that determines the quality of the pattern to be inspected based on the mismatch signal sent from the exclusive OR circuit. Device.
(2)第1の加算回路が、階調値分布計算回路において
求められた階調値別頻度の中、最低階調値から適宜階調
値迄の範囲における各階調値の頻度を加算記憶し、第2
の加算回路が、階調値分布計算回路において求められた
階調値別頻度の中、最低階調値の頻度から加算を開始し
て加算値が第1の加算回路の加算値に達する迄加算を行
い、2値化回路が、階調付画像メモリから読出されるデ
ータ信号がディジタル値設定回路の設定ディジタル値よ
り小又は一致する場合にディジタル信号“1”を送出し
、データ信号が設定ディジタル値より大なる場合にディ
ジタル信号“0”を送出するように、各構成された特許
請求の範囲第1項記載の印刷文字等の検査装置。
(2) The first addition circuit adds and stores the frequency of each tone value in the range from the lowest tone value to an appropriate tone value among the frequencies for each tone value found in the tone value distribution calculation circuit. , second
The adding circuit starts adding from the frequency of the lowest tone value among the frequencies for each tone value found in the tone value distribution calculation circuit, and continues adding until the added value reaches the added value of the first adding circuit. The binarization circuit sends out a digital signal "1" when the data signal read from the gradation image memory is smaller than or equal to the set digital value of the digital value setting circuit, and the data signal is set as the set digital value. An apparatus for inspecting printed characters, etc., according to claim 1, each of which is configured to send out a digital signal "0" when the value is greater than the value.
(3)階調値分布計算回路が、階調付画像メモリから読
出されたデータ信号が並列に加えられ、互に比較基準デ
ィジタル値の異なる複数個のディジタル形比較回路と、
各比較回路に対応して設けられ、各対応する比較回路の
送出する一致信号を計数する複数個のパルスカウンタよ
り成る特許請求の範囲第1項記載の印刷文字等の検査装
置。
(3) a gradation value distribution calculation circuit is connected to a plurality of digital comparison circuits to which the data signals read from the gradation image memory are applied in parallel, each having different comparison reference digital values;
2. The apparatus for inspecting printed characters, etc. according to claim 1, comprising a plurality of pulse counters provided corresponding to each comparison circuit and counting the coincidence signals sent out from each corresponding comparison circuit.
(4)2値化回路がディジタル形比較回路より成り、デ
ィジタル値設定回路が第1及び第2の加算回路の加算制
御用パルスの加えられるパルスカウンタより成る特許請
求の範囲第1項記載の印刷文字等の検査装置。
(4) The printing system according to claim 1, wherein the binarization circuit comprises a digital comparison circuit, and the digital value setting circuit comprises a pulse counter to which addition control pulses of the first and second adder circuits are applied. Inspection device for characters, etc.
JP60159535A 1985-07-19 1985-07-19 Inspecting device for printed character or the like Pending JPS6220093A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60159535A JPS6220093A (en) 1985-07-19 1985-07-19 Inspecting device for printed character or the like

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60159535A JPS6220093A (en) 1985-07-19 1985-07-19 Inspecting device for printed character or the like

Publications (1)

Publication Number Publication Date
JPS6220093A true JPS6220093A (en) 1987-01-28

Family

ID=15695891

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60159535A Pending JPS6220093A (en) 1985-07-19 1985-07-19 Inspecting device for printed character or the like

Country Status (1)

Country Link
JP (1) JPS6220093A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6419476A (en) * 1987-07-15 1989-01-23 Toppan Printing Co Ltd Character printing quality managing device
JPH01111620A (en) * 1987-10-14 1989-04-28 Suzuki Seisakusho:Kk Packaging paper feed controller of packaging machine

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59782A (en) * 1982-06-28 1984-01-05 Fujitsu Ltd Control system of seal impression pattern

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59782A (en) * 1982-06-28 1984-01-05 Fujitsu Ltd Control system of seal impression pattern

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6419476A (en) * 1987-07-15 1989-01-23 Toppan Printing Co Ltd Character printing quality managing device
JPH01111620A (en) * 1987-10-14 1989-04-28 Suzuki Seisakusho:Kk Packaging paper feed controller of packaging machine

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