GB1579290A

GB1579290A - Defect inspection of objects

Info

Publication number: GB1579290A
Application number: GB24594/77A
Authority: GB
Original assignee: International Business Machines Corp
Current assignee: International Business Machines Corp
Priority date: 1976-06-30
Filing date: 1977-06-13
Publication date: 1980-11-19
Also published as: DE2726746A1; JPS5646191B2; DE2726746B2; US4056716A; DE2726746C3; FR2357010A1; FR2357010B1; JPS533757A

Description

PATENT SPECIFICATION

( 21) Application No 24594/77 ( 22) Filed 13 June 1977 ( 31) Convention Application No 701337 ( 32) Filed 30 June 1976 in ( 33) United States of America (US) ( 44) Complete Specification published 19 Nov 1980 ( 51) INT CL 3 GOIN 21/88 ( 52) Index at acceptance GIA A 9 AJ Cl C 4 Gl G 2 G 6 MB R 7 T 26 T 3 T 4 T 8 ( 72) Inventors DUANE WILLARD BAXTER and RICHARD EDWARD SHIPWAY ( 11) 1 579 290 ( 199) ( 54) DEFECT INSPECTION OF OBJECTS ( 71) We, INTERNATIONAL BUSINESS MACHINES CORPORATION, a Corporation organized and existing under the laws of the State of New York in the United States of America, of Armonk, New York 10504, United States of America do hereby declare the invention for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the

following statement:-

The present invention pertains to the inspection of the surface of an object for visible defects.

The constantly decreasing size and increasing complexity of electronic circuits challenges the state of the art in a number of technical fields One of these fields, involves the inspection of manufactured circuits for defects such as open-circuited conductors or adjacent conductors shorted to each other An exemplary manufactured circuit may comprise a ceramic green sheet or substrate about 2 5 cm wide by 12 5 cm long, containing plated silver or copper conductors spaced about 0 3 mm apart The conductors may have corners and junctions.

They may terminate at pads for mounting individual semiconductor chips or for external package pins; they may also terminate at via holes which join conductors on the other side, for instance When circuit substrates of this type are designed, the conductors, pads, etc are laid out in a grid of small cells or areas which may be, e g, squares 0 15 mm on a side.

Inspection of such an object requires a high-resolution image, to detect hairline conductor cracks, dendritic bridges between conductors, and other small defects But the direct comparison with a master or ideal pattern at this high resolution has two disadvantages First, a high-resolution master pattern would require almost a million bytes of storage for the above exemplary substrate, even if each pattern cell required only a single bit.

Second, it is highly unlikely that a direct comparison would produce an exact match, even if the object contains no defects at all.

Rough edges on conductors, stray isolated bits of foreign material, noise from the scanning process, etc would all produce a significant number of apparent errors.

Therefore, it is not feasible to inspect such an object by direct comparison of a high resolution image thereof with a master pattern of equal resolution.

According to the present invention there is provided a method of inspecting the surface of an object for visible defect, comprising:

(a) storing a master pattern having a plurality of first information elements each representing the visual appearance of a respective unit of area (hereinafter referred to as a master pattern cell) of an ideal specimen of the type of object inspected, (b) scanning the actual object to produce a plurality of second information elements each representing the visual appearance of a respective unit of area (hereinafter referred to as a scanned object cell) of the scanned object, the scanned object cells being smaller than the master pattern cells, (c) determining, from a plurality of first information elements representing a predetermined group of master pattern cells, which of a predetermined set of features is present in the total area (hereinafter referred to as a master pattern window) enclosing the said group of master pattern cells, (d) determining, from a plurality of second information elements representing a predetermined group of scanned object cells, which of the set of features is present in the total area (referred to hereinafter as a scanned object window) enclosing the said group of scanned object cells, the master pattern window being larger than the scanned object window but including the area of the ideal object corresponding to the area of the scanned object constituting the scanned object window, (e) comparing the features detected in (c) 4 M P-1 1,579,290 and (d) to determine whether they are the same, and (f) repeating steps (c), (d) and (e) for a plurality of different master pattern and scanned object windows.

The invention also provides an apparatus for performing the above method.

An embodiment of the invention will now be described, by way of example, with reference to the accompanying drawings, in which:Fig 1 is a block diagram of an inspection system 100 which operates according to the present invention, Fig 2 is a block diagram of the comparison unit 200 of Fig 1.

Fig 1 is a block diagram of a system 100 for inspecting articles such as the ceramic green sheets mentioned hereinabove A mechanical transport 110 moves a green sheet (not shown) past a scanner 120, which can be of conventional type For illustrative purposes, it will be assumed that transport carries green sheets longitudinally at a constant velocity past a transverse, flyingspot scan line from scanner 120 In each scan line the scanner 120, under the control of signals from timing means 130, evaluates the visual appearance of successive adjacent individual small units of area of the object (referred to herein as scanned object cells), and provides a binary signal of which each information element is at one of two levels, "white" (representing the background or substrate) and "black" (representing the conductor pattern) The binary video signal is provided on line 121 and corresponds to a high-resolution image of the object, each element of the signal representing the visual appearance of a respective small square cell of the scanned object Such a scanned object cell may be, for example, 025 mm on a side.

Storage unit 140 holds a master pattern corresponding to the visual appearance of an ideal specimen of the type of object being scanned by unit 120 This master pattern comprises a plurality of binary information elements each representing the visual appearance ("black" or "white") of a respective unit of area (master pattern cell) of the ideal specimen The master pattern cells, however, are much larger than the scanned object cells; they may be e g, about 0 15 mm on a side During the inspection process the binary information elements are provided serially on the line 141 and represent successive lines of cells across the ideal specimen However, due to the greater size of the master pattern cells, line 141 carries a low-resolution image compared to that carried by line 121.

Comparison unit 200 compares the image of the actual object (line 121) with the image of the ideal specimen (line 141), to produce correspondence signals on line 201 when related areas of the images 121 and 141 are sufficiently similar to each other Result unit 150 stores the correspondence signals 201 for use in evaluating the scanned object as a whole; e g, to determine whether the defects are serious enough to cause a rejection of the object Result unit 150 and/or storage unit 140 may be implemented in a general purpose digital computer, which may also perform other functions not directly related to the present invention All units of Fig 1, except for comparison unit 200, may be of conventional design.

Fig 2 shows comparison unit 200 in greater detail.

The binary video signal on line 121 moves through the shift-register storage unit 210 at the upper left corner and emerges at the lower right, each row of the unit 210 being filled from left to right, so as to form a electrical two-dimensional image of part of the object being scanned Each row of register 210 has enough stages to hold the information elements from one complete line scan through the object inspected For a 025 mm scanned object cell size, each row may typically have about 4200 stages.

Register 210 may typically have six such rows Data are shifted through register 210 at equally spaced time t 0, t, t 2, t 3, where t 1,,=ti+At (If scanner 120, Fig 1, requires a retrace time longer than At, then every 4200th shift pulse may be delayed) The rightmost six stages of each row, in area 211 or unit 210, include a plurality of binary information elements representing a group of scanned object cells six cells wide and six cells high This corresponds to a 0 150 mm square area on the object, and is termed a scanned object window Pattern 212 represents an exemplary portion of the object as the information elements derived therefrom may appear in area 211; the "X" marks represent conductive lands in a green sheet, while the blank spaces represent the insulating ceramic background.

Meanwhile, master-pattern data on line 141 moves through a shift-register storage unit 220 from upper left to lower right Each row of register 220 also holds a complete line of information elements However since the master pattern cells may typically be 0.15 mm square (i e, six times the length of the scanned object cells), only about 700 stages are required for each row of register 220 Area 221 of register 220 comprises the last three stages of each of the three rows of register 220, these nine stages including a plurality of binary information elements representing an area enclosing a group of master pattern cells three cells high by three cells wide This area is termed a master pattern window Pattern 222 represents an exemplary portion of the master pattern as 3 1579290 3 it may appear in area 221 The information element in stage 223 represents that 0 15 mm square area in the low-resolution master pattern window which corresponds to the 36 cells of the 0 15 mm square area in the high-resolution scanned object window.

However, the master pattern window also contains the eight other low-resolution master pattern cells surrounding the cell represented by the informaiton element in stage 223 To maintain this relationship over an entire scan field, master pattern data begins six object scan line periods before data 121 representing the first scan across the object enters register 210 That is, data 121 is always six complete object scans behind data 141 Register 220 also shifts at only one-sixth the rate of register 210, and does not shift at all during five object scans out of every six In this way, registers 210 and 220 always remain synchronized with each other, so that stage 223 always contains information representing the area of the master pattern window corresponding to the area contained in the scanned object window as defined by the information elements in stages 211 of unit 210.

Assume that the object being scanned is an insulating substrate having an array of conductors deposited thereon at spacings which are integral multiples of 0 3 mm, twice the cell size of the master pattern in unit 140, Fig 1 The purpose of system 100 is to determine whether any of these conductors are either shorted together or open-circuited during manufacture The manner in which system 100 achieves this function is to determine, for successive different 0 15 mm squares (windows) which cover the complete object being inspected, whether a particular one of a predetermined set of "features" is present or not If that feature is detected, a match is recorded, if not, an error is signalled The set of features may include vertical, horizontal and diagonal lines, perpendicular or oblique ( 1350) corners, junctions of two or more lines and "via holes", either isolated or at the ends of lines (A via hole is a conductive path between two levels, perpendicular to the surface of a substrate) The example shown in Fig 2 represents a vertical line.

The particular feature present in the current scanned object window is detected by Boolean measurement logic 230 This logic receives inputs 231 from the shiftregister stages in area 211 It preferably comprises multi-level AND-OR gates, of the type conventionally used in character and pattern recognition machines For the specific example of the pattern 212 shown in Fig 2, a logic circuit for detecting a vertical line might be represented as:

Bl.Cl Dl Ell A 3 B 3 C 3 D 3 E 3 F 3 A 4 B 4 XC 4 D 4 E 4 ' F 4 A 6 B 6 C 6 D 6 E 6 F 6 (A 2 +A 5) (B 2 +B-5) -(CJ 2 +C 5) (D 2 +D 5) ( 2 +E 5) (F 2 ±F 5).

where the six rows of area 211 are indicated, from top to bottom, by the letters A-F, and the columns, from left to right by numbers 1-6 Logic circuits can similarly be provided for detecting other features such as those mentioned above Each logic circuit in unit 230 produces an output on one of the lines 232 The presence of a vertical line, for example, may produce a signal on line 232 a.

In the low-resolution master pattern, the information in the single stage 223 corresponds to the same 0 15 mm area which is represented by the 36 separate stages in area 211 Since stage 223 is a single' shift-register stage, the only information it contains is a one-bit indication of whether that area, as a whole, belongs to the pattern or to the background Unlike area 211, it is not possible to extract a feature from stage 223 But area 221 also includes the eight stages surrounding stage 223, and corresponds to the master pattern window of nine cells From this larger area ( 0 45 mm square), it is possible to extract features of the same types as those detected by logic 230 Boolean feature logic 240 performs this function Logic 240 is of the same general construction as logic 230 Logic 240 may be much simpler, however, since the master pattern is ideal; i e, it contains no"noise" or other defects The logic circuit for the vertical line pattern 222, for example, may be simply written as X 2.Y 2 Z 2 X YI Z 1 X 3 Y 3 J 3 where X-Z represents the rows of area 221, while the columns are numbered 1-3.

Logic circuits for the detection of other features are readily available Each logic circuit produces a signal on a particular one of the lines 242 The satisfaction of the vertical-line logic, e g, generates a "I" signal on line 242 a.

Feature comparator 250 combines signals 232 with signals 242 to produce an output signal 201 To this end, AND gates 251 each receive a pair of inputs, one signal' of the pair coming from measurement logic 230, the other from feature logics 240 The signals of each pair represent the detection of the same feature by their respective logics That is, AND 251 a receives lines 232 a and 242 a, both representing a vertical line; and so forth The output of each AND gate is coupled to OR 252, whose output is the signal 201 Signal 201, which may be 1,579,290 1,579,290 strobed out to unit 150, Fig I, by timing means 130 once every time register 220 shifts, is a "match" signal: it is high if and only if both of the logics 230 and 240 detect the same feature for the current 0 15 mm square area on the object being inspected.

Signal 201 could just as easily be inverted to form an "error" signal for each area or cell.

In Fig 2, gating logic 250 is shown as being separate from the logic of detectors 230 and 240, but the same physical gates may serve both conceptual functions The outputs 242 of detector 240 may be input to detector 230 along with window-cell signals 231, and outputs 232 may then be transmitted directly to OR 252 Then the 30way AND in the vertical-line equation hereinabove, e g, would become a 31-way AND, the 31st term being output 242 a.

Further modifications of this embodiment will become apparent from the above description In particular, additional circuitry (not shown) may be added, if desired, to register the image in area 212 more accurately with respect to the master pattern in area 222, by conventional means such as fiducial marks on the object itself.

Also, the data required for storage of the master pattern could be further reduced by storing it in a run-length or other coded form, and decoding it in unit 140 before transmission over line 141 Units 230 and 240, although termed "logics", could be implemented in other known forms, such as resistor correlation matrices Yet again, units 210 and 220 could be constructed from random-access storage with suitable addressing logic, instead of from shift registers.

Claims

WHAT WE CLAIM IS:-

1 A method of inspecting the surface of an object for visible defects, comprising:

(a) storing a master pattern having a plurality of first information elements each representing the visual appearance of a respective unit of area (hereinafter referred to as a master pattern cell) of an ideal specimen of the type of object inspected, (b) scanning the actual object to produce a plurality of second information elements each representing the visual appearance of a respective unit of area (hereinafter referred to as a scanned object cell) of the scanned object, the scanned object cells being smaller than the master pattern cells, (c) determining, from a plurality of first information elements representing a predetermined group of master pattern cells, which of a predetermined set of features is present in the total area (hereinafter referred to as a master pattern window) enclosing the said group of master pattern cells, (d) determining, from a plurality of second information elements representing a predetermined group of scanned object cells, which of the set of features is present in the total area (referred to hereinafter as a scanned object window) enclosing the said group of scanned object cells, the master pattern window being larger than the scanned object window but including the area of the ideal object corresponding to the area of the scanned object constituting the second object window, (e) comparing the features detected in (c) and (d) to determine whether they are the same, and (f) repeating steps (c), (d) and (e) for a plurality of different master pattern and scanned object windows.

2 A method as claimed in claim 1, wherein the first and second information elements are entered into and shifted within respective shift registers in synchronism with the production of the second information elements by the scanning, and wherein the determining of steps (c) and (d) is performed by logic circuits coupled to selected stages of the shift registers.

3 A method as claimed in claim 1 or 2, wherein the area of the ideal object within the master pattern window corresponding to the area of the scanned object constituting the scanned object window consists of a single master pattern cell.

4 A method as claimed in claim 1, 2, 3 or 4, wherein the area of the ideal object within the master pattern window corresponding to the area of the scanned object constituting the scanned object window is centrally disposed in the master pattern window.

An apparatus for inspecting the surface of an object for visible defects, comprising:

(a) means operating so as to store a master pattern having a plurality of first information elements each representing the visual appearance of a respective unit of area (hereinafter referred to as a master pattern cell) of an ideal specimen of the type of object inspected, (b) means operating so as to scan the actual object to produce a plurality of second information elements each representing the visual appearance of a respective unit of area (hereinafter referred to as a scanned object cell) of the scanned object, the scanned object cells being smaller than the master pattern cells, (c) means operating so as to determine, from a plurality of first information elements representing a predetermined group of master pattern cells, which of a predetermined set of features is present in the total area (hereinafter referred to as a master pattern window) enclosing the said group of master pattern cells, (d) means operating so as to determine, from a plurality of second information 1,579,290 elements representing a predetermined group of scanned object cells, which of the set of features is present in the total area (referred to hereinafter as a scanned object window) enclosing the said group of scanned object cells, the master pattern window being larger than the scanned object window but including the area of the ideal object corresponding to the area of the scanned object constituting the scanned object window, (e) means operating so as to compare the features detected in (c) and (d) to determine whether they are the same, and (f) means operating so as to provide repetition of steps (c), (d) and (e) for a plurality of different master pattern and scanned object windows.

6 An apparatus for performing the method claimed in claim 1, substantially as described with reference to the accompanying drawings.

J P RICHARDS, Chartered Patent Agent, Agent for the Applicants.

Printed for Her Majesty's Stationery Office, by the Courier Press, Leaminglon Spa, 1980 Published by The Patent Office, 25 Southampton Buildings London WC 2 A IAY from which copies may be obtained.