JPS62200431A - Processor aliveness or death identification system in distributed processing system - Google Patents

Abstract

PURPOSE:To cope with an abnormality in the early stage and to prevent a data from being carried away uselessly between terminals, by monitoring an aliveness or death confirming signal to be received periodically from a processor on the side of processors whose life or death is confirmed. CONSTITUTION:A processor 120 and 130 contained in a distributed processing system 100 monitor an aliveness or death confirming signal to be received from a processor aliveness or death managing processor 110 at every prescribed time, and become a dead state for themselves, in case said signal is not received for a prescribed time. In case the processor 120 goes to an abnormal state, the processor aliveness or death managing processor 110 determines that the processor 120 is abnormal, by means of the repeated aliveness or death confirming signals, and regards the processor 120 as dead in the resumption of the operation of the system 100. During such a time the processor 130 which is connected to the processor 120 by a bus 150 cannot receive an aliveness or death confirming signal from the processor alivness or death managing processor 110, informs a terminal 300 of death of the processor through a bus 200, goes to a dead state itself, and goes to a state of waiting for a resumtion instruction from the processor alivneszs or death managing processor 110.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for determining whether a processor is alive or dead in a distributed processing system.

[Conventional technology]

Conventionally, in a processor life/death identification method in a distributed processing system, a processor for processor life/death management sends a life/death confirmation signal to each processor at regular intervals, and each processor sends a response to the signal, thereby identifying each processor. A life-or-death judgment was made, and if the processor for life-or-death management determined that the processor was abnormal, the processor was placed in a dead state and an instruction was given to restart the processor.

[Problem that the invention seeks to solve]

In the conventional processor life/death identification method described above, when the processor for processor life/death management identifies the life/death state of each processor and the processor life/death management processor Brose/Sosa determines that the processor is alive/dead, the processor is Since all restarts from the dead state are performed,
10 When communication between processors is not possible due to a bus malfunction between the processors and processors, or when the parent processor is in its original state, the child processor remains in its raw state, and the child processor returns to its original state when the parent processor Since it is after reopening, child Bromo・
The drawback was that it took time for Sosa to return to his original state, and the synchronization between parent and child was broken.

[Means for solving problems]

The 10-Sose life/death identification system in the distributed processing system of the present invention is configured such that a plurality of processors and a processor life/death management bromo for managing the state of each processor are connected via a bus, and each of the processors is connected via a bus. In a processor life/death identification method in a distributed processing system in which each processor is determined to be alive or dead based on a response signal to a life/death confirmation signal sent via the bus at regular intervals, each bromo/sosa is a bromo for processor life/death management. - The processor is provided with means for monitoring the life/death confirmation signal from the source and determining that the processor itself is in its original state when the life/death confirmation signal is not received for a certain period of time.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

In the figure, a distributed processing system 100 includes a processor 110 for processor life/death management, and a distributed processing system 100.
The processor 120 and 130 are included in a parent-child relationship, and the processor 110 for processor life/death management and the processor 120 are connected via a bus 140, and the processors 120 and 130 are connected via a bus 150.

Processor 130 is connected to terminal 300 via bus 200.

Next, the operation of this embodiment will be explained.

The processor 110 for processor life/death management sends a life/death confirmation signal to the processors 120 and 130 included in the distributed processing system 100 at regular intervals. processor 120
is the bus 14 from the processor 110 for processor life/death management.
When the life/death confirmation signal is received through 0, a response to the signal is sent to the life/death management processor 110 through the bus 140. The processor 130 also connects the processor 110 to the bus 140 for processor life/death management.
When a life/death confirmation signal is received via the bus 150 via the processor 120, a response to the signal is sent to the bus 150.
．． Processor 120. It is sent to the processor 110 for processor life/death management through the bus 140.

The processor 110 for processor life/death management waits for a response to the life/death confirmation signal sent to the processor 120 or 130, and if the expected response is not received even after waiting for a certain period of time, the processor 120 that expected the response is
or 130 is determined to be abnormal, and instructs the processor to resume its original state.

On the other hand, the processor 1 included in the distributed processing system 100
20 and 130 monitor the life/death confirmation signal that is supposed to be received from the processor life/death management processor 110 at regular time intervals, and if they cannot be received for a given time, they return to their original state.

If the processor 1 included in the distributed processing system 100
When the processor 20 becomes abnormal, the processor 110 for processor life/death management determines that the processor 120 is abnormal based on a periodic life/death confirmation signal, and restarts the processor 120 in its original state. Meanwhile, processor 120
The processor 130 connected to the processor 130 via the bus 150 is unable to receive the life/death confirmation signal from the processor 110 for processor life/death management, and notifies the terminal 300 of the death of the processor via the bus 200, returns to its original state, and returns to its original state for processor life/death management. It enters a state of waiting for a restart instruction from the processor 110.

〔Effect of the invention〕

As explained above, the present invention monitors the life/death confirmation signal that should be periodically received from the processor life/death management 10 setter on the side of the processor to be confirmed to be alive or dead, so that when an abnormality occurs, it can be dealt with at an early stage. This has the effect of preventing unnecessary data flow between terminals connected to the processor.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention. 100... Distributed processing system, 110... Processor for processor life/death management, 120.130... Processor, 140, 150, 200... Bus, 300...
・Terminal. $1 figure

Claims (1)

[Claims] A plurality of processors and a processor for life/death management that manages the status of each processor are connected via a bus, and a response signal to a life/death confirmation signal sent to each processor via the bus at a fixed time interval is used. In the processor life/death identification method in the distributed processing system for determining whether each processor is alive or dead, each processor monitors the life/death confirmation signal from the processor for life/death management, and when the life/death confirmation signal is not received for a certain period of time, the processor A method for determining whether a processor is alive or dead in a distributed processing system, characterized by comprising means for determining whether the processor is dead or not.