JPS6219980A - Image processor - Google Patents

Abstract

PURPOSE:To prevent the occurrence of the omission of picture elements after the rotational transforming of an image by interpolating the omission of picture elements involved in the rotational shifting of the image. CONSTITUTION:An image processor consists of the first converted address generating device 101 that generates picture element address after coordinate transformation when obtaining a converted image by coordinate transformation from sampled two-dimensional image data 100, the second converted address generating device 102 that generates adjoining picture element address and memories 103, 104 that store image signals after the conversion. Converted address generating devices 101, 102 generate adjoining converted addresses, and image signals 100 are written in memories 103, 104 at the same time. As only fixed number of the omission of picture elements occur in affine transformation, image signals can be interpolated in the case where adjoining addresses are addressed from which the picture elements are omitted.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image processing device that performs image transformation such as rotation or movement of an image.

[Prior Art] Conventionally, this type of image processing apparatus performs image transformation by transforming coordinate axes (affine transformation). Image transformation by affine transformation calculates the two-dimensional coordinates of the pixel after transformation from the two-dimensional coordinates of the pixel before coordinate transformation, and the density information of the pixel before transformation corresponding to the pixel at the coordinate position after transformation is added to the coordinate position after transformation. We will adopt a method of moving the . However, since the coordinate position is in pixel units, it is naturally a discrete position,
Therefore, as the image data is sampled, the pixel coordinates before conversion and the pixel coordinates after conversion cannot correspond one-to-one.
There has been a problem in that the image after conversion may have missing pixels or degeneracy, making it impossible to form a correct image.

Taking rotation and translation among affine transformations as examples, A
Let's explain it physically. The pixel coordinates (x, y) after conversion are calculated using equation (A) based on the pixel coordinates (m, n) before conversion.

X=[m-C:asθ+n-3inO-mo・(Ca
sO-1) + n O-5in 03y = [-m
−3:nO+ n −CasO−m(+ −3irl
-no・(CosO-1) ]・・・・・・(A) Here, 0 is the rotation angle, mo and no represent the rotation origin before conversion, and the symbol [] is the maximum integer that does not exceed the number in the symbol. It is an integerization (i.e., rounding down) symbol that takes .

The coordinate transformation shown in equation (A), especially the integer transformation, will be explained. FIGS. 2(a) to 2(d) show various aspects of coordinate transformation, and show that in some cases the coordinates before and after transformation do not correspond one-to-one. In the figure, pixels are represented as lattice points obtained by dividing space into a lattice. In the diagonal mn lattice, the lattice points represent the pixel centers before conversion, and each lattice point (for example, lattice point l) has density information. mn
In the xy lattice after coordinate transformation where the lattice is rotated by an angle of 0, if the coordinate axes are oriented horizontally to the right (X-axis) and downwards (y-axis), then
The meaning of integer conversion using the [] symbol in formula (A) is:
As shown in Fig. 2(a), the lattice point 1 on the 1 mm lattice is
Origin direction of axis (upper left direction on planes (a) to (d) in Figure 2)
This corresponds to approximating the lattice point 2 on the xy lattice located at the shortest distance. The reason for converting into an integer using the [ ] symbol is that the rounding down method is suitable for digital processing.

In normal cases, the grid points before and after conversion correspond one-to-one as shown in Figure 2 (a), or they correspond as shown in Figure 2 (b) depending on the rotation angle and the position of the grid points. If there is xy grid point 3 without mn grid point (missing pixel), or
If there is a case (pixel degeneracy) where two mn grid points (xY grid points 4 and 5) correspond to one xy grid point as shown in figure (c) or (d), there is a one-to-one correspondence. Phenomena such as distortion, missing pixels, and degeneracy of pixels occur.

As a countermeasure to this problem, a DS conversion method has been adopted in which the pixel density is calculated by obtaining the coordinates (m, n) before conversion from the pixel coordinates (x, y) after conversion by inverse transformation.

However, this method requires a large amount of memory to store all the pixel information before conversion, and requires expensive random access memory to quickly access the image data before conversion. There was a problem with the necessity of

[Problems to be Solved by the Invention] The present invention has been proposed in order to solve the problems of the prior art mentioned above, and provides an image processing device that does not cause missing pixels after coordinate transformation. .

[Means for solving the problem] In order to solve the above problem, for example, the image processing apparatus of the embodiment shown in FIG.
A first conversion address generation means 1 that generates a pixel address after coordinate conversion when obtaining a converted image by coordinate conversion from
01, second conversion address generation means 102 for generating an adjacent pixel address adjacent to the pixel, and memories 103 and 104 for storing the converted image signal.

[Operation] In the above configuration, the first translation address generation means 101
The address generated by i2 corresponds to the memory 103, and the address generated by the conversion address generating means 102 of i2 corresponds to the memory 104. Translated address generation means 101 and 1
02 generate mutually adjacent translation addresses at the same time, the image signal 100 is written to the memories 103 and 104 at the same time. In affine transformation, only a certain number of missing pixels occur, so when an adjacent address is an address with missing pixels, the image signal is interpolated.

[Examples] Examples according to the present invention will be described in more detail below with reference to the accompanying drawings. In the following explanation of the embodiment, rotation and parallel translation will be explained as examples of affine transformation.6 The feature of this embodiment is that in the case of so-called equal-magnification transformation such as rotation and translation, pixel extraction, etc. are performed continuously. The point is to focus on not producing more than one. That is, since the conversion (integer conversion) using the above-mentioned formula (A) involves rounding down, it is impossible for two or more pixels to be omitted. Of course, the same effect can be obtained even if a rounding-up operation is performed instead of a rounding-down operation. If two or more missing pixels do not occur, the pixel density at the pixel position where the missing pixel is likely to occur can be determined by writing the same density data to the image memory at the address next to the coordinates after conversion. It is possible to interpolate data.

The principle of interpolation in this embodiment will be explained with reference to FIG. Third
In the figure, (m, n) indicates each pixel address at the coordinates before conversion, and these are (1) and (2).

(3)...... On the other hand, (x, y) is the pixel address after conversion ([II [11] [[[]
), and arrows indicate the conversion correspondence of each address before and after conversion.

That is, address (1) is added to address [II, address (
2) becomes address [ml, . . . Also, addresses with missing pixels due to the above-mentioned integer conversion are indicated by diagonal lines in the figure. That is, address [II].

[V] is the address where the missing pixel occurred. As described above, two or more missing pixels do not occur consecutively. Therefore, addresses [II] and [V] are interpolated, but in this embodiment, the integer conversion is performed by rounding down, so
The missing address portion is interpolated using the pixel density corresponding to the next post-conversion address. That is, address [II] is interpolated using the pixel density of address [II], and address [V] is interpolated using the pixel density of address [IV].

Of course, if we do not follow formula (A) and round up the training, we get 1.
Interpolation is performed using the pixel density of the previous (-1) address.

Therefore, the problem is to detect the timing at which interpolation should be performed, but since constantly checking whether or not pixel omission has occurred is contrary to speeding up the image conversion process, in this embodiment, we devised the following measures. .

As mentioned above, two or more missing pixels do not occur consecutively, so when address conversion is performed, the pixel density is written to the converted address pixel each time the conversion is performed, and at the same time, the same pixel density is also written to the next address. It is. In the example of FIG. 3, the pixel density at address (1) is simultaneously written to addresses [I] and [II]. When converting address (2), address [II Skip 3 and address Cm
] is generated, but there is no problem because it has already been written to address [II]. In this way, partial interpolation is performed for pixel extraction. The concentration of address (2) is written to address [ml, CIVI, but when address (3) is converted, address [IV] is generated, so address [IV] is rewritten with the concentration of address (3). . In this way, there is no need to constantly monitor whether pixel omission has occurred, and image conversion can be performed at high speed.

Furthermore, the image memory that stores the image data after image conversion is divided into parts corresponding to even addresses and parts corresponding to odd addresses, and memory interleaving is performed so that writing can be simultaneously performed in the even and odd parts. In this way, the above-mentioned method of writing the same density to two consecutive addresses becomes faster due to this memory interleaving.

FIG. 4 is a block diagram of the configuration of an image processing device according to an embodiment of the present invention. In the figure, 11 is an input sensor that reads an image signal and outputs a gradation image signal, and 12 is a unit that binarizes the gradation image signal. a binarization circuit; 13 an address generator that generates pixel addresses for image conversion (coordinate conversion); 14 a coordinate conversion parameter generation circuit that generates each parameter of formula (A) for coordinate conversion; Reference numerals 15 and 16 designate image memories (details will be described later) that can be accessed at random, respectively, and 17 represents an output device that selects image data stored in the image memory 15 or 16 and outputs it as a visible image.

Parameters (m, n, Gos θ, etc.) necessary for the coordinate transformation are supplied in advance to the address generator 13 by the coordinate transformation parameter generation circuit 14. 8 from input sensor 11
The image data digitized to 256 gradation levels is output as a binary output by the binarization circuit 12. The address generator 13 calculates converted coordinates (x, y) based on the parameters supplied from the coordinate conversion parameter generation circuit 14 in synchronization with this binary output, and converts the calculated coordinates into A corresponding address signal 18 or 19 is output, and binary data is written into the image memory according to the generated address. At the same time, the same data is written to the image memory corresponding to the adjacent coordinates (X+1, y) of the coordinates (x, y) after conversion. At this time, in order to write to the two memories at the same time (memory interleaving)
The image memory is divided into two parts so that when the X coordinate is an odd number, data is written into the memory 15 for odd pixels, and when the X coordinate is an even number, data is written into the memory 16 for even pixels. The output device 17 has a memory 15 .
Binarized image data is sent alternately from 16 to generate a final output image.

FIG. 5 is a circuit block diagram of the address generator 13.

From the coordinate conversion parameter generation circuit 14 to the address generator 1
As an input to 3, the value of Sin e according to the address (m, n) before conversion and the rotation angle θ is stored in RAM 32a and 3.
Enter in 2b. Also, the RAMs 31a and 31b have C
The value of os O is input, and as is clear from equation (B), by setting the value of 5in (900-〇), the coordinate transformation parameter generation circuit inputs the value of Sino in the form of a lookup table. (For example, in a ROM etc.) It is sufficient to write it as t=.

Gos O= 5in (90G-〇)------・(
B) Output the calculation results of formula (A) such as mX5inO from RAM31a, 3lb, 32a, and 32b, and output them to buffers 33-a to 33-d and inverters 34-a to 34-d.
The sign is given by . These symbols are terminals 43-5
0 to the latches 35a to 35d. Next, the adder 36 calculates the following equation (C).

[m-5in(900-e) + n-9inθ]-X
'...(C) Also, the adder 37 calculates equation (D).

[-m-Sirl+n-5in(900-θ)]→Y'
...(D) Also adder 3
8.39, the amount of parallel movement in the x and X directions due to rotation (
E), (F) are [-m, ・(Cosθ-1) + r+o-9inθ]
-+X.

...(E) [-mo-9inθ-no・(Cos θ-1)] →
y.

...(F) Set at ends f-51 and 52. Terminal 51.52
The total set to is a quantity independent of (m, n). The converted coordinates (x, y) are calculated by adding these values to the values of equations (C) and (D). Furthermore, the adder 40 calculates the x+1 coordinate by adding 1 to the X coordinate. Also, since the X coordinate and x+1 coordinate are always divided into odd numbers and even numbers, the least bit (LSB) of this
It is possible to write to two memories at the same time. This is the signal 20 which is the LSB of the address of the address generator 13.
This is realized by inputting the image memory 15 and 16 to the enable terminals of each image memory 15 and 16.

In this way, it has become clear that missing pixels due to rotational movement of an image can be interpolated using the pixel density of adjacent pixels. Alternatively, in order to speed up the conversion, you can always write the same pixel density to two consecutive pixels, eliminating the need to constantly check for missing pixels, and further dividing the image memory into two to enable memory interleaving, which enables even faster processing. Become.

Furthermore, a large capacity memory for storing data before conversion, which was necessary for conventional DS conversion, is no longer required, making it possible to simplify the hardware. Furthermore, since the memory on the output side only needs to store slightly compressed data, it has become possible to significantly reduce the amount of memory. It also became possible to perform all processing at a timing synchronized with the input signal, making real-time processing possible.

In the above embodiment, the method of interpolation in the X direction has been explained, but it is clear that the same applies to the X direction as well. Furthermore, if interpolation is performed in both the x and 7 directions at the same time, the periodicity of the reproduced image that would occur when interpolation is performed in only one direction will be eliminated.

In the above embodiment, an input sensor was used as the input device, but instead of this, the system may be combined with an external storage device such as a magnetic disk or magnetic tape, or a device that serially transfers image data such as a network communication device. It is possible to configure

[Effects of the Invention] As described above, according to the present invention, an image processing device with a simple configuration that does not cause missing pixels after rotational conversion of an image can be realized.

[Brief explanation of drawings]

FIG. 1 is a basic configuration diagram of an embodiment according to the present invention, and FIG. 2 (a
) to (d) are diagrams modeling integer conversion after coordinate transformation, FIG. 3 is a diagram explaining the operating principle of an unimplemented example, and FIGS. 4 and 5 are circuit diagrams of an example. In the figure, 11...input sensor, 12...binarization circuit, 1
3...Address generator, 14...Coordinate transformation parameter generation circuit, 15.16...Image memory, 17...
Output device, 31a, 3lb, 32a
, 32 b -RAM, 33-a ~ 33-d-/<
Tsufa, 34-a to 34-d... Inverter, 35a to 3
5d... Latch, 36-40... Adder.

Claims (3)

[Claims] (1) In an image processing device that obtains a transformed image by coordinate transformation from image data of sampled two-dimensional image data,
A pixel after coordinate transformation and one or more consecutive adjacent pixels adjacent to the pixel are each associated with an image signal of a pixel before transformation corresponding to the pixel, and an image signal of the pixel after transformation is made. image processing device. (2) It has a memory for storing the converted image signal, and the memory is divided into the number of adjacent pixels plus 1, and when the converted image signal is stored in the memory, all the divided parts are The image processing device according to claim 1, characterized in that writing is performed simultaneously. (3) The image processing device according to claim 1 or 2, wherein the number of adjacent pixels is one, and the memory is switched depending on whether the pixel coordinate value is an odd number or an even number.