JPS62197819A - Data transfer control system - Google Patents

Abstract

PURPOSE:To obtain a data transfer control system that can perform the flexible and effective fault processing and retrial processing, by inhibiting the indication for the next execution at an instruction control part until the end of the transfer of data under execution and the presence or absence of the abnormality produced in a data transfer mode are confirmed in case an instruction control part decodes a synchronous indication instruction. CONSTITUTION:When both data transfer and synchronism instructions are confirmed after an instruction control part 30 decoded an instruction code, an indication for execution is given to a transfer control part 40 by an execution request signal RQ. At the same time, an action code and addresses to both memory devices (1)10 and (2)20 are transmitted by the request code signal RQ and an address signal AD respectively. A reply signal RPY corresponds to the signal RQ transmitted to the part 30 from the part 40. Thus the part 30 receives the signal RPY and gives an indication for execution of the next instruction. An interruption report signal INT is used to give a report to the part 30 and the part 30 inhibits the indication for execution of the next instruction by the signal INT to start an interruption processing sequence.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data transfer control method in a data processing system, and particularly to control over overlap of data transfer instruction execution sequences between two storage areas.

〔overview〕

In a data transfer control method for controlling data transfer between two different storage areas in a data processing device, the present invention sets a single synchronization instruction command that instructs synchronization of data transfer operations, and When the above-mentioned transfer synchronization instruction command is decoded, the above-mentioned instruction control unit will continue to execute the above-mentioned transfer synchronization instruction command until the completion of all data transfers instructed before this synchronization instruction instruction and the time when it is possible to confirm whether there is an abnormal event that occurred during data transfer execution. By suppressing the next execution instruction, it enables flexible and efficient failure handling and retry processing, improving system reliability and throughput.

[Conventional technology]

In recent years, the storage capacity of data processing devices has increased significantly, and in order to cope with this increase, a method has been adopted in which a large-capacity expansion storage device is added in addition to the main storage device. In such systems, data in a certain storage area (hereinafter simply referred to as an area) within the main storage device is temporarily saved to a high-speed expanded storage device instead of a disk device, or data stored in an expanded storage device is temporarily saved. The system aims to improve system throughput by restoring the data to the main memory.

For example, as shown in Fig. 2, data in area A in storage device (1) is transferred to area X in storage Wii [2], and data in area B in storage device (1) is transferred to area There may be cases where the data is transferred to area Y. When performing data transfer between such storage devices using software instructions, −
In a, one data transfer command transfers data of a fixed length of N bytes, so it is executed repeatedly and continuously. By the way, block units (N
When performing continuous data transfer (bytes), a method is adopted in which the data transfer sequence overlaps in order to increase the speed, but if an abnormal condition is detected in the hardware,
In order to ensure high reliability of the system, a system is adopted in which the abnormal termination is reported to the software via an interrupt, the area in the storage device where the abnormality has occurred is isolated, and a retry is requested.

7 and 8 are diagrams showing an example of such a conventional data transfer method, and FIG. 7 is an explanatory diagram showing the program,
FIG. 8 is the time chart. The program shown in FIG. 7 is for transferring data from area A to area X, from area B to area Y, and from area C to area Z shown in FIG. Transfer between blocks within an area corresponds to one data transfer command. Therefore, commands ■ to ■ specify data transfer from area A to area X, commands ■ to ■ specify data transfer from area B to area Y, and instruction ■ specify data transfer from area C to area Z. become.

The time chart of FIG. 8 shows the time relationship of the data transfer sequence when the end status of the instruction (2) becomes abnormal in the execution of the program of FIG. 7. During the operation of data transfer sequence C (BSYC) of instruction ■,
When sequences A and B of the next instruction ■ are executed in an overlapping manner, an abnormal state accompanying the data transfer of the instruction ■ is detected, and the interrupt reporting (INT) and interrupt processing sequence are activated. The data transfer of instruction ■ has already been executed. Therefore, in this data transfer method, since the software does not accurately grasp the data guarantee range in the event of an actual abnormality, area X, area Y, and area Z are separated, allocated to another area, and restarted from instruction It is necessary to try.

[Problem that the invention seeks to solve]

In the conventional data transfer control method described above, even if the software performs error processing and retry processing when an abnormal event occurs during data transfer, the occurrence point and the next data transfer are executed at the same time. It is difficult for software to recognize and manage which areas within the device are guaranteed to have data transferred, thus preventing efficient and fine-grained error handling, reducing system reliability and reducing system throughput. This had the disadvantage of causing a decrease in

An object of the present invention is to provide a data transfer control method that can perform flexible and efficient failure handling and retry processing, and can build a system with improved reliability and system throughput by eliminating the above-mentioned drawbacks. It's about doing.

[Means for solving problems]

In a data transfer control method for controlling data transfer between two different storage areas of a data processing system, the present invention sets a single synchronization instruction command to instruct synchronization of data transfer operations, and the instruction control unit When the synchronization instruction instruction is decoded, the next execution instruction in the instruction control unit is suppressed until the completion of the data transfer being executed and the presence or absence of an abnormal event that occurred during the execution of the data transfer are confirmed. .

[For production]

In the present invention, a single synchronization instruction instruction for instructing synchronization of data transfer operations is set in the instruction, and an operation program is assembled with main operation instructions sandwiched therebetween. When the instruction control unit that decodes command words and instructs execution decodes the synchronization instruction command, it determines whether or not all previously instructed data transfers have been completed and whether any abnormal events occurred during data transfer execution. The next execution instruction by the instruction control unit is suppressed until confirmation is made.

In this way, data transfer that may cause data destruction in the storage area due to an abnormal event that occurs during data transfer,
A synchronization instruction command is set so that the software can recognize the instruction retry area, and the software delimits the data transfer command for the storage area that it wants to retry in advance.
By executing this synchronization instruction command, the software can recognize and manage the guaranteed data range within the storage area, allowing flexible and efficient failure handling and retry processing.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the main points of the configuration of a data processing device to which an embodiment of the present invention is applied. 10 and 20 are different storage devices (1) and (2), 30 is a storage value! (
1) An instruction control unit that takes out the program stored in 10 via path (1) 101, decodes the instruction word, and instructs the execution of the instruction; This is a transfer control unit that executes data transfer between the storage device (1) 10 and the storage device (2) 20 via the path (3) 102 and the path (3) 103.

FIG. 3 is an explanatory diagram showing the format of the transfer-related command word used in this embodiment. RD represents a data transfer command from the storage device (2) 20 to the storage device (1) 10, and SYC represents a data transfer synchronization instruction command according to the present invention. A.D.
(1) is a field that specifies the address (1) for the storage device (1) 10, while AD (2) is a field that specifies the address (1) for the storage device (1) 10.
2) This is a field that defines the address (2) for 20. However, when the instruction code is synchronization instruction command SYC, field AD (1) and field AD
(2) has no meaning.

FIG. 4 is a flowchart showing an example of the operation of the transfer control section 40 when an execution instruction from the command control section 30 is accepted. Also, Figure 5 shows the storage device (1) shown in Figure 2.
The contents of areas A, B, and C in 10 are memorized values! (2)2
FIG. 3 is an explanatory diagram showing an example of an instruction execution sequence when transferring to areas X, Y, and Z of 0; Further, FIG. 6 is a time chart showing the time relationship of the operations of the transfer control section 40 with respect to the instruction sequence shown in FIG.

The feature of the present invention is that the instruction code OP of the instruction word shown in FIG.
The synchronization instruction command SYC is set as shown in FIG. 5, which will be shown later, in the configuration shown in FIG. 1, and control is performed according to FIG. 4.

Next, the operation of this embodiment will be explained. First, when the instruction code OP is WD, the data in the storage device <1) 10 corresponding to the address (1) indicated by the field AD (1) is transferred to the address (2) indicated by the field AD (2).
) is transferred to the area of the +jl device (2) 20 corresponding to the instruction code RD.On the other hand, when the instruction code is RD, data transfer in the opposite direction is executed.

In FIG. 1, when the instruction control section 30 decodes the instruction code and finds that it is a data transfer instruction or a synchronization instruction, an execution instruction is given to the transfer control section 40 using an execution request signal RQ. At the same time, the request code signal RQC sends an operation code, and the address signal AD sends addresses for the storage devices (1) 10 and (2) 20. The reply signal RPY is a signal corresponding to the execution request signal RQ sent from the transfer control unit 40 to the instruction control unit 30. When the instruction control unit 30 receives this reply signal RPY, it executes the next instruction. Give execution instructions.

The interrupt report signal INT is transmitted by the transfer control unit 40 to the storage device (1
) 10 and (2) 20, or when the transfer control unit 40 itself detects an abnormal state, this signal is reported to the command control unit 30, and the command control unit 30 The unit 30 uses this interrupt report signal INT to suppress the execution instruction of the next instruction and starts the interrupt processing sequence.

Next, the control flowchart shown in FIG. 4 will be explained.

Step S1 is an execution request signal R from the instruction control unit 30.
This is the step of detecting Q, and when the execution request signal RQ is "1",
” (logic “L”), the request code signal RQC and address signal AD are taken in in step S2,
Set sequence A busy indicator (BSYA) to "1"
Set to . In the next step S3, the request code signal RQC is decoded, and if it is a data transfer system, the operations from step S4 onwards are performed (sequence A).

In step S4, the sequence A busy indicator (BSYA) is reset to "O" (logic "0"), and the sequence B busy indicator (BSYB) is reset to "1".
”. Also storage devices (1) 10 and (2)
A data transfer request and a transfer address are sent to 20, a transferable state is checked, and data transfer and sequence control between these two storage devices (1) 10 and (2) 20 are synchronized. When the synchronization is completed in step S5, the next step S6 is activated (sequence B).

In step S6, the sequence B busy indicator (BSYB) is reset to "0", the sequence C busy indicator (BSYC) is set to "1", a reply RPY signal is sent to the instruction control unit 30, and data is transferred at the same time. and waits for the end of the transfer in step S7 (sequence C).

When the end of the transfer is detected, in step S8, the sequence C busy indicator (BSYC) is reset to "0", and the sequence D busy indicator (BSYC) is reset to "0".
YD) is set to "1" to start the termination status reception sequence from the storage devices f(1) 10 and (2) 20. When the completion status is fetched, the contents are checked, and if the status is normal, the sequence D busy indicator (BSYD) is reset to "0" in step 311 and the process ends; however, if the status is abnormal, the instruction control unit 3 is sent to step SIO.
0, the interrupt processing sequence is instructed to start using the interrupt report signal INT, and the sequence D busy indicator (BSYD) is reset to "0" (sequence D).
.

On the other hand, if the decoding result of the request code signal RQC is a synchronization instruction command SYC in step S3, data transfer is not controlled and steps S12, 313 and S14 are executed.
A sequence B busy indicator (BSYB) indicates whether transfer control sequences B, C and D are in operation.
Sequence C busy indicator (B S Y C) and sequence D busy indicator (B S Y D
) and wait until all indicators become rQJ. When all transfer operations are completed, the sequence A busy indicator (BSYA) is reset to "0" in step S15, and at the same time, a reply signal RPY is sent to the command control unit 30 to request the next command execution instruction. . The command control unit 30 inhibits execution of the next command until the reply signal RPY is sent.

Based on the above explanation, an example of a program for transferring data from area A to area X, from area B to area Y, and from area C to area Z shown in FIG.
As shown in the figure. Transfer between blocks within an area corresponds to one data transfer command. Therefore, commands ■ to ■ specify data transfer from area 8 to area X, commands ■ to ■ specify data transfer from area B to area Y, and command ■ specify data transfer from area C to area Z. It turns out. The commands ■', ■' and ■' are synchronization instruction commands SYC. This FIG. 5 corresponds to the conventional example shown in FIG. FIG. 6 shows that in the instruction execution of FIG.
This figure shows the time relationship of the data transfer sequence when the end status of the instruction (2) becomes abnormal, and corresponds to the conventional example shown in FIG.

In this embodiment, as shown in FIG. 5, data transfer synchronization instruction commands ■' and ■' according to the present invention are inserted between data transfer commands in units where software wants to manage areas. , as shown in FIG. 6, even if an abnormality is detected in the instruction ■, the instruction ■ in the sequence A is executed by executing the synchronization instruction command ■' until the interrupt processing sequence is started.
Since the reply signal RP is sent after waiting until all the operations in area Z are completed, the instruction to execute the next instruction ■ is suppressed, and the data transfer by instruction ■ is not executed, so the contents of area Z are also guaranteed. become.

In other words, the software only needs to perform error processing and retry processing for area Y.

〔Effect of the invention〕

As explained above, when data is transferred between different storage areas, the present invention provides an instruction retry area for data transfer in which there is a risk of data destruction in the storage area due to an abnormal event that occurs during data transfer. By setting a synchronization instruction command for data transfer so that the software can recognize it, and executing this synchronization instruction command at the break of the data transfer command for the area that the software wants to retry in advance, it can be stored in a relatively simple way. The software can recognize and manage the data guarantee range within the area, and has the effect of enabling flexible and efficient failure handling and retry processing.

Therefore, according to the present invention, a data processing device with improved reliability and throughput can be obtained, and its effects are significant.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the main points of the configuration of a data processing device to which an embodiment of the present invention is applied. FIG. 2 is an explanatory diagram of data transfer between storage devices. FIG. 3 is an explanatory diagram showing an example of a command word format according to an embodiment of the present invention. FIG. 4 is a flowchart showing a control procedure of a transfer control unit according to an embodiment of the present invention. FIG. 5 is an explanatory diagram showing an example of a program according to an embodiment of the present invention. FIG. 6 is a time chart corresponding to FIG. FIG. 7 is an explanatory diagram showing an example of a conventional program. FIG. 8 is a time chart corresponding to FIG. 7. 10...Storage device (1), 20...Storage device (2)
, 30... instruction control unit, 40... transfer control unit, 10
1...Path (1), 102...Pass (2), 103
...Path (3), AD...Address signal, AD
(1), AD (2)...Field, OP...
Instruction code, INT...interrupt report signal, RPY...
Reply signal, RQ...Execution request signal, RQC...
Request code signal, SYC...Synchronization instruction command, W
D...Data transfer command. Patent Applicant NEC Corporation - Agent Patent Attorney Nao Ide Kyoto Example Atsushi 1 Figure 6 Conventional Example @, J Father - Rokunagi Burial "Nmata'L Button Example 8 Figure 8

Claims (1)

[Claims] (1) In a data transfer control method that controls data transfer between two different storage areas of a data processing system, a single synchronization instruction command that instructs synchronization of data transfer operations is set, and the instruction control unit performs the above Data characterized in that, when the synchronization instruction instruction is decoded, the next execution instruction in the instruction control unit is suppressed until the completion of the data transfer being executed and the presence or absence of an abnormal event that occurred during the data transfer execution are confirmed. Transfer control method.