JPS62196910A - Automatic gain amplification control circuit - Google Patents

Automatic gain amplification control circuit

Info

Publication number
JPS62196910A
JPS62196910A JP3817686A JP3817686A JPS62196910A JP S62196910 A JPS62196910 A JP S62196910A JP 3817686 A JP3817686 A JP 3817686A JP 3817686 A JP3817686 A JP 3817686A JP S62196910 A JPS62196910 A JP S62196910A
Authority
JP
Japan
Prior art keywords
switch
turned
gain
time
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3817686A
Other languages
Japanese (ja)
Inventor
Koichi Takahashi
浩一 高橋
Koki Terui
照井 光喜
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP3817686A priority Critical patent/JPS62196910A/en
Publication of JPS62196910A publication Critical patent/JPS62196910A/en
Pending legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To avoid damages of a telephone receiver even in case the switch of a device is turned on while a setting volume for sound level is kept at the maximum value for a handset, etc., by reducing the gain of an amplifier circuit immediately after the device switch is applied and then increasing automatically said gain in some steps and for each fixed period of time. CONSTITUTION:The switch of a handset is turned on for a circuit test and at the same time a switch 14 is turned on. Then an analog switch control circuit 13 starts a counting action by the pulse supplied from a pulse generator 15 to control both analog switches 10-12 respectively every fixed period of time. These switches 10-12 are all turned off immediately after the switch 14 is applied. Then the switch 10 is first turned on and the output value is increased compared with the original state when a fixed time (counted time of the circuit 13) passed. Then the switch 11 is turned on after a fixed time with the switch 10 kept on. Thus the amplification degree of an amplifier circuit 3 is gradually increased.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は音声信号などをバランスさせて出力させる増幅
回路に関し、特にマイクロ波通信回線の打ち合わせ用送
受話器の音量出力レベルをその動作スイッチの投入後、
自動的に可変することができる自動利得増幅制御回路に
関するものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an amplifier circuit that balances and outputs audio signals, etc., and in particular, adjusts the volume output level of a handset for a meeting on a microwave communication line by turning on the operation switch. rear,
The present invention relates to an automatic gain amplification control circuit that can automatically vary the gain.

〔従来の技術〕[Conventional technology]

従来、マイクロ波通信回線の打ち合わせ用送受話器にお
いては、第3図に示すように、2つの出力レベル設定用
増幅器1および2の一方の入力端子に入力信号V、、V
、を加え、これら入力信号Vt+v2の差を増幅して出
力電圧VOIJTとしてそれぞれ出力する差動型の増幅
回路3が使用されているが、この増幅回路3の増幅度は
常に一定の値となっていた。なお、前記各増幅器1,2
の出力端間には利得設定用可変抵抗4と固定抵抗8,9
が挿入されていて、各出力の音量レベルを調整するもの
となっている。
Conventionally, in a handset for a meeting on a microwave communication line, input signals V, , V are input to one input terminal of two output level setting amplifiers 1 and 2, as shown in FIG.
, and amplifies the difference between these input signals Vt+v2 and outputs each as an output voltage VOIJT. However, the amplification degree of this amplifier circuit 3 is always a constant value. Ta. Note that each of the amplifiers 1 and 2
A variable resistor 4 for gain setting and fixed resistors 8 and 9 are connected between the output terminals of
is inserted to adjust the volume level of each output.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかし、上述した従来の送受話器は、増幅回路3の増幅
度が常に一定となっているので、回線試験に際し送受話
器のスイッチを入れると、それと同時に大きな音量が出
力されて、スピーカなどの受話器をいためてしまうおそ
れがあるという欠点がある。
However, in the above-mentioned conventional handset, the amplification degree of the amplifier circuit 3 is always constant, so when the handset is turned on during a line test, a high volume is output at the same time, and the handset such as a speaker is The disadvantage is that it can cause damage.

本発明はこのような欠点を解消するためになされたもの
で、送受話器の音声出力レベルをそのスイッチの投入後
、自動的に可変するととができる自動利得増幅制御回路
を提供しようとするものである。
The present invention has been made to eliminate these drawbacks, and it is an object of the present invention to provide an automatic gain amplification control circuit that can automatically vary the audio output level of a handset after turning on the switch. be.

〔問題点を解決するための手段〕[Means for solving problems]

すなわち、本発明の自動利得増幅制御回路は、2つの出
力レベル設定用増幅器の一方の入力端子にそれぞれ入力
信号を加え、この2つの入力信号の差を増幅して出力す
るように構成された増幅回路において、該増幅回路の利
得設定用抵抗の両端間に複数個の利得設定用抵抗をそれ
ぞれ並列的に接続するとともに、それら利得設定用抵抗
に対しアナログスイッチをそれぞれ設け、これらアナロ
グスイッチを前記増幅回路が動作すると同時に一定の時
間間隔をおいて履次作動させることにより、前記増幅回
路の利得を時間の経過にともない自動的に可変するよう
にしたことを特徴とする。
That is, the automatic gain amplification control circuit of the present invention is an amplifier configured to apply an input signal to one input terminal of two output level setting amplifiers, respectively, and amplify and output the difference between the two input signals. In the circuit, a plurality of gain setting resistors are connected in parallel between both ends of the gain setting resistor of the amplifier circuit, analog switches are provided for each of the gain setting resistors, and these analog switches are connected to the amplifier circuit. The present invention is characterized in that the gain of the amplifier circuit is automatically varied over time by sequentially operating the circuit at regular intervals at the same time as the circuit is operating.

〔作用〕[Effect]

したがって、本発明によれば、増幅回路の利得を時間の
経過とともに自動的に可変することによシ、その利得を
当該増幅回路に関係づけられたスイッチの投入直後小さ
くし、一定時間ごとに何段階にわたって利得を漸次大き
くすることができる。
Therefore, according to the present invention, by automatically varying the gain of an amplifier circuit over time, the gain is reduced immediately after the switch associated with the amplifier circuit is turned on, and the gain is reduced at regular intervals. The gain can be increased progressively over the stages.

〔実施例〕〔Example〕

次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明による自動利得増幅制御回路の一実施例
を示す回路図である。この実施例の回路は、2つの出力
レベル設定用増幅器1および2の一方の入力端子に入力
信号v1.v2を加え、この2つの入力信号vl、v2
の差を増幅して出力電圧VOUTとしてそれぞれ出力す
るように差動型の増幅回路3が構成されている点は、第
3図に示す従来例のものと同様であるが、前記増幅回路
3の利得設定用可変抵抗4の両端間に複数個の利得設定
用固定抵抗5,6.7を並列的に接続するとともに、こ
れら各利得設定用固定抵抗5.6.7の接続部に対しそ
れぞれアナログスイッチ10,11.12を挿入する。
FIG. 1 is a circuit diagram showing an embodiment of an automatic gain amplification control circuit according to the present invention. In the circuit of this embodiment, an input signal v1. v2, and these two input signals vl, v2
The differential amplifier circuit 3 is configured to amplify the difference between the two and output them as the output voltage VOUT, which is similar to the conventional example shown in FIG. A plurality of gain setting fixed resistors 5, 6.7 are connected in parallel between both ends of the gain setting variable resistor 4, and an analog Insert switches 10, 11 and 12.

また、前記各アナログスイッチ10.11゜12を一定
の時間間隔をおいてオン、オフ制御するカウンタなどか
らなるアナログスイッチコントロール回路13を設け、
打ち合わせ用送受話器のスイッチ(図示せず)と連動す
る動作スイッチ14のオン時に駆動されるパルス発生器
15から発生するパルスを時間信号として前記コントロ
ール回路13に送出することによシ、前記増幅回路3の
利得を時間の経過にともない自動的に可変するように構
成されて、いる。
Further, an analog switch control circuit 13 consisting of a counter or the like is provided to control each of the analog switches 10, 11 and 12 to turn on and off at regular time intervals,
By sending pulses generated from a pulse generator 15, which is driven when an operation switch 14 interlocked with a switch (not shown) of a meeting handset is turned on, to the control circuit 13 as a time signal, the amplifier circuit The gain of 3 is automatically varied over time.

しかして、上記実施例の回路構成において、回線試験に
際し送受話器のスイッチがオンされると、それと同時に
スイッチ14がオンし、パルス発生器15から送出され
るパルスによりアナログスイッチコントロール回路13
はカウントを始め、一定時間ごとに第2図のようなタイ
ミングになるよう各アナログスイッチ10.11および
12を制御する。このとき、増幅回路3の動作開始時つ
まりスイッチ14の投入直後はアナログスイッチ10゜
11.12がすべてオフ状態にあシ、入力信号vl。
Therefore, in the circuit configuration of the above embodiment, when the switch of the handset is turned on during a line test, the switch 14 is turned on at the same time, and the pulses sent from the pulse generator 15 cause the analog switch control circuit 13 to
starts counting and controls each analog switch 10, 11 and 12 so that the timing as shown in FIG. 2 is obtained at regular intervals. At this time, when the amplifier circuit 3 starts operating, that is, immediately after the switch 14 is turned on, the analog switches 10, 11, and 12 are all in the off state, and the input signal vl is input.

v2による出力電圧VOtlTは、上記可変抵抗4の抵
抗値をRAN固定抵抗8,9の抵抗値をそれぞれR,I
Rνとすると、 となる。そして、ある一定時間(アナログスイッチ回路
13のカウント時間)が経過すると、まずアナログスイ
ッチ10がオンとなシ(第2図(1))、出力値が最初
の状態よシ大きくなる。その状態からまた一定時間経つ
とアナログスイッチ10がオンのtま、アナログスイッ
チ11がオンとなυ(第2図(b) ) 、また以前の
状態よシさらに増幅された出力値が出力される。このよ
うにして、増幅回路3の増幅度つt、b利得が徐々に大
きくなシ、各アナログスイッチ10〜12のすべてがオ
ン状態にある最終的な値は、利得設定用固定抵抗5,6
゜7の各抵抗値をそれぞれRB、Rc、RD とすると
、となシおちつくことになる。これによシ、従来のよう
に、送受話器のスイッチが投入されると同時に大きな音
量が出力されるのを防ぐことができる。
The output voltage VOtlT due to v2 is determined by the resistance value of the variable resistor 4 being RAN, and the resistance value of the fixed resistors 8 and 9 being R and I, respectively.
Letting Rv, it becomes. Then, after a certain period of time (count time of the analog switch circuit 13) has elapsed, the analog switch 10 is first turned on (FIG. 2 (1)), and the output value becomes larger than the initial state. After a certain period of time has elapsed from this state, the analog switch 11 is turned on until the analog switch 10 is turned on (Fig. 2 (b)), and an output value that is further amplified than in the previous state is output. . In this way, the amplification degree t, b gain of the amplifier circuit 3 gradually increases, and the final value at which all the analog switches 10 to 12 are in the on state is determined by the gain setting fixed resistors 5 and 6.
If the resistance values of 7 degrees are respectively RB, Rc, and RD, then the temperature will stabilize. This prevents a high volume from being output at the same time as the handset is switched on, unlike in the prior art.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明の自動利得増幅制御回路は、
機器のスイッチ投入直後の増幅回路の利得を小さくし、
ある一定時間ごとに自動的に利得を何段階かに上げてい
くことができるので、送受話器等の音量レベル設定ボリ
ュウムが最大(MAX)の状態でスイッチをオンにして
も、出力音lは時間と共に大きくなシ、これKよってス
ピーカーなどの受話器をいためるということがなくなる
効果がある。
As explained above, the automatic gain amplification control circuit of the present invention has the following features:
Reduce the gain of the amplifier circuit immediately after turning on the device,
The gain can be automatically increased in several steps at regular intervals, so even if you turn on the switch with the volume level setting of the handset etc. set to maximum (MAX), the output sound l will change over time. At the same time, there is an effect that the large size does not damage the receiver such as the speaker.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示す回路図、第2図は上記
実施例の動作に供するアナログスイッチのタイムシーケ
ーンスを示す説明図、第3図は従来の一例を示す回路図
である。 1.2・・・・出力レベル設定用増幅器、3・・・・増
幅回路、4・・・・利得設定用可変抵抗、5〜9・・・
・利得設定用固定抵抗、10〜12Φ・・・アナログス
イッチ、13・・・・アナログスイッチコントロール回
路、14・・・・スイッチ、15・拳・−パルス発生器
FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is an explanatory diagram showing a time sequence of an analog switch used in the operation of the above embodiment, and FIG. 3 is a circuit diagram showing a conventional example. . 1.2...Amplifier for output level setting, 3...Amplification circuit, 4...Variable resistor for gain setting, 5-9...
-Fixed resistor for gain setting, 10-12Φ...Analog switch, 13...Analog switch control circuit, 14...Switch, 15.Fist--Pulse generator.

Claims (1)

【特許請求の範囲】[Claims] 2つの出力レベル設定用増幅器の一方の入力端子にそれ
ぞれ入力信号を加え、この2つの入力信号の差を増幅し
て出力するように構成された増幅回路において、該増幅
回路の利得設定用抵抗の両端間に複数個の利得設定用抵
抗をそれぞれ並列的に接続するとともに、それら利得設
定用抵抗に対しアナログスイッチをそれぞれ設け、これ
らアナログスイッチを前記増幅回路が動作すると同時に
一定の時間間隔をおいて順次作動させることにより、該
増幅回路の利得を時間の経過にともない自動的に可変す
るようにしたことを特徴とする自動利得増幅制御回路。
In an amplifier circuit configured to apply an input signal to one input terminal of two output level setting amplifiers, and amplify and output the difference between the two input signals, the gain setting resistor of the amplifier circuit is A plurality of gain setting resistors are connected in parallel between both ends, and analog switches are provided for each of the gain setting resistors, and these analog switches are connected at a certain time interval at the same time as the amplifier circuit operates. An automatic gain amplification control circuit characterized in that the gain of the amplification circuit is automatically varied over time by sequential operation.
JP3817686A 1986-02-25 1986-02-25 Automatic gain amplification control circuit Pending JPS62196910A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3817686A JPS62196910A (en) 1986-02-25 1986-02-25 Automatic gain amplification control circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3817686A JPS62196910A (en) 1986-02-25 1986-02-25 Automatic gain amplification control circuit

Publications (1)

Publication Number Publication Date
JPS62196910A true JPS62196910A (en) 1987-08-31

Family

ID=12518078

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3817686A Pending JPS62196910A (en) 1986-02-25 1986-02-25 Automatic gain amplification control circuit

Country Status (1)

Country Link
JP (1) JPS62196910A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5256987A (en) * 1990-06-22 1993-10-26 Fujitsu Limited Power amplifier device having a plurality of power amplifier units connected in parallel

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5256987A (en) * 1990-06-22 1993-10-26 Fujitsu Limited Power amplifier device having a plurality of power amplifier units connected in parallel

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