JPS62195576A - Calibrating method for impedance meter - Google Patents

Abstract

PURPOSE:To calibrate the phase of an impedance meter almost on actual measurement conditions by detecting variation based upon variation in frequency as to the resistance component of the measured value of an impedance element. CONSTITUTION:The output of a signal source 302 is used to impose FM modulation upon the output of a main oscillator 304 and the output of a synchronism detector on the side of the 0 deg.-component detection side of a vector voltage ratio measuring circuit 312 is subjected to the synchronism detection 318 through an LPF 316 with the output of the signal source 302. The frequency of a clock supplied to a phase shifter 314 is so varied that a component synchronizing with the modulated signal is zero. In this case, the output of the synchronism detector 318 is supplied to a comparator 320 and the output frequency of a variable frequency oscillator is so varied that said output is zero. Consequently, the 0 deg. and 90 deg. axes of the circuit 312 are rotated to compensate the phase shift of a measurement system.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method of calibrating the phase of an impedance meter, that is, a method of calibrating the phase of an impedance meter to match the phase angle of 00, etc.

[Prior art and its problems]

Conventionally, the following method has been used to calibrate the 0'' or zero loss of the entire system including the impedance meter itself or the test fixture.

l) Connect a standard capacitor to the 4-terminal measuring terminal of the impedance meter body, and perform one calibration of θ'' assuming that a pure capacitance is connected.

2) Remove residual impedance by performing measurements with the ends of the test fixture open and shorted.

3) Attach a known device under test (
DUT) and calibrate the capacitance value (Crtfl) and loss coefficient value (DTSukuda).

However, all of the above-mentioned methods have the following problems.

Method 1) does not allow us to know the influence of the test fixture. Even if a standard capacitor is made to match the test fixture, such calibration does not account for changes over time after leaving the factory.

In this standard conde method 2), a typical user only performs the next calibration of the residual amount of open and short circuits, and cannot calibrate near the value of the DUT.

In method 3), since the D value of the "known" D-hair T is usually unknown, even if this calibration is performed, only a measurement result in the form of a comparison with a known DUT can be obtained.

[Purpose of the invention]

An object of the present invention is to calibrate the phase of an impedance meter without using expensive standard capacitors and under conditions as close as possible to actual measurement conditions.

[Summary of the invention]

According to one embodiment of the invention, the impedance (or admittance) of an impedance element, such as a capacitor, is measured at at least two frequencies. Suppose that it is observed that the resistance of the element changes due to this frequency change. This change in resistance is caused by the fact that the O', 90" axis of the measurement system is tilted with respect to the true axis, so the change in element actance is orthogonally projected onto the tilted 0" axis. . The amount of this slope can be easily calculated if the changes in resistance, reactance, and frequency are known. Therefore, it is sufficient to obtain the amount of inclination at the time of calibration, and to correct the measured raw value using this amount of inclination in the normal measurement mode.

Instead of performing correction during normal measurement, the slope of the Oo axis of the measured value may be set to zero during calibration. To do this, for example, a means for making the 01' axis of the measurement system variable may be provided, and the above-mentioned means may be controlled so as to eliminate the change in resistance that appears due to frequency change.

[Embodiments of the invention]

Hereinafter, the present invention will be explained in detail using the drawings.

A capacitor, such as a film capacitor, with
Connect to a test fixture, test head, etc. attached to the end of the scanner output.

Next, the frequency is changed several times above and below the frequency at which the measurement is originally performed by the measuring instrument, and the resistance-reactance (or conductance-susceptance) components of each frequency are measured.

Referring to Figure 1, even if the 7 domitance of a capacitor is measured at two points at frequencies f, f, +Δf, the conductance component G in the admittance Y(f,), Y(f, +Δf) remains constant. It is. However, if the Oo axis of the measurement system is rotated by θ with respect to the true 0″ axis, the conductance component G′(f,) measured by the measuring instrument a,
G'(f, +Δf) changes as shown.

The amount of change in this conductance component ΔG = G'(f, +Δf)-G'(f,)...
・・・・・・・・・・・・・・・ As is clear from Figure 1, (1) is ΔG; ΔBXsinθ ・・・・・・・・・・・・・・・
・・・・・・・・・・・・・・・・・・ (2) Note that here ΔB is the value at these two frequencies.
・・・・・・・・・・・・・・・・・・・・・・・・ （
3) (where C is the capacitance of the capacitor)
.

SL (: Q.5 Narichi!! Sword left side i, h7 Hini no Inukigo 1 Songjo Daisen's F51Sr, 13 degrees. In addition, susceptance component B (fl+) in the case of frequency 11 r) teeth,
If θ is small, the measurement results can be used as is. Or B(f,) from the two measured 7 domitances and frequencies f-, fa + Δf.

It is also possible to obtain θ in discrete terms, but the details will be omitted.

Here, we will consider the resolution of one calibration in a measuring instrument that obtains measurement results as digital values. Let θ be the minimum angle C that can be detected, and let Bc be the count value of susceptance B(f,). Further, in this case, the count value of ΔG is the minimum value that can be distinguished from zero, that is, one. Therefore, ε
Using the fact that The range of change can be found using .

As explained above, the magnitude θ of the phase shift of the measurement system including the test fixture etc. can be found using equation (4).

Once θ is known, the measuring device is returned to the normal measurement mode, and a signal of frequency r is applied to the original DUT for measurement.

Correcting calculations and the like are performed on this measurement result based on the magnitude θ of the phase shift to obtain a correct value.

As is clear from equation (2), the resistance (ie, loss) of the capacitor used during normal calibration does not affect the change ΔG in the conductance component (see FIG. 2). Therefore, according to this method, it is possible to perform one calibration that is completely unaffected by the size of the loss of the capacitor used for one calibration. What is required is that when the frequency is changed, the actance and resistance components of the capacitor do not change, and the phase shift θ of the measuring instrument does not change. In the case of normal IIk2 positive operation, these conditions are easily satisfied because the frequency change is only about ±IO× at most. As for capacitors, it is very easy to obtain film capacitors that meet the above requirements for frequencies up to RM Hz.

In the embodiments described above, actual correction was performed by performing correction calculations on individual measurement data obtained during normal measurements. However, it is also possible to set θ to zero on the hour of IIIu.

FIG. 3 is a schematic block diagram showing an apparatus for implementing the method of the present invention on the stream side, and is a conventional impedance. In Figure 3, during normal measurement, the main oscillator 3
04 generates a signal with a frequency .1 times the frequency f0 at which measurement is performed. This signal is divided by four by a frequency divider 306 and passed through a low pass filter 308 to the DUT 310.
given to. The output of DUT3]0 is given to a vector voltage ratio measurement circuit (VRD) 312. Main oscillator 304
The output is also given to the VRD 312 after being delayed by a phase shift circuit 314 using a COD or the like. VRD
In 312, the circumference m given via the transfer circuit 31.1
Using the signal of Equation 41, two signals having a phase difference of 0* and 90Q from the signal given to the 0UT 310 are created, respectively, and the signal input from the DUT 310 is detected one-to-one using these signals. Since VRD3+2 is well known to those skilled in the art, further explanation will be omitted.

In addition, the one shown as VRD in Figure 3 is the same hawk number as the main one, and is the same one for conducting the same inspection! Note that it is only the U1 detector.

Now, in order to perform the calibration according to the present invention with the apparatus shown in FIG. 3, first, a capacitor such as that used in the above embodiment is connected as DUT 310. Then, the modulation signal source 302 applies FM modulation to the output of the main oscillator 304 . The output of the synchronous detector on the 06 component detection side of the VRD 312 is passed through the low pass filter 316 and then sent to the modulation signal source 3.
The frequency of the clock signal given to the synchronous detection 14 is changed by the output of 02.

To do this, the same! The output of the g1 detector 318 is introduced, and the output frequency of a variable frequency oscillator (for example, a fractional-N synthesizer) is varied until this output becomes zero. As a result, the 0', 90° ldl of V[n D312 is rotated, and the phase shift of the system measuring device is compensated f1).

FIG. 4 is a modification of the gc position shown in FIG. 3, and elements common to those in FIG. 3 are given the same reference numerals.

The device shown in FIG. 4 provides a variable delay to the signal from the main oscillator 30.t, and is used as a variable delay device for adjusting the 06.906 axis of VRD3+2, for example, as a one-shot.
× A delay device 414 using a voltage-controlled delay circuit such as a multivibrator is used. Switch 43 during calibration
2 is closed and the output of the synchronous detector 318 is refined and applied to the delay device as a control voltage. When this feedback loop becomes stable, switch t32 is opened and the control voltage at this time is maintained.

As a modification of the configuration shown in Figures 7R3 and 7R3, there is also a method of manually performing the calibration without using the feedback loop shown therein. For example, in FIG. 4, a knob may be provided on the panel to display the output voltage of the synchronous detector 318 and to control the control voltage ffi:Afi to the delay device t14. Then, during the first calibration, the first calibration according to the present invention is performed by turning the knob so that the reading of the output voltage of the synchronized wave generator 318 becomes zero.

〔Effect of the invention〕

As explained above, according to the present invention, the phase shift of the impedance meter can be reduced by 1.
Can perform occlusal correction. In other words, Te! It becomes possible to calibrate the entire structure including the station and fixture before measurement. Furthermore, it is possible to calibrate l near the CUT value to be measured.

Furthermore, the impedance elements used for calibration, such as capacitors, are not required to have high accuracy or low loss, and are therefore extremely easy to obtain, allowing highly accurate calibration to be performed at the site of use. Further, after the phase shift is calibrated according to the present invention, the absolute value can be calibrated simply. For example, the measurement El is approximately equal to the i day m of the DUT to be measured (for example, ±fj
! (within i%) Measuring the resistance force of the gold-plated resistor and comparing this result with the direct a resistance value of this resistor. This is because the resistance and actance no longer affect the resistance of the embankment measured in alternating current.

[Brief explanation of drawings]

FIG. 2 is a diagram for explaining an embodiment of the present invention, FIG. 2 is a diagram for explaining that the method of the present invention can be carried out regardless of the magnitude of the resistance of the impedance element, and FIGS.
The figure is a schematic block diagram of an apparatus for carrying out the method of an alternative embodiment of the invention. θ: Phase shift of measurement type

Claims (1)

[Claims] An impedance element whose resistance component does not substantially change depending on frequency is measured with an impedance meter while changing the frequency, and a variation in the resistance component of the measured value of the impedance element based on the change in frequency is calculated. A method for calibrating an impedance meter, comprising: detecting the variation and calibrating the phase of the impedance meter based on the variation.