JP2005189184A - Automatic balanced circuit for measuring impedance - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To dispense with range switching, when measuring electrostatic capacity. <P>SOLUTION: The automatic balanced circuit includes a first oscillator 101 for applying a sine wave signal on one terminal of a sample to be measured 102; a second oscillator 106 for outputting a sine wave signal of the same frequency as that of the first oscillator via a detection element 105 on the other terminal side of the specimen to be measured; a voltage detector 107 for detecting the voltage of the other terminal side of the sample to be measured and an A/D converter 108 for converting the detection voltage into a digital signal; and a control means 109 for controlling the amplitude and the phase angle of the first oscillator or the second oscillator, on the basis of voltage data. In the automatic balanced circuit for measuring the impedance, for calculating the amplitude and the phase angle of each oscillator, and the impedance and the phase angle of the sample to be measured from the impedance and phase angle of the detection element under a balanced state setting prescribed amplitude and phase angle on any one of the oscillators by the control means and making the voltage of the other terminal side of the specimen to be measured minimal, a capacitor 105b is used as the detection element, when measuring the electrostatic capacity of the specimen to be measured. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an automatic balance circuit for impedance measurement applied to LCR meters, impedance analyzers, and the like. More specifically, a balanced state can be obtained even in a high frequency band, and the impedance and phase angle of a sample to be measured can be measured with high accuracy. It is related to the technology.

  First, FIG. 3 shows a basic configuration of an automatic balancing circuit used in an impedance measuring instrument such as an LCR meter or an impedance analyzer. The automatic balancing circuit 300 is connected to an oscillator 301 for applying a sine wave signal having a predetermined frequency from the H terminal on the signal input side to the sample 304 to be measured, and to the other terminal side of the sample 304 to be measured via the L terminal. And a signal detection unit.

  In this case, the signal detection unit has an operational amplifier 306 as a current-voltage converter, the detection signal from the L terminal is input to the (−) input terminal side, and the (+) input terminal is grounded. A detection resistor 305 is connected to a feedback system between the output terminal and the (−) input terminal of the operational amplifier 306.

  When the gain of the operational amplifier 306 is sufficiently large, since the L terminal becomes 0 V due to an imaginary short, the amplitude of the oscillator 301 is A, the phase angle is θa, and the amplitude of the output signal output from the operational amplifier 306 is B. If the phase angle is θb, the impedance of the detection resistor 305 is Zf, and the phase angle is θf, the impedance Zm and the phase angle θm of the sample 304 to be measured can be obtained by the following equations.

Zm = Zf × A / B
θm = θf + θa−θb−180 °

  Although the automatic balancing circuit 300 has a simple configuration, when the frequency of the measurement sine wave signal given from the oscillator 301 to the sample 304 to be measured is increased, the gain of the operational amplifier 306 is decreased, so that an imaginary short circuit is not established. A voltage is generated at the L terminal. As a result, a current flows through the input capacitance C existing between the L terminal and the ground (GND), resulting in a measurement error.

  Therefore, an automatic balancing loop called a null loop method has been proposed in order to maintain the L terminal at 0 V up to the high frequency band (see Patent Document 1 as an example). FIG. 4 shows a circuit configuration in which a null loop method is adopted in the automatic balancing circuit of FIG.

  In this null loop method, the current of the sample 302 to be measured flowing into the L terminal is converted and amplified to a voltage by a null detection circuit 401 composed of an inverting operational amplifier, and input to the subsequent multipliers 402 and 403. One multiplier 402 is supplied with the sine wave signal of the oscillator 301 as a reference signal, and the other multiplier 403 is supplied with the sine wave signal of the oscillator 301 through the 90 ° phase shifter 404 as a cosine wave signal. Thus, vector detection is performed.

  Subsequently, the outputs of the multipliers 402 and 403 are integrated and smoothed by the integrating circuits 405 and 406, respectively. The smoothed vector detection signal is supplied to multipliers 407 and 408. In one multiplier 407, the sine wave component vector-detected by the multiplier 402 is multiplied by the sine wave signal from the oscillator 301, and in the other multiplier 408, the cosine wave component vector-detected by the multiplier 403 is multiplied by 90. The cosine wave signal from the phase shifter 404 is multiplied.

  These multiplication results are added by the adder 409 and fed back to the null detection circuit 401 via the detection resistor 305. According to this null loop method, the current fed back to the null detection circuit 401 via the detection resistor 305 has the same value as the current flowing through the sample to be measured. That is, since the feedback current by the detection resistor 305 changes so that the voltage output from the null detection circuit 401 is always 0 V, an automatic balancing loop is configured.

  According to the null loop method, even when the frequency of the measurement sine wave is high, the voltage at the L terminal can be maintained at 0 V, and therefore the influence of the input capacitance existing between the L terminal and ground (GND). However, there is a problem in the following points.

  That is, many circuit parts are required, the configuration is complicated, the apparatus becomes large, and the cost must be increased. In addition, the circuit tends to become unstable because it is balanced in an analog manner. Furthermore, it is difficult to obtain a complete equilibrium state due to the DC offset of the multiplier and integrator for synchronous detection.

  Therefore, the present applicant has previously proposed an automatic balance circuit for impedance measurement which has a simple and stable circuit configuration and can easily obtain a balanced state by digital control (see Patent Document 2). ).

  The automatic balance circuit for impedance measurement includes a first oscillator that applies a sine wave signal having a predetermined frequency to one terminal of the sample to be measured, and a first detection element on the other terminal side of the sample to be measured via a predetermined detection element. A second oscillator that outputs a sine wave signal having the same frequency as the sine wave signal of one oscillator, a voltage detector that detects a voltage on the other terminal side of the sample to be measured, and converts the detected voltage into digital voltage data. An A / D converter; and control means for controlling the amplitude and phase angle of the first oscillator or the second oscillator based on the voltage data, and the amplitude and phase of any one of the oscillators by the control means. The angle is controlled so that the voltage appearing on the other terminal side of the sample to be measured is minimized, and the amplitude and phase angle of the first oscillator, the amplitude of the second oscillator, and Phase angle, calculates the impedance and phase angle of the measured sample from the impedance and the phase angle of the detection resistor.

Japanese Patent No. 2846926 JP 2002-323520 A

  According to the automatic balancing circuit for impedance measurement, a second oscillator having the same oscillation frequency as the first oscillator is provided on the signal detection side separately from the first oscillator on the signal application side, and the amplitude of the two oscillators is controlled by the control means. By adjusting the phase angle, the circuit configuration is simple and stable, and a balanced state can be easily obtained by digital control. However, the following problems occur when the measurement target is a capacitance (capacitor). is there.

  That is, when the capacitance is measured using a resistance element as the detection element on the second oscillator side, since the impedance value of the capacitance changes depending on the frequency, the same capacitance is measured by changing the frequency. In this case, it is necessary to switch the range depending on the resistance element. Further, when the measurement frequency covers a wide range, it is necessary to prepare a large number of ranges accordingly.

  As an example, when the capacitance of the capacitor is measured in a measurement frequency range of 100 kHz to 100 MHz, the impedance differs by 1000 times, so 3 to 4 ranges are required to cover this range. Moreover, when the measurement frequency is in the range of 100 kHz to 100 MHz and the measurement range of the capacitor is 1 pF to 100 pF, 6 ranges are required.

  The present invention has been made to solve the above-described problems, and its purpose is to eliminate the need for range switching when measuring capacitance in an impedance measurement automatic balancing circuit having a configuration based on Patent Document 2. There is to do.

  In order to achieve the above object, the present invention provides a first oscillator that applies a sine wave signal having a predetermined frequency to one terminal of a sample to be measured, and a predetermined detection element on the other terminal side of the sample to be measured. A second oscillator that outputs a sine wave signal having the same frequency as the sine wave signal of the first oscillator, a voltage detector that detects the voltage on the other terminal side of the sample to be measured, and the detected voltage as digital voltage data An A / D converter for conversion, and control means for controlling the amplitude and phase angle of the first oscillator or the second oscillator based on the voltage data, and the voltage on the other terminal side is controlled by the control means. The impedance of the sample to be measured is determined from the amplitude and phase angle of the first oscillator, the amplitude and phase angle of the second oscillator, and the impedance and phase angle of the detection resistor under the minimum equilibrium state. In impedance measurement auto-balancing circuit for calculating the scan and the phase angle, when measuring electrostatic capacity of the measuring sample, it is characterized in that a capacitor is used as the sensor element.

  In the present invention, the detection element preferably includes a resistor and a capacitor that are selectively switched by a switch means.

In the present invention, the control means sets any different phase angles θx, θy, θz to either the first oscillator or the second oscillator in a state where the amplitude is an arbitrary amplitude a. The voltage Vx, Vy, Vz appearing on the other terminal side of the sample to be measured is measured for each phase angle, and the balance is set to minimize the voltage on the other terminal side by the following equation (A). After obtaining the phase angle θmin as the first establishment factor of the state and adjusting the phase angle of one of the oscillators to the phase angle θmin, the amplitude of the oscillator is sequentially set to two different amplitudes B1 and B2. The voltages V1 and V2 appearing on the other terminal side of the sample to be measured are measured for each amplitude, and the amplitude Bmin as the second establishment factor of the equilibrium state is obtained by the following equation (B) or (C). Above The balanced state is obtained by adjusting the amplitude of one of the oscillators to the amplitude Bmin.

In the present invention, the control means adjusts the phase angle of any one of the oscillators to the phase angle θmin according to the formula (A), and then sets the amplitude of the oscillator to the amplitude a. Assuming that the voltage appearing on the other terminal side is Va, and the voltage Va is equal to or higher than the voltages Vx, Vy, and Vz, the phase angle θmin set for one of the oscillators is expressed by the following formula (D) The value obtained by

  According to the present invention, when the measurement object is a capacitance, a capacitor is used as a detection element. Therefore, even if the measurement frequency is varied, the impedance ratio between the measurement object and the detection element (capacitor) does not change, so the range is measured. There is no need to change the frequency.

  Also, when measuring an element with a very small capacitance (high impedance) as a sample to be measured, it is necessary to increase the input impedance of the voltage detector. However, if the detection element is a resistance element, the impedance value of the input capacitance Changes depending on the measurement frequency, the lower the voltage of the other terminal of the sample to be measured, the lower the value, and the design of the subsequent gain circuit becomes difficult. On the other hand, if a capacitor is used as the detection element as in the present invention, the ratio between the input capacitance and the detection capacitor is constant regardless of the measurement frequency, so the voltage at the other terminal of the sample to be measured is also set to the measurement frequency. Regardless of the constant, there is also an effect that the design of the subsequent gain circuit becomes easy.

  Next, an embodiment of the present invention will be described with reference to FIG. 1, but the present invention is not limited to this.

  The automatic balance circuit 100 for impedance measurement according to the present invention includes two oscillators, a first oscillator 101 and a second oscillator 106, and includes an H terminal (signal application side terminal) on the first oscillator 101 side and an L terminal on the second oscillator 106 side. The sample to be measured 102 is mounted between the terminal (current detection side terminal).

  A sine wave signal having a predetermined frequency is supplied from the first oscillator 101 to the sample 102 to be measured, and a sine wave signal having the same frequency as the measurement sine wave signal is also output from the second oscillator 106. A detection element 105 is connected between 106 and the L terminal.

  In the present invention, the detection element 105 includes a detection resistor 105a and a detection capacitor 105b that are selectively switched by a switch SW. In the following description, it is assumed that the detection resistor 105a is selected by the switch SW.

  The automatic balancing circuit 100 includes a voltage detector 107 that detects the voltage at the L terminal, an A / D converter 108 that converts the detected voltage into a digital signal, and detected voltage data from the A / D converter 108. And a CPU 109 as a control means having a function of calculating the impedance and the phase angle of the sample 102 to be measured.

  According to the present invention, the CPU 109 sets any three different phase angles to the second oscillator 106 in the state where the amplitude is the arbitrary amplitude a. Θmin as a first establishment factor for setting the terminal to the minimum voltage (preferably 0 V) is obtained, and then the CPU 109 sets two different amplitude values for the second oscillator 106 to obtain the above formula ( Bmin or Bmin as a second establishment factor for setting the L terminal to the minimum voltage (preferably 0 V) is obtained based on (B) or (C). In the present invention, the balanced state includes not only the state where the L terminal is set to 0 V but also the state where the minimum voltage is set in the vicinity thereof.

  First, the process of deriving the above formula (A) will be described. The amplitude of the first oscillator 101 is A, the phase angle is θa, the amplitude of the second oscillator 106 is B, the phase angle is θb, the impedance of the detection resistor 105a is Zf, the phase angle is generated at the θf, and the L terminal is generated. The impedance of the capacitor C is Zi, its phase angle is θi, the impedance of the sample 102 to be measured is Zm, and its phase angle is θm. The frequencies of the first oscillator 101 and the second oscillator 106 are the same and are ω.

Current flows into the L terminal from the first oscillator 101 side and the second oscillator 106 side. From Kirchhoff's current law, the voltage of the L terminal is VL, and the relationship of the following formula (1) is established between the currents.

The expression (1) is modified and bundled with VL to obtain the following expression (2).

In order to simplify the equation, {1 / (Zm∠θm) + 1 / (Zi∠θi) + 1 / (Zf∠θf)} on the left side of the equation (2) is defined as Yt∠θt. It is transformed as shown in equation (3).

Therefore, VL is represented by the following formula (4).

Here, the absolute value | V | of the combined vector of any two complex vectors V1 and V2 is expressed by the general formula of the following formula (5), and the phase angle θ of the combined vector is expressed by the following formula (6). Represented by the general formula. In the equation, θ1 is the phase angle of the complex vector V1, and θ2 is the phase angle of the complex vector V2.

  Therefore, the first term (Zf∠θf) · Asin (ωt + θa) / {(Zm∠θm) (Zf∠θf) (Yt∠θt) in the above formula (4) is added to V1 of the general formula (5). } And substitute the second term (Zm∠θm) · Bsin (ωt + θb) / {(Zm∠θm) (Zf∠θf) (Yt∠θt)} in the above equation (4) into V2. Thus, the absolute value of the VL composite vector shown in the following equation (7) and the phase angle θ of the VL composite vector shown in the following equation (8) are obtained.

In order to simplify equation (7) above,
A ² · Zf ² + B ² · Zm ² / (Zf · Zm · Yt) ² = C
2 · A · Zf · B · Zm / (Zf · Zm · Yt) ² = D
And replace VL with the following equation (9).

Here, if the phase θa of the first transmitter 101 and the phase angle θf of the detection resistor 105a have been adjusted to 0 ° in advance, VL is expressed by the following equation (10).

Therefore, when the phase angle θb of the second oscillator 106 is arbitrarily set to three different phase angles θx, θy, θz, the output voltages Vx, Vy, Vz appearing at the L terminal at that time are expressed by the following equations (11) to (11): 13).

When the above equations (11) to (13) are squared and then cos expansion is performed, the following equations (14) to (16) are obtained.

Next, the following equations (17) and (18) are obtained by taking the difference between the above equations (14) and (15) and the difference between equations (15) and (16).

Subsequently, the following formula (19) is obtained by taking the ratio of the above formula (17) and formula (18).

When the above equation (19) is solved for the tangent function tanθm, the following equation (20) is obtained.

By rewriting the above equation (20) into an arctangent function, the following equation (21) for θm is obtained. Note that θm obtained here is a phase angle of the sample 102 to be measured in calculation when the L terminal is not yet adjusted to the equilibrium state.

According to the above equation (10) for the voltage VL at the L terminal, VL = {C + D · cos (θb + θm)} ^1/2 . Therefore, in this equation, VL has the minimum value as cos (θb + θm) = − 1. That is, when θb + θm = 180 °.

Therefore, by setting the phase angle of the second oscillator 106 to θb of 180 ° −θm, the voltage VL at the L terminal can be brought close to 0V. If the phase angle of the second oscillator 106 at this time is θmin,
θmin = 180 ° −θm
= 180 ° −tan ⁻¹ [{(Vx ² −Vy ² ) · (cos θy−cos
θz) − (Vy ² −Vz ² ) · (cos θx−cos θy)} /
{(Vx ² −Vy ² ) · (sin θy−sin θz) − (Vy ² −V
z ² ) · (sin θx−sin θy)}]
This equation is an equation (A) as a first establishment factor for setting the L terminal in a balanced state (minimum voltage, preferably 0 V).

  The phase angle θmin calculated in this way is in the range of 90 ° to 180 ° to 270 °. When the object to be measured is a capacitor, resistor, coil or the like, the phase angle θmin normally falls within the range of 90 ° to 180 ° to 270 °, and therefore there is no particular problem with the above algorithm. However, the phase angle θmin may be outside the range of 90 ° to 180 ° to 270 ° depending on the phase error caused by the operational amplifier or filter used in the measurement circuit.

  Therefore, in the present invention, after adjusting the phase angle of one of the oscillators, in this embodiment, the second oscillator 106, to the phase angle θmin according to the above formula (A), the amplitude of the second oscillator 106 is adjusted to the voltage Vx, The voltage Va appearing at the L terminal is measured as the amplitude a when Vy and Vz are obtained.

  Then, the voltage Va is compared with the voltages Vx, Vy, Vz, and when the voltage Va ≧ (Vx, Vy, Vz), it is determined that the phase angle θmin is out of the range, and the phase angle θmin is A value obtained by the following equation (D) is set, and the phase angle θmin according to the equation (D) is set in the second oscillator 106 as the first establishment factor of the equilibrium state.

θmin = −θm
= −tan ⁻¹ [{(Vx ² −Vy ² ) · (cos θy−cos θz)
− (Vy ² −Vz ² ) · (cos θx−cos θy)} /
{(Vx ² −Vy ² ) · (sin θy−sin θz) − (Vy ² −V
z ² ) · (sin θx−sin θy)}] …… Formula (D)

  When the voltage Va is lower than the voltages Vx, Vy, Vz, the phase angle θmin according to the above formula (A) is adopted as it is. As described above, when the phase angle θmin is calculated, the equation (A) and the equation (D) are prepared, so that the phase of the equilibrium condition can be captured over the entire 360 ° range. Even if errors occur, the algorithm works correctly.

  As can be seen from the above equations (A) and (D), the optimum phase angle θmin of the second oscillator 106 is set to any three different values θx, θy, and θz as the phase angle of the second oscillator 106. Can be calculated.

In order to simplify the above formulas (A) and (D), the sin term and the cos term included in the formula may be either 1, -1, or 0, respectively. For example,
θx = 90 °, the L terminal voltage at that time is V90,
θy = 180 °, the L terminal voltage at that time is V180,
θz = 270 °, and the L terminal voltage at that time is V270,
Then, the above formula (A) and formula (D) are represented by the following simplified formula (A-1) and formula (D-1), respectively.

この式（Ａ−１）もしくは式（Ｄ−１）によれば、制御手段としてのＣＰＵ１０９の負担を軽減することができる。

According to the formula (A-1) or the formula (D-1), the burden on the CPU 109 as the control unit can be reduced.

  In the present invention, after setting the phase angle of the second oscillator 106 to the above-mentioned θmin by the CPU 109, the amplitude B of the second oscillator 106 is adjusted by the CPU 109 so that the L terminal further approaches an equilibrium state (minimum voltage, preferably 0V). By setting two different amplitude values (preferably two different amplitude values within the same range) for the second oscillator 106, the second terminal 106 is adjusted to Bmin as a second establishment factor that brings the L terminal into an equilibrium state. .

As in the above equation (7), the absolute value of the combined vector of the voltage VL at the L terminal is
VL = {A ² · Zf ² + B ² · Zm ² + 2 · A · Zf · B · Zm · cos (θa−
θb + θf−θm)} ^1/2 / (Zf · Zm · Yt)
When it is set to θmin, cos (θa−θb + θf−θm) = 1, so when this square root is removed, the following equation (22) is obtained.

  In the above equation (22), when the amplitude of the second oscillator 106 is an arbitrary amplitude B1, the voltage VL at the L terminal is V1, and the voltage VL at the L terminal when the arbitrary amplitude is B2 is V2. , The following expressions (23) and (24) relating to V1, and the following expressions (25) and (26) relating to V2 are obtained.

または、

Or

または、

Or

  When both sides of the above formulas (23) and (24) are multiplied by (Zf · Zm · Yt) / V1, the following formulas (27) and (28) are obtained, and the above formulas (25) and (26) are obtained. ) Are multiplied by (Zf · Zm · Yt) / V2 to obtain the following equations (29) and (30).

  Since the left sides of the above formula (27) and the formula (29) are equal, the following formula (31) is obtained. Similarly, from the above formula (27) and the formula (30), the following formula (32) is obtained. can get. Similarly, from the above formula (28) and formula (29), the following formula (32) is obtained, and from the above formula (28) and formula (30), the following formula ( 31) is obtained.

When the above equations (31) and (32) are solved for Zm, the following equations (33) and (34) are obtained.

  Here, by substituting Zm in the above equations (33) and (34) into Kirchoff's current law for the current at the L terminal, B = A · Zf / Zm derived from B / Zf−A / Zm = 0, The following equation (B) or equation (C) for obtaining Bmin as a second factor for setting the L terminal to the equilibrium state (0 V) is obtained.

Bmin = (B1 · V2−B2 · V1) / (V2−V1) Expression (B)
Bmin = (B1 · V2 + B2 · V1) / (V2 + V1) Expression (C)

  As described above, according to the present invention, the CPU 109 sets the three different phase angles with respect to the second oscillator 106 so that the L terminal is set to the minimum voltage (preferably 0 V). Θmin as a factor is obtained, and then the CPU 109 sets two arbitrarily different amplitude values for the second oscillator 106 to obtain Bmin as a second establishment factor for setting the L terminal to 0V. The L terminal can be brought into a balanced state (preferably 0 V).

  In order to obtain the equilibrium condition more accurately, the above algorithm is repeated several times while changing the values of the phase angles θx, θy, θz and the amplitudes B1, B2, and the optimum values of θmin, Bmin are determined from among them. Just choose. Further, after obtaining θmin and Bmin as described above, the values can be swept slightly in the + and − directions to adjust the voltage at the L terminal to 0V. As a modification, the oscillation frequency on the second oscillator 106 side may be fixed, and the CPU 109 may control the first oscillator 101 side in the same manner as in the above embodiment.

  By the way, when the sample 101 to be measured is a capacitor or when the capacitance included in the sample 101 to be measured is measured, that is, when the measurement target is a capacitance, the impedance value of the capacitance is measured frequency. Therefore, when the same capacitance is measured by changing the measurement frequency, when the detection resistor 105a is used as the detection element 105, it is necessary to appropriately switch the range of the detection resistor according to the measurement frequency. . Although only one detection resistor 105a is shown in FIG. 1, it is necessary to select one of a plurality of resistors in parallel.

  Therefore, in the present invention, when the measurement target is capacitance, the detection capacitor 105b is selected by the switch SW as the detection element 105. According to this, even if the measurement frequency is varied, the ratio between the capacitance of the sample 101 to be measured and the detection capacitor 105b does not change, so it is not necessary to switch the range according to the measurement frequency.

  Note that even when the measurement target is a capacitance, the algorithm for making the equilibrium state is the same as in the above example, and the voltage at the L terminal in the equilibrium state is minimum (preferably 0 V), so the influence of the input capacitance The impedance Zm and the phase angle θm of the sample 102 to be measured are obtained from the following equations from the set values of the amplitude and the phase angle of the first and second oscillators 101 and 106 without being subjected to the above.

Zm = Zc × A / B [Ω]
θm = θc + θa−θb−180 [°]
Where A is the amplitude of the first oscillator 101, B is the amplitude of the first oscillator 106, Zc is the impedance of the detection capacitor 105b, θa is the phase angle of the first oscillator 101, θb is the phase angle of the second oscillator 106, and θc is This is the phase angle of the detection capacitor 105b.

The block diagram which shows the automatic balance circuit for impedance measurement by this invention. The block diagram which shows the basic composition of the automatic balance circuit for impedance measurements. The block diagram which shows the automatic balance circuit by a null loop system as a prior art example.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Automatic balance circuit 101 1st oscillator 102 Sample to be measured 105 Detection element 105a Detection resistance 105b Detection capacitor 106 Second oscillator 107 Voltage detector 108 A / D converter 109 CPU
SW switch

Claims (4)

A first oscillator that applies a sine wave signal of a predetermined frequency to one terminal of the sample to be measured, and the same frequency as the sine wave signal of the first oscillator via a predetermined detection element on the other terminal side of the sample to be measured A second oscillator that outputs a sine wave signal, a voltage detector that detects a voltage on the other terminal side of the sample to be measured, an A / D converter that converts the detected voltage into digital voltage data, and the voltage Control means for controlling the amplitude and phase angle of the first oscillator or the second oscillator based on the data, and under the equilibrium state in which the voltage on the other terminal side is minimized by the control means, Impedance for calculating the impedance and phase angle of the sample to be measured from the amplitude and phase angle of the first oscillator, the amplitude and phase angle of the second oscillator, and the impedance and phase angle of the detection resistor. In the auto-balancing circuit for Nsu measurement,
An automatic balancing circuit for impedance measurement, wherein a capacitor is used as the detection element when measuring the capacitance of the sample to be measured.   2. The automatic balancing circuit for impedance measurement according to claim 1, wherein the detection element includes a resistor and a capacitor that are selectively switched by a switching means. The control means sequentially sets any different phase angles θx, θy, θz to any one of the first oscillator or the second oscillator in a state where the amplitude is an arbitrary amplitude a, The voltage Vx, Vy, Vz appearing on the other terminal side of the sample to be measured is measured for each phase angle, and the first establishment factor of the equilibrium state that minimizes the voltage on the other terminal side by the following equation (A) And the phase angle of one of the oscillators is adjusted to the phase angle θmin, and the amplitude of the oscillator is sequentially set to two different amplitudes B1 and B2 for each amplitude. The voltages V1 and V2 appearing on the other terminal side of the sample to be measured are measured, and the amplitude Bmin as the second establishment factor of the equilibrium state is obtained by the following equation (B) or (C), and either one of the above Oscillator amplitude The automatic balance circuit for impedance measurement according to claim 1 or 2, wherein the balanced state is obtained by adjusting the amplitude to the amplitude Bmin.

The control means adjusts the phase angle of any one of the oscillators to the phase angle θmin according to the equation (A), and then sets the amplitude of the oscillator to the amplitude a to the other terminal side of the measured sample. If the voltage Va is equal to or higher than the voltages Vx, Vy, and Vz, the phase angle θmin set for any one of the oscillators is obtained by the following equation (D): The automatic balancing circuit for impedance measurement according to claim 1 or 2.

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