JPS62186561U

JPS62186561U -

Info

Publication number: JPS62186561U
Application number: JP7316486U
Authority: JP
Priority date: 1986-05-15
Filing date: 1986-05-15
Publication date: 1987-11-27

Description

[Brief explanation of the drawing]

第１図は、この考案のＣＲＴ受像機用フオーカ
ス回路の一実施例を示す回路図、第２図はパラボ
ラ電圧の波形補正原理を説明するための原理図、
第３図は、第１図に示した回路各部の信号波形図
、第４図は、第１図に示したＣＲＴ受像機用フオ
ーカス回路の変形例を示す回路図、第５図は、こ
の考案のＣＲＴ受像機用フオーカス回路の他の実
施例を示す回路図、第６図は、第５図に示した回
路各部の信号波形図、第７図は、従来のＣＲＴ受
像機用フオーカス回路の一例を示す回路図、第８
図は、従来のＣＲＴ受像機用フオーカス回路の他
の例を示す回路図である。４……フオーカス電極、５，７……パラボラ電
圧重畳回路、１１，２１，３１……ＣＲＴ受像機
用フオーカス回路、１２，３２……鋸歯状電圧加
算回路、１３，３３……積分回路。 FIG. 1 is a circuit diagram showing an embodiment of the focus circuit for a CRT receiver of this invention, and FIG. 2 is a principle diagram for explaining the waveform correction principle of parabolic voltage.
Fig. 3 is a signal waveform diagram of each part of the circuit shown in Fig. 1, Fig. 4 is a circuit diagram showing a modification of the focus circuit for a CRT receiver shown in Fig. 1, and Fig. 5 is a diagram of this invention. 6 is a signal waveform diagram of each part of the circuit shown in FIG. 5, and FIG. 7 is an example of a conventional focus circuit for a CRT receiver. Circuit diagram showing 8th
FIG. 2 is a circuit diagram showing another example of a conventional focus circuit for a CRT receiver. 4... Focus electrode, 5, 7... Parabolic voltage superimposition circuit, 11, 21, 31... Focus circuit for CRT receiver, 12, 32... Sawtooth voltage addition circuit, 13, 33... Integrating circuit.

Claims

[Claims for Utility Model Registration] (1) A focus circuit for a CRT receiver that focuses an electron beam deflected within a cathode ray tube onto a screen by applying a focus voltage to a focus electrode, which A parabolic voltage superimposing circuit superimposes a parabolic voltage with a deflection period of A focus circuit for a CRT receiver is provided with a sawtooth voltage adding circuit for correcting the apex to have a peak. (2) The parabolic voltage superimposition circuit is a resonant circuit that oscillates using a flyback pulse generated during the horizontal retrace period of the electron beam as a trigger pulse, and the sawtooth voltage addition circuit integrates the flyback pulse over time. CRT according to claim 1 of the utility model registration, characterized in that it is composed of an integrating circuit.
Focus circuit for receiver. (3) The parabolic voltage superimposition circuit is an amplifier circuit that amplifies the time integral value of the sawtooth horizontal deflection current, and the sawtooth voltage addition circuit amplifies the flyback pulse generated during the horizontal retrace period of the electron beam. A focus circuit for a CRT receiver according to claim 1, characterized in that the focus circuit comprises an integrating circuit that performs time integration.