JPS62182843A - Fast compiling/linking system - Google Patents

Abstract

PURPOSE:To avoid the fractionization of a text and to increase the compiling/ linking processing speed by outputting the text of an instruction with no address buried in case the address to be buried into the operand of the instruction within a text is not decided yet. CONSTITUTION:A text output means 2 outputs the text of the instruction with no address buried into an operand in case the address to be buried into the operand of the text instruction to be produced. Then the delivered text is stored in a text memory means 4. While a rearrangement information output means 3 outputs the address to be buried into the operand when the address to be buried into the operand is decided after converting the address into the special form of the rearrangement information, e.g., the operand address converting information, etc. This outputted rearrangement information is stored in a rearrangement information memory means 5. As a result, the continuous text outputs are secured and the text is never fractionized.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a compile/link method in a computer system.

Generally, a multi-pass processing method and a one-pass processing power method are known for code generation by a compiler.

The multi-pass processing method outputs text after determining the address that will enter the operand of the instruction of the text to be generated, and has the advantage of being easy to optimize code, but on the other hand, it is difficult to write intermediate code.

There is a drawback that it takes a lot of input/output time to take out the data.

On the other hand, the one-pass processing power formula is not very suitable for code optimization, but it simplifies the configuration of the compiler and
It has the advantage that the compile time is shorter than the multiple pass method.

[Conventional technology]

By the way, in the conventional one-pass processing power formula, if the address to enter the operand of the instruction for which the text to be generated is undetermined, the output of the text of that instruction is temporarily stopped, and the text of the previous instruction is output first. However, once the address to enter the operand of the instruction was determined, only the text of the instruction whose address to enter the operand was determined was output.

Conventional operations in text output will be described below with reference to the drawings.

In FIG. 5, which shows the flow of text output processing in the conventional one-pass processing method, step 51 is for determining whether the address to be embedded in the operand has been determined, and it is determined that the address has been determined. If so, step 52 is executed and the text is output. Further, if it is determined that the address has not been determined, step 53
In order to output the text after determining the address by executing
Store instructions temporarily.

FIG. 6 is a flowchart showing the detailed operation of step 52 in FIG. As shown in FIG. 6, first, in step 61, it is determined whether the text is the first text in the output buffer. As a result of this judgment, if it is found that it is the first text, execute step 62 and store the text in the output buffer. Next, execute step 63 and locate the text stored in the output buffer. Remember.

If it is determined in step 61 that the text is not the first text in the output buffer, that is, the text is already stored in the output buffer, step 64 is executed to determine the location of the text to be stored.
It is determined whether the location is continuous with the location of the last text already stored in the output bass panel. If it is determined in this determination step that the text is continuous, step 65 is executed to add the text to the output buffer. In addition, the location of the text added to the output buffer is memorized in step 66, and in the next step 67 it is determined whether any more text can be stored in the output buffer. And if it cannot be stored, step 68
Execute to output the text in the output buffer to a file. Further, if it is determined in step 67 that the data can still be stored, no output to a file is performed.

On the other hand, if step 64 determines that the text location is not contiguous with the location of the last text in the output buffer, step 69 is executed to convert the text stored in the output buffer to a file. Output. Then, in step 70, the new text is stored in the output buffer, and in the next step 71, the location of the stored text is memorized.

[Problem that the invention seeks to solve]

As mentioned above, in the output of one-pass processing in the code generation of conventional compilers, if the address to enter the operand of an instruction is undetermined, the text for the previous instruction is output, and the address to enter the operand of the instruction is output. At the moment it is decided, only the text of that instruction is output, so
The text is fragmented, which makes accessing the storage device that stores the text inefficient.

Furthermore, since the text is segmented in link processing, when inputting text, the efficiency of accessing the storage device in which the text is stored becomes poor.

As described above, the conventional compiling/linking process has the disadvantage that the performance of the compiling/linking process deteriorates because the efficiency of accessing the storage device in which text is stored decreases in any process.

The present invention solves the drawbacks of the conventional one-pass processing method, and its purpose is to achieve high-speed compile/link processing that can speed up compile/link processing by preventing output text from being fragmented. The goal is to provide a method.

[Means for solving problems]

In order to achieve the above object, the present invention provides a text output means for outputting the text of an instruction without embedding an address in the operand when the address to be embedded in the operand of the instruction in the text generated in the compiling process is undetermined. and a relocation information output means for converting the address into a type of relocation information and outputting the address when an address to be embedded in the operand is determined in the compiling process, and outputting the output of the text output means and the relocation information in the linking process. and operand embedding means for inputting the output of the output means and embedding the address in the operand of the corresponding text instruction based on the address information to be embedded in the operand included in the relocation information format.

[Effect]

If the address to be embedded in the operand of an instruction in the text generated during the compilation process has not been determined, the text of the instruction without the address embedded in that operand is now output, so the text will no longer be fragmented. .

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention, where l is a compiler, 2 is a text output means, 3 is a relocation information output means, 4 is a text storage means, 5 is a relocation information storage means,
6 is a text input means, 7 is a relocation information input means, 8 is a linker, and 9 is an operand embedding means.

The compiler 1 outputs text and relocation information, and includes a text output means 2 and a relocation information output means 3. When the address to be embedded in the operand of the instruction of the text to be generated is undetermined, the text output means 2
The text of the instruction is output without addresses embedded in the operands, and this output text is stored in the text storage means 4. Furthermore, when the address to be embedded in the operand is determined, the relocation information output means 3 performs processing such as converting the address to be embedded in the operand into a special format of relocation information, such as operand address conversion information, and outputting the converted address. This output relocation information is stored in the relocation information storage means 5.

The linker 8 includes a text input means 6, a relocation information input means 7, and an operand embedding means 9.

The text input means 6 takes out text from the text storage means 4, and the rearrangement information input means 7 takes out rearrangement information from the rearrangement information storage means 5. Further, the operand embedding means 9 determines an address to be embedded in the operand based on the operand address conversion information included in the relocation information extracted by the relocation information input means 7, and extracts the address from the text input means 6. Performs processing to embed in the operand of the instruction in the corresponding text.

2 is a flowchart showing an example of processing by the text output means 2, FIG. 3 is a flowchart showing an example of processing by the rearrangement information outputting means 3, and FIG. 4 is a flowchart showing an example of processing by the operand embedding means 9. The operation of this embodiment will be explained below with reference to each figure.

When the text output means 2 is activated due to analysis of the input source of the compiler 1, completion of predetermined table creation processing, etc., as shown in FIG. Determine whether the address to be embedded in the operand of has been determined.

If it is undecided, step 22 is executed to create the text of the instruction without embedding the address in the operand, and in the next step 24 this text is output to the text storage means 4. Further, when the address to be embedded in the operand has been determined in step 21, step 23 is executed to create the text of the instruction in which the address is embedded in the operand, and in the next step 24, the text is stored in the text storage means 4. Output to. Note that step 24 is the same as step 52 in conventional processing.

In this way, in this embodiment, when the address to be embedded in the operand has not yet been determined, the text of the instruction without embedded address is created and output, so conventional text output may be discontinuous. , in this embodiment the text output is continuous and the text is not fragmented.

Further, when the relocation information output means 3 is activated in accordance with the execution of the process of the compiler l, the relocation information output means 3
As shown in the figure, first, in step 31, it is determined whether input data given from means (not shown) in the compile 1 is an address to be embedded in an operand.

If the result of this determination is that the address is to be embedded in the operand, step 32 is executed to convert the address information to be embedded in the operand into operand address conversion information that is a special format of relocation information. Note that this operand address conversion information is formally the same as normal relocation information, and includes address information to be embedded, information on the embedding destination, etc. Then, in the next step 34, this operand address information is outputted to the relocation information storage means 5 as relocation information.

On the other hand, if it is determined in step 31 that the input data is not an operand address, that is, it is normal relocation information, step 33 is executed to create normal relocation information, and the next step 34 Then, the relocation information is output to the relocation information storage means 5.

By performing the above processing, the text of the instruction in which the address is embedded in the operand and the text of the instruction in which the address is not embedded are sequentially stored in the text storage means 4. A type of relocation information and normal relocation information corresponding to the text of the unused command are sequentially stored in the relocation information storage means 5.

Now, when the processing of the compile 1 is completed and control is transferred to the linker 8, and the operand embedding means 9 is activated as the linker 8 executes the processing, the operand embedding means 9 performs the following operations as shown in FIG. First, in step 42, it is determined whether the relocation information read through the relocation information input means 7 is operand address conversion information, which is a type of relocation information. If the operand address conversion information is the operand address conversion information, step 42 is executed to extract the address to be embedded in the operand from the operand address conversion information, and the address is added to the operand of the corresponding text instruction read through the text input means 6. If it is determined in step 41 that the operand address conversion information is not operand address conversion information but normal relocation information, step 43 is executed to execute normal relocation processing.

〔Effect of the invention〕

As explained above, in the present invention, if the address to be embedded in the operand of an instruction within the text has not been determined, the text of the instruction is output without embedding the address, so fragmentation of the text can be prevented. , which has the effect of speeding up compile/link processing. In addition,
When an address is determined, a type of relocation information including address information to be embedded and information on the embedding destination is output, and in linker processing, the address is embedded into the operand of the corresponding instruction based on the relocation information. I can do it.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a flowchart showing an example of processing by the text output means 2, FIG. 3 is a flowchart showing an example of processing by the rearrangement information output means 3, and FIG. 4 is an operand FIG. 5 is a flowchart showing a processing example of the embedding means 9, FIG. 5 is a flowchart of text output processing in the conventional one-pass processing method, and FIG. 6 is a flowchart showing a detailed example of step 52 in FIG. . In the figure, 1... Compiler, 2... Text output means, 3... Relocation information output means, 4... Text storage means, 5... Relocation information storage means, 6... Text Input means, 7... Relocation information input means, 8...
・Linker, 9... Operand embedding means.

Claims (1)

[Scope of Claims] Text output means for outputting the text of an instruction without embedding an address in the operand when an address to be embedded in an operand of a text generated in the compiling process is undetermined; Relocation information output means for converting the address into a type of relocation information and outputting it when an address to be embedded in the operand is determined; and output from the text output means and output from the relocation information output means in link processing. and an operand embedding means for embedding the address in the operand of the corresponding text instruction based on the address information to be embedded in the operand included in the relocation information.
Link method.