JP3323147B2 - Compiling device, compiling method, and recording medium recording compiler program - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optimizing compiler using a trace scheduling method, and more particularly to a compiling apparatus for determining an instruction rearrangement range, a compiling method, and a recording medium on which a compiler program is recorded.

[0002]

2. Description of the Related Art An example of an optimizing compiler system using a conventional trace scheduling method is disclosed in "1990 June.
Moon, Information Processing, Vol. 31, No. 6, pages 764-767, Toshio Nakatani, Compiler Technology for VLIW Computers, 4. Trace Scheduling Method ".

A conventional optimizing compiler system using a trace scheduling method includes a "translating means for translating a source program into an intermediate language" and a "rearranging range determining means for determining a range in which an instruction sequence of an intermediate language is rearranged". And "instruction rearranging means for rearranging the intermediate language so that it can be executed faster" and "machine language instruction generating means for outputting the rearranged intermediate language as a machine language instruction". .

A conventional optimizing compiler system having such a configuration operates as follows. (1) Translate the source program into an intermediate language. (2) A range in which instructions are rearranged is determined from the intermediate language instruction sequence.

The determination of the instruction rearrangement range is performed in the following procedure. (2-1) Create a flowchart showing the flow of processing from the instruction sequence of the intermediate language. (2-2) In the flowchart, search for an instruction having the largest expected number of executions. (2-3) The flow chart is traced back and forth from the instruction with the largest number of executions to determine the instruction rearrangement range. (3) The instructions are rearranged in the instruction rearrangement range.

The rearrangement of the instructions is performed in the following procedure. (3-1) Analyze dependencies between instructions in the range of instruction rearrangement, and at a certain point in time, extract all instructions that have data used by the instruction and are in an executable state. (3-2) Among instructions in the executable state, select one instruction in which the resource required for executing the instruction does not conflict with the resource required for executing another preceding instruction, and allocate the processor resources. (3-3) The instructions are rearranged in the selected order by repeating the processing until all the instructions are processed. (4) Output the rearranged intermediate language as a machine language instruction.

[0007]

A first problem of the above-mentioned conventional compiler system is that if the number of instructions to be rearranged increases, the time required to rearrange the instructions becomes too long. That is.

[0008] The reason is that, when an instruction is rearranged, it is necessary to check whether resources required for all other instructions having no dependency do not conflict with each other.

A second problem is that, in order to avoid the above-mentioned problem, if the instructions to be rearranged are restricted, an instruction selected in the instruction rearrangement range and an instruction not selected are not selected. This means that the data is transferred and the execution speed is reduced.

[0010] The reason is that when the instructions to be rearranged are determined in the order of the instructions, the resources (registers) of the processor are also allocated to the instructions that define the data used by the instructions that have not been rearranged. Because the number of registers is finite, the operation result of the preceding instruction cannot always be held in the register, and data is transferred between the memory and the register.

An object of the present invention is to provide a compiling apparatus, a compiling method, and a recording medium on which a compiling program is recorded, which rearranges instructions so that an instruction sequence with a high execution speed can be generated in a short processing time.

[0012]

Compiling device of the present invention According to an aspect of the intermediate language generating means for generating an intermediate language from the source program, it depends to investigate the dependency of the instruction sequence of the intermediate language
The first in which only related instructions are set in the instruction rearrangement range
An instruction rearrangement range determining unit that generates an instruction sequence of the first instruction sequence; an instruction schedule unit that rearranges instructions within the instruction rearrangement range from the first instruction sequence to generate a second instruction sequence; Object program generating means for generating an object program from the instruction sequence.

[0013] The compiling apparatus of the present invention may be arranged so that the number of instructions larger than the limit number of instructions included in the instruction rearrangement range is increased.
It may be characterized in that it is not included in the sorting range .

[0014]

According to the compile method of the present invention, an intermediate language is generated from a source program, and a dependency relation of an instruction sequence of the intermediate language is generated.
Investigate the relation and check only the instructions that have a dependency
Generating a first sequence of instructions is set to enclose said from the first instruction sequence by rearranging the instructions within the instruction reordering range to generate a second instruction sequence, the object program from the second instruction sequence Is generated.

In the compiling method according to the present invention, the number of instructions larger than the limit number of instructions included in the instruction rearrangement range may be increased.
It may be characterized in that it is not included in the sorting range .

[0017]

According to the recording medium of the present invention, there is provided an intermediate language generating process for generating an intermediate language from a source program, and examining the dependence of an instruction sequence of the intermediate language to instruct only an instruction having a dependence.
Generating an instruction reordering range determination process of generating a first sequence of instructions set decrees reordering range, a second instruction sequence by rearranging the instructions within the instruction reordering range from said first instruction sequence A compiler program for causing a computer to execute an instruction schedule process and an object program generation process for generating an object program from the second instruction sequence is recorded.

In the recording medium according to the present invention, the instruction rearranging unit may execute more than the limit number of instructions included in the instruction rearranging range.
It may be characterized in that it is not included in the range .

[0020]

[0021]

Next, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of the first embodiment of the present invention. Referring to FIG. 1, the compiling device 101 includes an intermediate language generating unit 102, an instruction rearranging range determining unit 103, an instruction scheduling unit 104, and an object program generating unit 105.

The intermediate language generating means 102 reads the source program 106, performs syntax analysis and semantic analysis,
The intermediate language 107 is generated.

The instruction rearrangement range determining means 103 includes: a flow graph creating means 111 for creating a flow graph representing a processing flow from the intermediate language 107; a dependency determining means 112 for examining the dependency of each instruction; An instruction rearranging unit 113 for rearranging an instruction group having a command and another instruction group is provided. This instruction rearrangement range determining means 103
Generates a first instruction sequence 108 from the intermediate language 107.

The instruction schedule means 104 generates a second instruction sequence 109 from the first instruction sequence 108 which is rearranged so that the intermediate language 107 can be executed faster.

Object program generating means 105
Is the object program 1 from the second instruction sequence 109.
Generate 10.

Next, the overall operation of the present embodiment will be described in detail with reference to FIGS. FIG. 2 is a flowchart showing the operation of the instruction rearrangement range determining means 103. Steps 201 to 204 are operations of the flow graph creation unit 111. Step 205 and subsequent steps are operations of the dependency determination unit 112 and the instruction rearranging unit 113.

First, the initialization process shown in FIG.
In 1), the instruction rearrangement range determining means 103 is initialized.

At step 202, it is checked whether or not there is an intermediate word. If there is, an intermediate word extracting process (step 203) is performed to extract one intermediate word from the intermediate word 107.

Further, an intermediate language conversion process (step 20)
Proceeding to 4), one intermediate language extracted in step 203 is converted into one instruction.

Next, a dependency analysis process (step 20)
Proceeding to 5), if an instruction defining data used by the instruction converted in step 204 is registered in the instruction chain, release the instruction defining data used by the converted instruction in step 204 from the chain. I do.

Further, the process proceeds to an instruction chain registration process (step 206), and the instruction converted in step 204 is registered in the instruction chain.

Steps 202 to 206 are repeated until there is no intermediate language in the intermediate language 107.

At this stage, in the instruction chain, an instruction whose defined data is not used in any subsequent instructions or an instruction whose data is not defined is registered.

Next, at step 207, it is checked whether or not the instruction chain exists or does not exceed the limit number of instructions included in the instruction rearrangement range. If the number does not exceed the limit number of instructions to be executed, the process proceeds to instruction selection processing 1 (step 208), and one instruction is taken out of the instruction chain. The limit number of instructions included in the instruction rearrangement range is set in advance.

Further, the instruction mark processing (step 20)
Go to 9) and mark the instruction.

Next, at step 210, it is checked whether or not there is data used by the instruction selected at step 208.
If it exists, recursive call processing (step 211)
Steps 209 to 211 are recursively repeated, such as an instruction defining data used by the instruction, an instruction defining data used by the instruction, and so on.

If there is no dependent instruction, the process exits from the recursive process and finally repeats the process from step 207.

Next, the flow advances to step 212 to sequentially follow the instruction sequence. If it is not the last, the process proceeds to the instruction selection process 2 (step 213) to select one instruction.

Further, the process proceeds to step 214, and it is checked whether or not the instruction selected in step 213 is marked in step 209.

If it is not marked, the process proceeds to the instruction rearrangement process (step 215), and the instruction is added to the end of the instruction sequence.

Steps 212 to 215 are repeated until there is no instruction sequence.

At this stage, in the instruction sequence, the instruction marked in step 209 and the instruction not marked in step 209 are respectively continuous.

Next, the process proceeds to the instruction rearrangement range determination processing (step 216), and the range of the instruction sequence that includes the instruction marked in step 209 is determined as the instruction rearrangement range.

Finally, the process proceeds to an end process (step 217) to end the process.

Thus, the first instruction sequence 108 is generated by the instruction rearrangement range determining means 103. The instruction schedule unit 104 rearranges the instructions in the range determined as the instruction rearrangement range in the first instruction sequence 108 so that the intermediate language can be executed faster, and generates the second instruction sequence 109. I do.

Next, a second embodiment of the present invention will be described. FIG. 3 is a block diagram showing a configuration of the second exemplary embodiment of the present invention. Referring to FIG. 3, the second embodiment includes a compiling device 101 and a recording medium 121. The recording medium 121 records a compiler program. This recording medium 121 may be a magnetic disk, a semiconductor memory, an optical disk, or another recording medium.

The compiler program is read from the recording medium 121 into the compiling device 101, and is processed by the intermediate language generating means 102, the instruction rearranging range determining means 103, the instruction scheduling means 104, and the object program generating means 105 in the first embodiment. The same processing is performed.

The compiler program selects an instruction having no dependency between the intermediate language generation processing for generating the intermediate language 107 from the source program 106 and the instruction not selected by examining the instruction sequence of the intermediate language 107. An instruction rearrangement range determining process for generating a first instruction sequence 108 in which an instruction rearrangement range is set, and rearranging the instructions in the instruction rearrangement range from the first instruction sequence 108 so that the intermediate language can be executed faster. An instruction schedule process for generating the second instruction sequence 109 and an object program generation process for generating the object program 110 from the second instruction sequence 109 are performed. The limit number of instructions included in the instruction rearrangement range is set in advance.

[0050]

As described above, the present invention does not exceed the maximum number of instructions included in the instruction rearrangement range.
Furthermore, the instruction selected as the instruction rearrangement range has no data dependency between the instruction not selected and the data is not transferred at the boundary, so that the processing time does not significantly increase. Thus, there is an effect that an instruction sequence with a high execution speed can be generated.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a first exemplary embodiment of the present invention.

FIG. 2 is a flowchart showing an operation of an instruction rearrangement range determining unit.

FIG. 3 is a block diagram showing a configuration of a second exemplary embodiment of the present invention.

[Explanation of symbols]

 Reference Signs List 101 Compiling device 102 Intermediate language generating means 103 Instruction rearranging range determining means 104 Instruction scheduling means 105 Object program generating means 106 Source program 107 Intermediate language 108 First instruction string 109 Second instruction string 110 Object program 111 Flow graph creating means 112 Dependency determining means 113 Instruction rearranging means 121 Recording medium

Claims (6)

(57) [Claims] 1. An intermediate language generating means for generating an intermediate language from a source program, and checking dependency of an instruction sequence of the intermediate language.
An instruction rearrangement range determining means for generating a first instruction sequence in which only instructions having a dependency relationship are set in the instruction rearrangement range, and an instruction rearrangement range from the first instruction sequence. A compiling apparatus comprising: instruction scheduling means for rearranging instructions in the instruction sequence to generate a second instruction sequence; and object program generating means for generating an object program from the second instruction sequence. 2. The compiling apparatus according to claim 1, wherein more instructions than the limit number of instructions included in the instruction rearrangement range are not included in the instruction rearrangement range . 3. An intermediate language is generated from a source program.
Investigate the dependency of the instruction sequence of the intermediate language
Generating a first instruction sequence in which only instructions in the instruction rearrangement range are set in the instruction rearrangement range, and rearranging instructions in the instruction rearrangement range from the first instruction sequence to generate a second instruction sequence, 2
A compilation method characterized by generating an object program from a sequence of instructions. 4. The compiling method of claim 3, wherein this <br/> and not included in many instruction reordering range instruction than the limit number of instructions contained in the instruction sorting range. 5. An intermediate language generating process for generating an intermediate language from a source program, and checking the dependency of an instruction sequence of the intermediate language.
An instruction rearrangement range determining process for generating a first instruction sequence in which only instructions having a dependency relationship are set in the instruction rearrangement range, and the instruction rearrangement range is determined from the first instruction sequence. A compiler program for causing a computer to execute an instruction schedule process of rearranging the instructions in the instruction sequence to generate a second instruction sequence and an object program generation process of generating an object program from the second instruction sequence. Recording medium characterized by the above-mentioned. 6. The recording medium of claim 5, wherein this <br/> and not included in many instruction reordering range instruction than the limit number of instructions contained in the instruction sorting range.